Wen Chen

NXP Semiconductors · Design Enablement/Technology & Operations

Assurance of functional safety is a critical component of automotive SoC design, specifically in the context of autonomous driving and advanced driver assistance. This tutorial, written based on the authors’ strong industry experience, outlines the key challenges associated with functional safety and practices as well as standards to address them.

Modern automotive systems and IoT devices are designed through a highly complex, globalized, and potentially untrustworthy supply chain. Each player in this supply chain may (1) introduce sensitive information and data (collectively termed "assets") that must be protected from other players in the supply chain, and (2) have controlled access to ass...

In spite of decades of work, design verification remains a highly expensive and time-consuming component of electronic system development. With the advent of Systemon- Chip (SoC) architectures, verification has morphed into an activity that spans the entire life-cycle, making use of diverse platforms, tools, and technologies. This paper provides a...

Verification has been one of the major bottlenecks in integrated circuit design process, which is exacerbated by the sheering design complexities nowadays. The increased design size is only one dimension of the growing complexities. Recent System-on-Chips (SoC) often feature multiple heterogeneous embedded processors and accelerators. While the het...

A modern automotive design contains over a hundred microprocessors, several cyber-physical modules, connectivity to a variety of networks, and several hundred megabytes of software. The future is anticipated to see an even sharper rise in complexity of this electronics, with the imminence of driverless vehicles, the potential of connected automobil...

Security verification relies on using direct tests manually prepared. Test preparation often requires intensive efforts from experts with in-depth domain knowledge. This work presents an approach to learn from direct tests written by an expert. After the learning, the learned model acts as a surrogate for the expert to produce new tests. The learni...

Verification of a platform design can be divided into two parts, core verification and platform verification. In both parts, constrained random test generation is applied and verification is driven by certain predefined coverage metrics. This work focuses on platform verification and shows that a data learning approach designed for core verificatio...

Post-silicon debug requires high observability and controllability of the SoC, which is realized by access to the internal registers and memory via external debug interfaces and on-chip instrumentation. However, the existence of hardware debug circuitry increases the risk of exposing the vulnerabilities of the SoC. Attackers or malicious users migh...

The emergence of Internet-of-Things has imposed more stringent security requirements on SoC devices. Basic security requirements include confidentiality and integrity, which imply less observability and controllability of the SoC from the outside world. On the other hand, observability and controlla-bility are essential to SoC debug activities. Wit...

Pressure to decrease power consumption on HW designs feeds into the increasing complexity of power testing scenarios. The process of validating power control behavior is similar to functional verification, with generating, simulating and checking the correctness of power modes tests. The cross product of functional and power testing, which would re...

The emergence of Internet-of-Things has imposed enormous challenges on designing and verifying hardware satisfying security requirements. Common security properties such as confidentiality and integrity can be formulated as information flow properties. However, it has been claimed that such properties are difficult to express in popular property la...

This paper investigates how data mining can be applied in functional debug, which is formulated as the problem of explaining a functional simulation error based on human-understandable machine states. We present a rule discovery methodology comprising two steps. The first step selects relevant state variables for constructing the mining dataset. Th...

This work proposes a methodology of knowledge extraction from constrained-random simulation data. Feature-based analysis is employed to extract rules describing the unique properties of novel assembly programs hitting special conditions. The knowledge learned can be reused to guide constrained-random test generation towards uncovered corners. The e...

Novel tests are important in simulation-based functional verification because they provide coverage of difficult-to-verify corners. In this work, we did an experimental study on how to learn from the novel tests to help improve structural coverage in functional verification. A feature-based learning methodology is proposed to diagnose the reasons w...

Novel test detection is an approach to improve simulation efficiency by selecting novel tests before their application [1]. Techniques have been proposed to apply the approach in the context of processor verification [2]. This work reports our experience in applying the approach to verifying a commercial processor. Our objectives are threefold: to...

One of the challenges of functional test content optimization, in the context of performance validation, is to predict from a high level model an event of interest observed in either a detailed simulation or in silicon testing. This work uses peak power validation as an example to study the potential of using learning algorithms to uncover the corr...

This talk will review several key challenges in design automation, including areas such as pre-silicon functional verification, design-silicon timing correlation, test cost and quality and describe data mining technologies to implement a prediction platform that provides unique solutions to cover these challenges. Results based on industrial cases...