Block diagram of electromechanical system 

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... than 90% of the electrical drives in the world include induction motors. But the necessity of a fluent velocity adjustment in a wide range and the requirements for a high starting torque and high energy indices have been an introduce holdback of the induction motors in the automotive and electrical transport. Only the recent twenty years thanks to the development of the power electronics and the microprocessor circuits the inductive electrical drives have become competitive to the asynchronous ones. A variant of a new approach for designing high efficiency control devices in the electrical drive systems is presented in the paper. The examined Electromechanical Systems (ЕМ S) are various kinds of electric drive systems, which convert the electrical energy into mechanical or vice versa. Generally these systems can be depicted by a simple block diagram, shown in Fig. 1, where: IN is an Interface node; CD – Control Device; PC – Power Converter; M – Motor; MN – Mechanical Node; ON – Operating Node; S1, S2, ... , Sn – sensors for the adjustable coordinates; PS – Power Supply; PG – Power Group of the ЕМS ; ICG – Information Control Group. A control of the considered EMS means a process organization of the power conversion, supplying the necessary operation modes of the mechanical nodes. The control is automated, where the corresponding control signals could come from higher hierarchical level via wire or wireless interface (IN). Starting, stopping and reversing the rotation direction;  Keeping the defined coordinates values;  Defined operation mode implementation by a control program;  Watching arbitrary changing signals coming from the sensors. Except the main control functions some auxiliary functions can be performed such as:  Protection of the electric motors, converters and mechanical nodes against various overloads;  Locks preventing from failures and abnormal modes;  Diagnostics and signaling for the system blocks states and for the progress of the technological process, etc. The last tendencies in the high efficiency control systems in the electrical drive systems, based on control methods like: Magnetic field orientation; Vector control; Neural networks; Searching based on fuzzy logic, use microcontrollers and DSP. However they have got many disadvantages, which do not allow them to achieve best results. Drawbacks of the traditional and DSP microcontrollers [1], [7]:  The lack of options for parallel data processing;  Difficult interrupt request handling in complex system working in real time;  Limited resources which make difficult the complex systems implementations;  Lack of differential signaling inputs and outputs leading to low noise resistance;  More difficult implementation of bit operations made entirely by software; The FPGA and CPLD production and applying is one of the fastest growing areas in electronics, because of the number of their advantages, like: ([3], [6], [7])  Possibilities for synthesizing hardware by software means;  Possibilities for integrating various functions and several microcontrollers in one chip;  Implementing complex algorithms for parallel processing;  Possibilities for using various embedded features;  Higher information power at data processing;  Software tools with many features for synthesis, simulation and verification of the designs;  Easy implementation of bit operations, which leads to increased effectiveness of the processed information. The appearance of the programmable logic devices (PLD) is a new era in the digital devices and systems design flow development. The configurable and reconfigurable logic devices are highly integrated flexible universal circuits, including power logic, memory and allowing In-system Programming (ISP). FPGA main features [8] The system operation of FPGAs is defined by their features; their parameters are like of the other integrated circuits. An idea of the complexity of the FPGAs is derived from the number of the equivalent logic elements (LE), usually called System Gates (SG), and together with them the number of the Logic Cells (LC) is usually given in the technical data. The ability of the FPGAs to communicate with other devices can be appreciated by the number of the parallel inputs and outputs and the highest possible speed. Other features are the number of embedded interface modules, the type of embedded memories and their volume. The memory organization is not fixed and can be configured during programming. The same is referred to the embedded FIFO memory blocks in some FPGAs often used as buffers. The main features of the DSPs, which are optional blocks too, are the length of the multiplied numbers and the maximum operating frequency. Cyclone FPGAs include PLL blocks and a global clock network. The PLL allow:  Clock multiplication and division;  Phase shift;  Programmable duty cycle;  External clock outputs. All the features allow the clock signals and edge delays control at system level. Most of the FPGAs of Xilinx and Altera include hardware multipliers. They could be used for digital signal processing, where many multiplications are implied, such as Finite Impulse Response (FIR) filters, quick Furrier transform, discrete cosine transform, etc. Traditionally Digital Signal Processing/ Processors (DSPs) are used to process digital signals. They have a standard architecture, which advantage is that they are flexible and can be used for filtering and modulations. Only the software is changed for that purpose. On the other hand their flexibility limits their efficiency. Initially the DSPs include only one multiplier but the recent ones have to 8 multipliers. Iteration calculations consisting of 2 - 8 multiplications for the corresponding system clocks are usually used to calculate the result. That is why the DSPs are more suitable for signal processing in systems of medium to low productivity. The FPGAs selection criteria depend on the application of the designed system. They can be as follows:  An availability of embedded resources according to the application;  Enough logic capacity, for the monitoring and control algorithms implementation;  The features and the cost of the hardware and software development tools and configuration memories;  The cost of the programmable logic devices;  Availability of development tools, methodological and technical supplement, etc. There are two separate design stages which are carried out in parallel in time in order FPGA system to reach the market: design stage and debug and verification stage (Fig. 2). The detailed system design flow is presented in [2], [4], [5] and [8]. The main design stages are input, simulation, implementation and programming in FPGA. At this stage the debug also begins using simulation tools. The severe problems not seen at the simulation process should be found out at the debug stage. The modern integrated development environments include program modules with wide range of features. They include:  Tools used to input/ edit, compile, simulate, program the project;  ІР ( Intellectual Property) cores, ready to use, implementing various functions – general purpose processor and DSP, components implementing various interfaces and communication protocols, modulators and demodulators, coders, memories, etc.;  Software tools allowing creating projects including DSP modules; various tools for functional or timing design simulation;  Various design and test modules for complex systems at block level;  Software tools for design and simulation of applications based on 16- or 32-bit software CPU core including peripheral blocks, etc. There are two design approaches: Bottom-Up and Top- Down [4]. At the Top-Down approach a leading designer creates and optimizes the top level of the project on the whole. The Bottom-Up approach allows creating the project top level, which includes any number of projects from a lower level as partitions of it. Therefore the designer (or the designers in the team) can design and optimize every partition as a separate project. The FPGA based devices and systems design consequence is nearly identical for the various producers and consists of the following stages, shown in Fig. 2. behavior or structure model with various design automation software tools in the following ways:  By a program written on some of the following hardware description languages - AHDL, VHDL, Verilog, etc.  Usage of ready library components;  Creation of a memory initialization file using a special memory editor;  As a block diagram using a block editor;  A combination of the above approaches. The preliminary assignments of various requirements to the project and software environments settings allow controlling their features and options in order to increase its effectiveness. Conditions for project optimization can be also defined. Two main approaches for design compilation exist – flat and incremental compilation. In the flat compilation the compiler uses several modules to manage the project, creating one or more files for programming. In the incremental compilation it is possible to compile project partitions independently. It reduces the necessary memory and time for the compilation process, allowing recompiling only the modified parts of the design. The incremental compilation is used with large designs and when changes have to be made only in some parts. The compilation stage consists of several ...