Science topic

Semiconductor Device Physics - Science topic

Explore the latest questions and answers in Semiconductor Device Physics, and find Semiconductor Device Physics experts.
Questions related to Semiconductor Device Physics
  • asked a question related to Semiconductor Device Physics
Question
4 answers
Please suggest some "easier" non-open-access journal/s, other than IEEE-TED, for publication in the field of device modeling and simulation of CMOS image sensors.
Relevant answer
Answer
Dear Mohsin Suharwerdi,
The journal below may fit your interests:
Sensors
Sensors is the leading international, peer-reviewed, open access journal on the science and technology of sensors. Sensors is published semimonthly online by MDPI. The Polish Society of Applied Electromagnetics (PTZE), Japan Society of Photogrammetry and Remote Sensing (JSPRS), Spanish Society of Biomedical Engineering (SEIB) and International Society for the Measurement of Physical Behaviour (ISMPB) are affiliated with Sensors and their members receive a discount on the article processing charges.
  • Open Access — free for readers, with article processing charges (APC) paid by authors or their institutions.
  • High Visibility: indexed within Scopus, SCIE (Web of Science), PubMed, MEDLINE, PMC, Embase, Ei Compendex, Inspec, Astrophysics Data System, and other databases.
  • Journal Rank: JCR - Q2 (Instruments & Instrumentation) / CiteScore - Q1 (Instrumentation)
  • Rapid Publication: manuscripts are peer-reviewed and a first decision provided to authors approximately 16.2 days after submission; acceptance to publication is undertaken in 2.8 days (median values for papers published in this journal in the first half of 2022).
  • Recognition of Reviewers: reviewers who provide timely, thorough peer-review reports receive vouchers entitling them to a discount on the APC of their next publication in any MDPI journal, in appreciation of the work done.
  • Sections: published in 25 topical sections.
  • Testimonials: See what our editors and authors say about Sensors.
  • Companion journals for Sensors include: Chips, AutomationJCP and Devices.
Impact Factor: 3.847 (2021) ; 5-Year Impact Factor: 4.050 (2021)
subject Imprint Information get_app Journal Flyer Open Access ISSN: 1424-8220
  • asked a question related to Semiconductor Device Physics
Question
5 answers
I have designed a CMOS image sensor device in TCAD and need to convert its equivalent model in a SPICE simulator to obtain the overall read noise of the designed pixel with backend electronics. Would I need to build the photodiode model from scratch in SPICE or can I use some already available PDK for the purpose?
Relevant answer
Answer
Use Extract instruction
  • asked a question related to Semiconductor Device Physics
Question
2 answers
If they are material dependent , what are the ranges for InAs, GaAs and AlGaAs materials?
I referred one thesis to determine the RI for binary and ternary semiconductor, where it is mentioned that formula obeys for reststrahlen region. I calculated RI for mentioned materials but I have confusion regarding the limits of formula.
Relevant answer
Answer
for any material or composites you mean ??
  • asked a question related to Semiconductor Device Physics
Question
10 answers
Semiconductor device physics,
Relevant answer
Answer
Adding to the colleagues above,
One can look at the dopant distribution with depth measured for surface from an other point of view. It is how one produces such doping profiles, It is the doping technology. There is the epitaxial deposition where one normally produce layers with homogeneous doping. On can also grade the doping by controlling the doping atoms dose during the deposition. There is also the solid sate diffusion technology which results either in complementary error function dopant distribution or Gaussian distribution. There is also the ion implantation where the dopants are Gaussian around the pentation range of the implanted atoms.
These are the possible doping profiles according to their production method.
It is so that there are secondary factors which may slightly later the above theoretical distributions such as the presence of the crystallographic defects at high doping or the presence of the grain boundary.
You can find the analysis methods in the book of S.M.Sze VLSI technology.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
I am talking about perovskite material. In optoelectronic application basically, we need a direct band gap material. so, if have any technique to convert this then please explain it in detail or give any proper references.
Relevant answer
Answer
@Nathan Zavanelli thank you.
But can we use this technique like pressure, temperature in real application.
  • asked a question related to Semiconductor Device Physics
Question
2 answers
So, I have designed (MIS) structure with strong bands bending. I would like to know is there any eigen energies near an interface. Is it possible with Atlas? And how it is possible to take quantization into account during a simulation? By quantum model?
Relevant answer
Answer
Dear mr.zakirov
Silvaco has a complete chapter about quantum effects.There are various types of quantum models.first, you need to know the workingnprinciple of your device. for example, quantum confinement effects have impressive impact on the short-channel mosfet or thin-channel multi-gate tunnel fet.
  • asked a question related to Semiconductor Device Physics
Question
1 answer
We are doing PEC experiments using 100 Watt xenon lamp with two electrode systems. In the formula ABPE (%) = [ J X (1.23 - Vapp) / Plight ] x 100. how to calculate Plight ? Should we use standard value 100 mW/cm2 for AM 1.5 system or do we have to calculate with respect to the our sample area? Also, please give the example calculation details for my case (Please see attached data in excel file). 
Thank You...
Relevant answer
Answer
Gopalakrishnan Masilamani, you may use the standard value 100 mW/cm2 for AM 1.5 illumination since Plight is input light power intensity in the ABPE formula. I hope this answer will help you. All the best with your research !!
  • asked a question related to Semiconductor Device Physics
Question
4 answers
In non-local measurements, we apply current between two leads and measure voltage on different leads away from the current leads. to calculate resistance, do we need to divide the non-local voltage by current - as such current is not flowing through the voltage leads?
can you please suggest good literature on non-local measurements?
Thanks
Relevant answer
Answer
Yes, I believe you can take the current.
  • asked a question related to Semiconductor Device Physics
Question
58 answers
Is it possible to use a Current to Voltage Converter as a non-inverting amplifier?
Relevant answer
Answer
Yes, it is possible to design the I to V converter using both inverting and non inverting opamp amplifier (inverting amplifier being the simplest to use and the common one which we can see in almost all the books).
  • asked a question related to Semiconductor Device Physics
Question
3 answers
While doped reservoir or source or drain the doping concentration describe by MOLAR FRACTION=5*10^(-3)
Relevant answer
Answer
Molar fraction is related in semiconductors in such a way that like we are talking about AlxGa1-xAs then how much amount of Aluminium aur Gallium is present in the whole compound or ratio of no. of moles of Aluminium to the ratio of all components in AlxGa1-xAs or ratio of no. of moles of Gallium to the ratio of all components in AlxGa1-xAs. Basically it is amount or number of atoms/molecules function with bandgap energy, temperature etc.
  • asked a question related to Semiconductor Device Physics
Question
3 answers
Dear all, 
Here I am simulating TIPS-pentacene based bottom-gate top-contact organic thin film transistor (OTFT) using Synopsys TCAD. I am using Poole-Frenkel mobility model for TIPS-pentacene OTFT simulation. For linear reion, I got similar output current characteristics in experiment as well as in simulation  however, in saturation region simulated output characteristics and  experimental output characteristics differs. 
How to mitigate this difference? Do I need to define mobility model for saturation region? 
Relevant answer
Answer
I am having an issue using Poole-Frenkel model in sdevice file when i run sdevice it comes up with an error of stating convergence error, but when i remove Pool-Frenkel model from the sdevice file sdevice runs successfully,
Kindly please suggest me how to use properly the Poole-Frenkel model in sdevice file.
  • asked a question related to Semiconductor Device Physics
Question
1 answer
While simulating the effect of a heavy ion strike on a reverse biased SiC Schottky diode in Sentaurus 3D, I see totally different maximum lattice temperatures when simulating different time ranges or even by selection of different number of points to be plotted in the same time range. Everything else including the device structure mesh etc remains the same.
The three solve statements below provide three different temperature profiles -
Solve {
            Poisson
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}
            NewCurrentPrefix= "Tr_"
            transient( InitialTime=0 Finaltime = 1e-8 increment=1.4
            InitialStep=1e-9 MaxStep=1e-8 MinStep=1e-25){
            coupled{ poisson electron hole Temperature}
            CurrentPlot ( Time= (Range= (0 1.0e-8) Intervals= 200))
    } 
}
Solve {
            Poisson
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}
            NewCurrentPrefix= "Tr_"
            transient( InitialTime=0 Finaltime = 1e-8 increment=1.4
            InitialStep=1e-9 MaxStep=1e-8 MinStep=1e-25){
            coupled{ poisson electron hole Temperature}
            CurrentPlot ( Time= (Range= (0 1.0e-8) Intervals= 2000))
     } 
}
Solve {
            Poisson
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }
            Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}
            NewCurrentPrefix= "Tr_"
            transient( InitialTime=0 Finaltime = 1e-7 increment=1.4
            InitialStep=1e-9 MaxStep=1e-6 MinStep=1e-25)
            {
            coupled{ poisson electron hole Temperature}
            Plot ( Time= ( 1e-13; 5e-13; 1e-12; 5e-12; 6e-12; 1e-11; 1e-10; 1e-9; 1e-8; 1e-7) noOverwrite )
    } 
}
Would anybody have an idea of what could I be doing wrong ?
Relevant answer
Answer
I had the same problem. Did you solve this problem?
  • asked a question related to Semiconductor Device Physics
Question
3 answers
I just started to study about Mott’s Formalism and as I was going through some prerequisite material for Variable-Range Hopping Conduction I read the following paragraph,
" Theories on non-defective non-doped semiconductors show that the Fermi level is positioned around mid-gap to obey the condition of charge neutrality in the material. In the case of band conduction in SiOx this would lead to an increase in activation energy with increasing x, from around 0.9 eV in a-Si up to around 1.5 eV for suboxides with x ≈ 1.5. Indeed, an increase in activation energy has been observed in several studies on the conduction of different silicon suboxides. In these studies the x dependence of the (room temper- ature) resistivity of SiOx is easily explained in terms of an increased activation energy within a band conduction model. "
Can someone please explain how does the band gap increase when x increases in Silicon Suboxides?
PFA the document I am referring to.
Thanks in advance!
Relevant answer
Answer
If the conduction is due to the intrinsic carriers , then
ni^2 is proportional to exp^-Eg/kT,
in case of intrinsic material n=p=ni
it follows that ni is proportional to exp^-Eg/ 2kT= exp ^- Ea/2kT,
The activation energy Ea in this case= Eg/2
Consequently as the energy gap increases the the activation energy increases.
It is so when the oxygen content increases the bond becomes stronger and the energy gap increases and consequently the activation energy.
This is the explanation of the statement in the question.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
7 answers
even though exp(EF-Eg)/KT) and exp(-EF)/KT) terms or very small
Relevant answer
The exponential term appears because the occupation probability of electronic sates in the conduction band follows the Fermi-Dirac energy distribution function
f(E)= 1/ ( 1 + exp (E-Ff)/kT)
In case that (E-Ef)>> kT
The above equation reduces to the form:
f(E)= exp - (E-Ff)/kT).
which is similar to the Boltzmann statistics.
I would like that you refer to the of Electron Devices.
It contains a chapter about the physics of the semicondcutor where these
formulas are explained on full details.
  • asked a question related to Semiconductor Device Physics
Question
8 answers
Dear all,
In TONYPLOT I am only getting the plots between different current and voltages.I want to know how to extract the values of Cgs and Cgd in SILVACO ATLAS device simulator. 
Thank You in advance.
Relevant answer
Answer
Barsha Jain Can you help me with the same? I am having the same trouble and i am unable to understand the code to calculate Cgs and Cgd. i am having trouble in understanding all the answers presented here.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
Hello,
Can anyone comment on the carrier mobility of SOI wafers?
I would presume that given the right process, e.g. wafer bonding, it shouldn't differ much from the mobility of bulk Si.
However, I haven't work with such wafers before and I'd appreciate experts' input before we purchase some.
Thanks,
Lior
Relevant answer
Answer
Thank you Aparna, the first one is link is most useful
  • asked a question related to Semiconductor Device Physics
Question
7 answers
How can I apply 'scharfetter-gummel discretization scheme' for quasi-fermi levels instead carrier concentrations?
Relevant answer
Answer
Apologies for the late response, hand not seen the response/question before. There is no source for it. I needed a numerically robust form for a Verilog-A model a colleague and I were developing, so factored out the "offending" terms that led to the 0/0 limit. The previous document was from my notes for that work, it was later published in the attached.
  • asked a question related to Semiconductor Device Physics
Question
14 answers
To calculate the saturation current of the metal/ZnO/Si heterojunction diode which one should be considered for the Richardson constant. For example, whether we should consider the Richardson constant of ZnO or Si.
Relevant answer
The Richardson constant depends on the effective mass of the emitting material. In case of Metal to vacuum one uses the effective mass of the metal as the metal is the radiating substance in the vacuum. IN case of M-S contact the Richardson consatnt will be that of the semicondcutor because the emission occurs from semicondcutor. This concept can be applied on and heterojunction with thermionic emission. The material which controls the emission is the material which imposes the the effective mass in the Richardson consatnt.
To see the origin of the Richardson constant please see the book in the book in the link:
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
4 answers
I know about abrupt and graded heterojunctions and have read about metallurgical junctions but I have not seen a good example of a metallurgical heterojunction. For example, how can one explain a metallurgical heterojunction using CIGS/In2S3 hetero-structure?
Relevant answer
Answer
There are two types of metallurgical junctions and therefore two types of electrical junctions. The homojunction where the junction is an interface between two differently doped regions of the same material such as silicon single crystal p-n junctions or GaAS p-n junctions.
The heterojunction is the interface between two different materials. These two materials are different semiconductors. Example CdS/ CdTe and Amorphous silicon over Single crystal silicon.
So, in summary metallurgical boundary between two different materials. Homojunction: junction in the same material formed by different doping. Heterojunction is formed by two different materials.
The grading may be around the metallurgical junction either by intermixing of the two materials around the metallurgical junction or by grading the doping in both sides of the metallurgical junction.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
10 answers
What is the substitute of Hall effect measurement (carrier concentration)?
Relevant answer
Answer
Alternatively, you can do confocal THz imaging. Depending on the scenario, sometimes its more reliable than electrical magneto-transport measurements. You can extract all parameters such as carrier type, carrier concentration, mobility etc. Unfortunately the setup is much more complicated than Hall measurements and only few places in the world has areal resolution of around 10 microns or so.
  • asked a question related to Semiconductor Device Physics
Question
3 answers
We are working with Sentaurus TCAD to simulate the electrical characteristics of the MOS devices. In case nano-particle embedded MOS system for memory cell application the C-V loops are experimentally measured by accumulation (A) to inversion (I) and I to A. The area of the loop indicate the performance on charge storing capacity of the devices. But in case of TCAD simulation we are unable to simulate the C-V loop. So, How to simulate C-V hysteresis loop for MOS capacitor with TCAD?
Relevant answer
Answer
I came late but as the question is basic my answer as follows:
In order to observe the C-V hysteresis of the MOS capacitor you need to subject your capacitor to an up scanning voltage ramp with relatively high speed and followed by down scanning ramp with the same speed. All what do you need to calculate is C= i/(dV/dt) where i is the current in the capacitor and dV/dt is the rate of the voltage ramp.
If you keep dV/dt constant during the scam you can display i as an indicator for C.
For controlling the hysteresis you need only to change the speed of the voltage ramp.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
This question might be too general. My solid-state physics background is limited so I cannot find another way to ask more specifically.
Nevertheless, I tried to make a specific question. I tried to calculate the effective density of states in the valence band Nv of Si using equation 24 and 25 in Sze's book Physics of Semiconductor Devices, third edition. The calculation used only the DOS effective mass of the valence band as the material parameter. The result is shown in attached file.
I don't know why the calculated Nv (1.02x10^19 cm^-3) is quite smaller than the Nv of Si given in Appendix G of the same book (2.65x10^19 cm^-3). 
Can someone tell me how they calculate Nv of Si? Is this measurable?
Thanks, Hung.
Relevant answer
  • asked a question related to Semiconductor Device Physics
Question
8 answers
Many literature reports on the increase in VOC when interfacial recombination is being suppressed, with little change to JSC and FF. How can we explain this strong relation between VOC and interfacial defect densities?
Additional question: The formula VOC = nkT/q ln(IL/I0+1) show shows that a decrease in recombination (either in bulk or at interface) will reduce the dark saturation current I0, which in turn increases VOC. However, I recall that some SCAPS simulations show how VOC is unaffected by changes in bulk defects, only the JSC changes. Are the simulations wrong, or is my understanding wrong?
Thank you so much professors and researchers!
Relevant answer
Answer
Dear Helen,
welcome,
The recombination in volume or at the interface of a heterojunction has two effects:
It can decrease the collected shortcircuit current and make it smaller than the photocurrent Iph which is the highest photocurrent to be collected.
But this reduction is observable when the built electric field can not dispatch the photogenrated electrons and holes before they recombine that is in their lifetime in the drift region. Or they can not diffuse to the field separation region before they recombine. This for the shortcircuit current.
It will only affected when the photogenerated carriers can no be collected before recombination.
- The other effect on the dark current specifically in the reverse saturation current.
The dark current is always suffering from the recombination either in the bulk or at the interface. It is so that the reverse saturation current increases with the decrease of the minority carrier lifetime in the volume or the increase of the recombination velocity at the surface.
This is the case when the solar cell can be modeled by a single diode model.
It is so that there is nonideal solar cell performance which makes it deviate from the single junction model. The presence of shunting resistance reduces the opencircuit voltage while will not affect the shortcircuit current to the great extent.
The presence of nonlinear ohmic consonants can reduce the fill factor and the shortcircuit current.
In spite of its importance very few researchers who payed attention to it.
and the complementary paper:
I devoted my self very early to explain the odd electronic phenomena in solar cells. The time came where these phenomena are evident in the new solar cell structures.
Helen if you find them useful recommend them for your colleagues and your students.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
3 answers
In today's class I saw how we calculate to find current and voltage with a very simple method but I tried this and the answer is not matching.
So I want to ask you give me some suggestion to solve problems with the help of these theorems..
Relevant answer
Answer
I guess u r talking about biasing analysis of that. If yes then yes u can do that
  • asked a question related to Semiconductor Device Physics
Question
8 answers
Hello
there is a p-type of HpGe detectors, this kind is characterized by the litium dead layer wich existe in the outer side of the detector cristal and it is increased with the passage of time ( dead layer= 0,7 mm if the detector is new ).
On the other hand, the n-ype of these detectors is characterized by a very thin dead layer ( in order of 10E-4 mm ) in the outer side and gross daed layer in the detector cavity.
Flowing our monte simulation of the n-type HpGE using MCNP gives a clair contrast with the expiremental results. where :
MCNP effeciency /Experemental effeciency <1 .
The insertion of the a dead layer ( dead layer depth= 0,08 mm) in the simulation improve the results especially in the <100 keV energy range.
My quation is, do what i did is correct ? and this value of the dead layer is reasonable after 20 years of functioning ? especially that in the leterature, the study of the dead layer of the n-type detector is rare and it is limited for the dead layer existing in the inere part (the cavity).
Regards
  • asked a question related to Semiconductor Device Physics
Question
8 answers
Hello,
I'm looking for a simple commercial solution for measuring C-V curves of simple MOS capacitors. This equipment is to be used in a student teaching lab.
The equipment should be reliable, affordable and easy to use, with its own program for running the measurement (i.e. not having to write LabView scripts).
For the sake of simplicity I can sacrifice fancy options such as multiple frequency measurements etc.
Any recommendations/thoughts/ideas?
Thanks in advance
Relevant answer
As a proposal for automatic capacitance measurement i would like that you use the developed 4- voltmeter method for measuring vector impedance. It is suitable to measure the the circuit elements Instead of the four voltmeter one can use a data acquisition card and a pc or laptop.
For full details please follow the link:
you can use the commertial RLC meters e.g. from keysight for example.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
I have a set of coupled ODEs:
J = mu*e*n(x)*E(x) + mu*K*T0* dn(x)/dx
and
dE(x)/dx = (e/eps)*[N_D(x) - n(x)]
These are the drift diffusion equation and Gauss's law for a unipolar N+ N N+ device. The doping profile N_D(x), the mobility mu, T0 are known. The DC current, J, is also known, as are the boundary values: n(0) = N+, N(L) = N+. I want to self consistently solve the above two equations using finite differences, but I am unsure how to go about doing so.
Thanks in advance!
Relevant answer
Answer
Hello,
I have written simple 1D drift-diffusion solver examples using finite difference and Scharfetter-Gummel discretization which you can find here:
I'm happy to answer any questions.
  • asked a question related to Semiconductor Device Physics
Question
12 answers
From Donald Neamen's book on " Semiconductor Physics and Devices (4th edition)", page 113 quotes Nc and Nv values to be 2.8 x10^19/cm^3 and 1.04 x10^19/cm^3 for electron and hole effective density of states in silicon at T = 300 K. The band gap of silicon is 1.12 eV ( T = 300 K). Using k = 8.625 x10^-5 eV/K and T = 300 K and using ni^2 = Nc Nv exp(-Eg/kT), the value of ni comes to be 6.806 x 10^9/cm^3 at T = 300 K where as for all non degenerate free carriers calculation for example calculating minority carriers from known majority carriers, a value of ni = 1.5 x 10^10/cm^3 at T = 300 K is quoted throughout the exercises and solved-out problems in this book. Even though the book is widely referenced for semiconductor device related courses in top ranked US universities at least for undergraduate program, this erroneous result (much too low value) of ni coming out of listed Nc and Nv values for silicon in this textbook through computation by using above equation, does not even come close to used value 1.5 x10^10/cm^3. In the other highly popular textbook " Advanced Semiconductor Fundamentals (2nd edition)" by Robert F. Pierret, page 113 quotes Nc and Nv values for silicon at T = 300 K to be 3.23 x10^19/cm^3 and 1.83 x 10^19/cm^3. Using Eg = 1.12 eV at T = 300 K and k = 8.625 x10^-5 eV/K and ni^2 = Nc Nv exp(-Eg/kT), value of ni comes out to be 9.696 x10^9/cm^3 which is much closer to be ni value 1 x10^10/cm^3 quoted by Pierret in his two textbooks for solved-out problems and exercises. R.F. Pierret's textbooks along with Donald Neamen's textbook are reference textbooks in many university teaching on semiconductor device physics and principles world-wide. The two textbooks written by R.F. Pierret provide more accurate analysis than book by Donald Neamen although I have recollection that Donald's textbook was included as reference textbook in undergraduate course instruction in Arizona State University Tempe, Arizona, USA. The books must be standardized with respect to precisional quoting of semiconductor device parameters from which other device parameters are extracted and accuracy of these values are important for both solved-out examples and exercise problems.
Sincerely,
Dr. Nabil Shovon Ashraf
Associate Professor
Department of ECE
North South University
Dhaka, Bangladesh.
Relevant answer
Answer
This has been a recurring problem in the literature. The most commonly used value in the past for the silicon intrinsic concentration was 1.45 x 10^10 cm^-3. Hence, the slightly simpler value in textbooks with a pre-factor of 1.5. Actually, scanning the literature it seems impossible to find out where 1.45 came from. Various paper have been published over the years, showing that the value should be closer to 1.0 (in fact, I know at least one textbook from the 1980's that used n_i = 10^10 cm^-3). The work by Sproul and Green (1990) did support this value. More recent work by Altermatt (2003) and even some prior work by others have suggested that the value might be even lower, perhaps 9.65 x 10^9 cm^-3. So you are right, most authors of textbooks have neglected to keep up with the literature and this keeps propagating inconsistencies. This said, textbook models for silicon do not describe silicon very well in general. This is the most widely used semiconductor but it has a very complicated band structure which does not make it a good prototype for simplified treatments. So, what we actually have in textbooks is a very simplified material model which on average behaves like silicon well enough for elementary purposes and which is fine for semi-quantitative or qualitative analysis. For sure one should never use textbook tables of parameters for advanced research purposes. There are other germane cases in different fields. In electromagnetism, textbooks use 3x10^8 m/s for the speed of light in vacuum, a value slightly higher than the official one but certainly easier to remember, although unphysical if one thinks about it. All works quite fine in most cases without detracting from pedagogy since dimensions are referred usually to units of wavelength. But just develop applications for lossy transmission lines (usually avoided in elementary courses but unavoidable in real life) and the minute error in speed of light may lead to spectacular differences for specific designs, with results which are not even close.
  • asked a question related to Semiconductor Device Physics
Question
16 answers
I am trying to get ohmic contact between Aluminum and p-type silicon (resistivity 1 to 10 ohm.cm). I did check IV with two separated Al contacts on top and it is showing ohmic nature. Also,  showing ohmic if taking two separate contacts on bottom of silicon. 
But, if i am taking one bottom and one top contacts, it is showing schottky. Here, bottom is instrument chuck ground. According to band diagram of Al/Si/Al, one junction will always give schottky behaviour in forward or reverse bias as i understood.
My goal to have bottom Al/silicon contact ohmic.
I am confused how do people check contact nature. Is it ok to check ohmic nature by taking two contacts on one side of wafer !.  
Relevant answer
Answer
Dear Shaimaa,
welcome,
In integrated circuit the most used metallization metal is Aluminum where it is used for metal contact of both n and p type silicon. To form an ohmic contact irrespective of the type of semicondcutor, it must be interfaced to the metal by heavily doped layer that is / Al/n+/n 0r Al/p+/p.
In this way you can use aluminum for both n and p-type silicon.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
4 answers
hello,
i did not see a convincing  interpretation of the series resistance effect of the
neutral region in any  paper or a physical book, the only interpretations seen
are  the semiconductor and contact resistivity, while these two interpretaions
are found incorrect by simulation. on the other hand deep trap in the neutral
region has a significant effect. 
Relevant answer
Answer
Dear Abdallah,
welcome,
The physical origin of the series resistance is that the majority carrier moves by the drift in the neutral region. So in these regions there will be an electric field associated with the majority carrier flow. This will cause an ohmic voltage drop. It is so that the pn diode is divided into three regions: a space charge region around the metallurgical junction and two neutral regions in the n side and in the p-side.
In addition to the ohmic resistance of the neutral regions, there will be the contact resistance of metal semiconductor contacts which also are made ohmic.
So, the series resistance of the diode is= Rn+Rp+Rc where Rn is the ohmic resistance of the n-side , Rp is that of p-side and the sum of all the contact resistances.
For more details about the series resistance please follow the book:
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
3 answers
I want to know how we can obtain turn-on voltage graphically from I-V characteristics of PN junction.
Relevant answer
Answer
Dear Shashikant,
welcome,
This answer may come late. To determine the cut in voltage of the pn-diode you make a linear plot of the I-V curve in the current range of interest.
Then, it appears as broken line with two pieces; one horizontal pieca and one inclined piece with the twp pieces are the best linear fit to the real I-V curve. The intersection point of the two pieces will be the cut-in point.
So, it is practical to find different values of the cut in voltage depending on the fitted current range. So, one has to give the cut in voltage with its valid current range.
For more information please see the link:
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
As we know, the connection of p-type and n-type semiconductors will form a pn junction between them. Along with this, a depletion region will be built. What my question is: what will happen if the size of semiconductor is decreased to a scale that is smaller than the length of the depletion region, i.e., how to draw the energy band diagram in this nano-system?
Relevant answer
Answer
If the thickness of the material is smaller than that of the deletion region, full depletion will occur where the depletion regions will be stopped by the ohmic metal contact. The contact difference of potential does no depend on the extension of the material. It depends on the contact difference of potential of the contacting materials.
The full depletion condition can be found in some electronic devices such as the fully depleted Silicon over insulator SOI field effect devices.It is used also in some types of enhancement MES metal semiconductor FETS.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
Hello guys
I am working on a project and my objective is to simulate a 3D nanowire with gate all around device and I am having a lot of problems with my simulations.
I was using some models that I think that are completely wrong, because I've read some articles today saying that I should follow the examples in the Atlas Quantum library.
My problem is that I know how to do the structure but I am not quite sure about the models, contact and doping patterns that I should use.. I just need some simple curves like Id x Vgs and Id x Vds. Do you guys have any recomendation about where I can see some coding examples ? Attached there is a picture that I found on Atlas Website (https://www.silvaco.com/products/vwf/atlas/device3d/device3d_br.html) and it is exactly what I have to do, but I just can't find the example related to this picture.
Relevant answer
Answer
Could you please help me in the command for how to make circular gate for GAA finfet.
  • asked a question related to Semiconductor Device Physics
Question
8 answers
Would someone please help me how I can calculate carrier mobility in graphene field effect transistor?  
Relevant answer
Answer
Dear Dr. Mark B Doost, thanks as always. I really appreciate your help. Heartfelt thanks...
  • asked a question related to Semiconductor Device Physics
Question
4 answers
Semiconductor device physics
Relevant answer
Answer
Faisal's answer is what actual device physics for how inversion charge or accumulation charge is formed but after looking into the question some more analysis needs to be added to completely answer this problem. For p-substrate enhancement mode n-MOSFET, gate is biased with positive voltage and n-type source and p-type substrate are either tied together to ground or separate ground potential is applied to both source contact and substrate contact. When depletion region is formed underneath the channel surface, mobile holes are depleted carriers. These carriers are pushed toward the substrate contact. As these carriers flow to the substrate, equilibrium of potential (bulk Fermi potential is generally referred as ground potential) takes place where carriers adjust with the natural acceptor dopants induced hole carriers already characterizing p-type substrate with acceptor doping (hole carriers majority). Some holes flow out through the substrate contact (as its contact potential is ground). When you zero bias the source and substrate contact, extra hole carriers and few electrons in the n-type source rapidly recombine to maintain the zero potential between tied source and substrate contact ( the current through the contacts between tied source and substrate with both at ground potential is also close to zero).
Please recommend my answer if you find it useful for your question.
Sincerely,
Dr. Nabil Shovon Ashraf.
  • asked a question related to Semiconductor Device Physics
Question
5 answers
I have used the Kubelka-Munk function and Tauc plot. But when I get the band gap value, compare with published results, the value is smaller. Maybe Kubelka-Munk function is not suitable for all samples. Are there other effective methods to calculate the band gap from reflectance?
Relevant answer
Answer
same problem
  • asked a question related to Semiconductor Device Physics
Question
10 answers
A significant voltage drop has been found between two I-V measuremnts of a solar cell. The test sequence is : initial I-V measurement --> 20 sec carrier injection through forward bias --> current off  and waititng for 1.5 sec--> I-V measurement.
The voltage drop varies among solar cells, the maximaum drop can even up to 4.5 mV and the minimum is about 0.1 mV.
Does any one can help to verify if this is a result of heat dissipation or a capacitance effect? and if it is possible to avoid the gap?
Thank you!
Relevant answer
Dear Chia,
welcome again,
I may doubt my understanding to your experiment. So , i searched further for the cause of the slight increase of the open circuit voltage of your solar cells. It may be because of heating effect as junction heating effect can reduce the the open circuit voltage. The case temperature can be held constant while the junction temperature can increase according to power dissipated in the solar cells. This theory can be verified by increasing the current in the solar cell. If the voltage drops by larger quantities this means that it is a temperature effect.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
7 answers
How is overdrive voltage (difference between gate voltage and threshold voltage) of a transistor related to temperature? I understand that threshold voltage decreases with increase in temperature. Based on this, can I say that overdrive voltage increases with increase in temperature?
Relevant answer
Answer
Arjun: Some other facts wanted to share since I believe your question is with regard to NVM memory programming and erasure speed enhancement by operating at higher substrate temperature, that is what I am guessing. Although programming and erasure both are done by currents from gate to channel, if channel hot carrier method is used, carrier carrier scattering at higher temperature will randomize the mometumn and the carrier velocity will not be as high as 300 K value to surmount the oxide barrier. As band gap narrows with higher temperature, conduction band oxide barrier is reduced and this will enhance F-N tunneling based programming and erasure. So at higher temperature F-N tunneling might give faster programming and erasure speed than channel hot carrier programming which is strictly inefficient at higher temperature. Problem is when charge retention needs to be longer and since conduction band barrier offset to oxide is reduced for narrowed band gap, charge loss and leakage for sustained memory set operation cannot be avoided. I do not know whether you contemplated your thought at this aspect of analysis.
Sincerely
Dr Nabil Shovon Ashraf.r
  • asked a question related to Semiconductor Device Physics
Question
11 answers
Hope every thing going ok in ur life.
My project is on simulation of a AlGaN based p-i-n uv photodiode structure. I simulated in ATLAS(silvaco) and when I wanted to get dark current from that..
my code and a pic from it attached. 
hope someone will reply with a good answer. Thank You in advance.
Relevant answer
Answer
I would like to help you in this just inbox me. I never worked on
p-i-n photodiodes but I could work on it .
Regards
  • asked a question related to Semiconductor Device Physics
Question
4 answers
It is noticed repeatedly that, the Al/n-SiC contacts are exhibiting both p- and n-type Schottky barriers even though the contacts are prepared under the same conditions. Why is it happening? How to go about it?
(Here the SiC substrate is n-type and highly doped >10^17)
Relevant answer
Answer
However, the results for not similar for all the contacts either before or after annealing. Further, the annealing temperature was kept not greater than 100 C.
Any explanation on "doping induced effects" or "effective work functions"?
(as Al acts as a p-type donor in SiC).
  • asked a question related to Semiconductor Device Physics
Question
12 answers
I'm looking for commercially available reverse blocking capability device e.g. ±800 V, 25A discrete device (e.g. RB-IGBT). Any idea? (no GTO or SCR).
Fuji and IXYS has but looks like they are obsolete!
Relevant answer
Answer
Recent publications resulting form application of RB-IGBT are:
They are interesting device and I'm still using it for some of the upcoming new circuit topologies.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
I have fabricated an all-inorganic QLED with FTO/NiO/CdSeZns/ZnO/Al. It has three conduction regions corresponding to Ohmic, Trap limited and space charge limited (SCLC). I expect the device to emit efficiently in the trap limited region and saturate in the SCLC region. But, the device emits efficiently in the SCLC region. Is there an explanation to this? Attached is the plot of current density and luminance (cd/m2) as a function of voltage.
Relevant answer
Answer
The electron flux density is= J/ q, where J is the current density and Q is the electronic charge, while the photon flux density is radiated optical power density per photon energy Eph.
So this quantity is proportional to the Lumenance divided by the current density. So, the best representation of the required function is to plot the lumenance versus current density in a linear scale.
The slope will be an indication of the required efficiency.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
The paper "Application Considerations for Silicon Carbide MOSFETs" downloaded from Cree's website says that, the transition from triode (ohmic) to saturation (constant current) regions is not as clearly defined as it is for the Si TFS IGBT. This is a result of the modest transconductance of the device. The modest amount of transconductance causes the transition from triode to saturation to be spread over a wider range of drain current.
The sentences above describe the difference of output characteristics of SiC MOSFET and Si TFS IGBT. But I cannot understand, please help me! 
Relevant answer
Answer
Dear Li,
welcome,
The conventional Si MOSFET, has three distinct regions of its output i-v characteristics; the linear region and the saturation region and a transition region between the two regions. By convention one divides the mode of operations of the device into the linear region and the saturation region.
The linear region till the onset of saturation is considered triode like.
In the conventional Si MOSFET transistor. the boundary between the linear region and saturation region is well apparent and well defined.
At this boundary the relation
VDS= VDsat= VGS- Vth,
If Vth is constant independent of the the operating voltages VGS and VDS, then one will observe the classical shape of the I-V characteristics with clear saturation of the drain current after the onset of the saturation point.
On the other side if it increases with the operating voltages then one would have a smeared boundary between the linear and saturation region with clear definition of this boundary and the whole characteristics may appear as a triode like.
In fact the low transconductance is not the direct cause of this phenomena since the transconductance is a behavioral parameter like the threshold the channel resistance. Really the variation of the drain current with VDS at constant VGS goes to the account of the channel Resistance.
The physical cause of this smeared performance is the lesser quality of the oxide layer in SiC devices.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
Dear Seniors and colleagues,
I tried fabricating a bulk heterojunction with TIPS-pc and QD, however my devices did not operate and showed constant drain current instead. It is a lateral top contact configuration, and the fabrication was done in air .. i did not perform the ligand exchange process and made the devices with varying ratios of TIPS-pc and QD
I am aware of the importance of ligand exchange process for better charge transposrt, but shouldn't the device at least show typical transistor behaviour even without it?
any insight into the issue will be greately apreciated
thank you.
Relevant answer
Answer
Dear Sara,
you can do the ligand exchange in the solution (toluene) phase by one phase exchanged. It depends on the ligand you use also.
But there is another issue if you use QD-ink (remove all long ligand typically OA) in case of hybrid devices with organic materials due to solvent issue. In QD-ink you need to use solvent such as DFM or Butlyamine (BA) etc. which known can damage your organic films. So you need to consider about the structure that you use also.
Good luck.
  • asked a question related to Semiconductor Device Physics
Question
12 answers
Dears,
In c-Si solar cells, charge separation is performed by the electric field in the PN junction. In Perovskite Solar Cells (e.g. TiO2/CH3NH3PbI3/Spiro-oMeTAD) how is the separation of free charges performed?
Thank you!
Relevant answer
Answer
Dear Respected colleagues,
Charge separation in perovskite solar cells occurs by the built in electric field in the intrinsic perovskite layer. This built in electric field is due to the contact difference of potential between the electron and the hole transport layers. This is assuming that the metallic electrodes form ohmic contacts with the transport layers.
Therefore, the transport mechanism of the short circuit current in the perovskite solar cells is similar to the transport in the pin solar cells. 
This is because the perovskites, on absorbing photons build excitons which are loosely bound like the metallic semiconductors for example silicon. Therefore, once generated they will be dissociated because of the thermal energy. 
The diffusion length of the minority carries will be of the order of one micrometer depending on the quality of the perovskite material, which is sufficient to collect the photogenerated carriers in an equal thickness of the material.
The carrier transport layers conduct the the carriers by drift and so they require some voltage drop to conduct their current. 
Therefore, their conductivity must be high enough to reduce their resistance.
  • asked a question related to Semiconductor Device Physics
Question
3 answers
I am trying to calculated optical properties of an insulator (LOPTICS=.TRUE.) using PBE0+ SOC (LHFCALC = T and LSORBIT = .TRUE.). However, there comes no output for the ' DIELECTRIC FUNCTION', though the calculation was completed smoothly and there is a line (cited) ' imaginary and real dielectric function'  in OSZICAR. But the OUTCAR stopped unusually.
What should I do with this ? Thanks in advance.
Relevant answer
Answer
Dear Dr. Jiang,
Thank you for your e-mail and information.
No I couldn't solve this issue using this approach.
Best regards
Changming
  • asked a question related to Semiconductor Device Physics
Question
6 answers
The high band-bending in the surface of n-GaN creates a "notch" for holes generated in a PL experiment that does not exist in the "bulk" underneath. This opens new ways to emit photons other than the band to band recombination that takes place in the bulk for example. Do we really need to "dope" the GaN bulk with trapping centres to explain a yellow emission in PL that can come from the GaN surface?
Relevant answer
Answer
Dear prof Izpura 
The answer to your question can be found here   http://aip.scitation.org/doi/full/10.1063/1.4975116
  • asked a question related to Semiconductor Device Physics
Question
6 answers
Unfortunately, due to proprietary concerns, I don't think I can share the data I'm talking about, but I have recently come across IQE data for a solar cell with a fairly straightforward silicon and silicon germanium design (regular Si cell with a single thin layer of another Si-based material) which appears to have a clear resonance, that goes above 100% IQE, at about 350 nm and 450 nm.  
What are the reasons for this?  In the presence of quantum wells I would expect the possibilities for resonances at long wavelengths, however what would cause such a feature to occur at short wavelengths?  Naively this would suggest carrier multiplication but how, why and why a resonance?
I believe reproducibility is an issue, meaning it seems to be something of a fluke occurrence.   At most there may be a single very small quantum well or potential/heterojunction barrier in the system in the emitter region, beyond that nothing exotic.
Anyone have any insights?  
Is there a known cause of such features (IQEs above 100% at short wavelengths of ~300-500 nms)?
Relevant answer
Answer
I agree with Ali ...... You can check the instruments or results twice..... I think some wrong measurements was there :) 
Here is a book of recent measuring techniques 
  • asked a question related to Semiconductor Device Physics
Question
5 answers
For silicon solar cell diffusion length can be calculated using dark log J vs. V plot using the formula of saturated current density 
j0 = (q n Dp) / Lj
where j0 is calculated from intercept of linear region straight line on log J axis.
Relevant answer
Answer
Dear Sapna,welcome again.
You can assume that the recombination current in the amorphous layer is much larger than the recombination current in the substrate as the minority carrier life time in the amorphous layer is much smaller than that of the substrate. However you have to bring an evidence for this assumption.
One of the methods to estimate the lifetime in the different regions of a pn junction is the open circuit voltage decay with time. You will find a fast decrease of the open curcuit voltage followed by a its slower decrease.
Small signal impedance as a function of frequency or the so called impedance spectroscopy can be used also to differentiate between the lifetime in the base and in the emitter.
Best wsihes
  • asked a question related to Semiconductor Device Physics
Question
6 answers
the P-I-N photodiode exist in market
cataloge information is available
C-V & I-V and another curves is available
Relevant answer
Answer
First of all, in pin photo diode, intrinsic region is fully depleted and depletion region capacitance, Cdep = permittivity of the material * A/W 
where A= cross sectional area and W = width of the depletion region 
From the above equation we can find W and t_drift=W/ V_d where V_d=drift velocity
which is a function of applied electric field (depends on applied voltage and particular material system) 
(Chapter 5: photo detectors) 
I hope it will help you 
  • asked a question related to Semiconductor Device Physics
Question
2 answers
I have simulated a MOS with electrodes at the gate, bulk, source, and drain, shown in Figure 1, attached.
When a gate voltage is applied, the conduction band energy at the surface of the bulk lowers, as expected because of band bending. This I understand. 
However, when a voltage is applied to the drain region, suddenly the conduction band energy in the source region increases, as seen in figure 2. Why is this? Furthermore, why does Ec decrease linearly in the red graph?
Relevant answer
Answer
Alexander, provide Fig.2. May be it due to the internal electric field in the area of n+/intrinsic boundary, so some increase of band potential occured under the gate from the source side. It is common for FETs. 
  • asked a question related to Semiconductor Device Physics
Question
2 answers
In organic solar cells, we can calculate hole or electron mobility using SCLC. Electron mobility is related to electrical conductivity with the conductivity equation, and we can calculate electrical conductivity once we know the carrier density. If the carrier density isn't known, would we some how be able to measure electrical conductivity directly with a technique like SCLC?
Relevant answer
Answer
SCLC measurements of conjugated measurements on conjuagated polymers are
described in: Nano Lett., 2008, 8 (6), pp 1602–1609
Conductivity of  such polymers can be easily measured (without knowledge
of charge carrier concentration and mobility)
eploying microwave contactless measurement techniques:
Meas. Sci. Technol. 24 (2013) 062001 (13pp)
  • asked a question related to Semiconductor Device Physics
Question
5 answers
For Pentacene small molecular (semiconductor), May I ask what was the highest hole mobility result you have ever seen? 
What is the highest hole mobility of published results so far in the paper?
Relevant answer
Answer
The effect of gate dielectric deposition at different vacuum conditions on the field-effect mobility of pentacene based organic field effect transistors
this one!
  • asked a question related to Semiconductor Device Physics
Question
7 answers
I am trying to do transistor simulation in nanometer dimensions and have to apply quantum corrections based on 1D schrodinger solver.Can any one help me with this??
Apart form defining Nonlocal mesh in math section and activating Schroedinger in physics section, is there some other factor to be taken care??
While executing simulation, only poison , continuity equations are getting solved
Thank you
Pournami
Relevant answer
Answer
Has any of you solved the problem? Please let me know. Thanks. 
  • asked a question related to Semiconductor Device Physics
Question
20 answers
Will the heat dissipation in a solar cell be the same in both conditions or higher in either of the conditions?
Relevant answer
Answer
Dear colleagues,
As some of you mentioned, the energy balance tells us that the heat source in a solar cell equals the absorbed power minus the electrical power generated (which is nul in short circuit (SC) and in open circuit (OC) conditions, note that it is maximum at MPP) minus the photoluminescence (PL) from the cell. The PL intensity is proportional to the excess carrier density so it is much larger in OC than in SC. Thus, the heat source in a solar cell is lower in open circuit than in short circuit. However, the difference is significative only if the cell efficiency is sufficiently close to the radiative limit (because in this case the fraction of radiative to non-radiative recombination is non negligible). To calculate limiting scenarios, the concept of External Radiative Efficiency (ERE) is interesting. An example can be found in the paragraph "Dependence on Voltage of the heat source and the cell temperature" in the book "Thermal Behavior of Photovoltaic Devices. Physics and Engineering".
Olivier Dupré
  • asked a question related to Semiconductor Device Physics
Question
2 answers
I have to simulate a device in 3D. I want to know how much is the maximum available lengths in x, y and z in SILVACO?
Relevant answer
Answer
thanks a lot
  • asked a question related to Semiconductor Device Physics
Question
20 answers
Recently I started to learn how to simulate tunneling currents in Sentaurus TCAD,but there seems to be some problems about the convergence.
I have adjusted Iteration,Digits, MinStep in SDevice command file.but they didn't work.
Is there anyone who can teach me what should I notice when I use  gatecurrent(Fowler),gatecurrent(Directtunneling) and nonlocal tunneling model to simulate tunneling currents in Sentaurus TCAD?
(The devices that I tested are just  simple Si(p)-SiO2-Si(p) and Si(n)-SiO2-Si(n) structures. Size:10nm-1.5nm-10nm , The simulation is 3D.)
Relevant answer
Answer
Yes you have to set them in a parameter file... e.g.
Electrode = "xy" {
BarrierTunneling { g = 0.933, 0.267 mt = 0.19, 0.49}
}
g  describe the ratio of the Richardson constant value you wanna apply to the 120A/cm²K²
so here for electrons 112 and for holes 32.
mt are the masses for electrons and holes.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
N is proportional to the exp(-E/(KT)), i fit the PL curve and found that the tail of PL is matched well with a Gaussian curve instead of exp(-E/(KT)).  so i cannot find the temperature and the carrier density relationship. only find the photon energy and the carrier density relationship. 
if I want to add the temperature parameter, how should i do?
Relevant answer
Answer
Is this PL from a QW? At what temperature?  If so, there are contributions from excitons and free carrier recombination. Each contribution can be approximated by a function as shown in the attached paper. If heavy hale and light holes are present each contribution/function is taken twice  (one for HH, one for LH).with the corresponding parameters.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
does one result from the other ?
is it dependant on device structure or material characteristics ? specifically if we are addressing photo-transistors ?
what methods are taken for the reduction of both recombination rate and dark current ?
Relevant answer
Answer
thank you for you recommendation, i will surely read the book 
  • asked a question related to Semiconductor Device Physics
Question
7 answers
Actually What type of hysteresis loop should be approprite for memristor such that it have maximum effeciency?? Means the width should be less or high ?? Then how we can optimize the thin film?? Plz refer some papers too.
Thank u
Relevant answer
Answer
Hello, Roy,
A maximum efficiency of a memristor would be achieved in IxV hysteresis with high difference in electrical current between the on- and off-states (high on/off ratio). Also, for efficiency, it would be required to provide low voltage as source for the devices. About the hysteresis shape, it can present many forms, with unipolar and bipolar behaviors.
An optimal thin film for application and maximum efficiency of the memristor would be a thin one, which can provide a maximum frequency of operation that these kind of devices usually require. A metal electrode with work function that allows better alignment with the semiconductor for better carrier injection would also be preferred.
Attached (links) you may find some papers that I recommend.
Cheers,
  • asked a question related to Semiconductor Device Physics
Question
2 answers
I have tried for simple p-i-n, but the subthreshold swing remains high as 72mV/Decade.Also the same models and method does not work for other TFET structure.Please help me out by specifying the proper models, methods and how to define qtregions to get accurate I-V characteristics.
Relevant answer
Answer
Two more comprehensive analysis on TFET devices that if you haven't read already, should peruse to aid in your research. There are two accomplished faculties in device modeling area working in ECE department of Georgia Institute of Technology, USA. They are Dr. Arijit RayChowdhury and Dr. Saibal Mukhopadhaye. They are ex-graduates of Jadavpur University. See if you contact them, whether they give some clues for your problem.
Sincerely,
Dr. Nabil Shovon Ashraf.
  • asked a question related to Semiconductor Device Physics
Question
8 answers
The difference in electron and hole mobility in inorganic semiconductor can be understand easily but it is very difficult to understand the electron and hole mobility difference in organic semiconductors.
Relevant answer
Answer
In inorganic semiconductors, charge transport occurs via band transport mechanism. Organic semiconductors being amorphous, lack long range order and hence charge transport occurs via a hopping mechanism.
There are two theories to understand charge transport in organic semiconductors. They being Gaussian disorder model and Polaron theory. In Gaussian disorder model, the rate of charge transfer between molecules depends on the distance between levels and the overlap of wave functions corresponding to the levels of the molecules. For hole transport, overlap of HOMO levels between molecules is required and for electrons it is the overlap of LUMO levels between molecules which determines charge hopping between molecules. In Polaron theory the rate of charge carrier transport is explained by Marcus theory of electron transfer. There are molecules which belong to either type.
The current in a device can be explained by above mechanisms only if it is space charge limited and not injection limited from the contact.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
As silicon has an indirect band gap at bulk.
Relevant answer
Answer
Dr M Ali, I think what you are suggesting is a general rule. Would you please eloberate it.
  • asked a question related to Semiconductor Device Physics
Question
1 answer
I am looking at explaining undesirable MOS behaviors in a metal-ferroelectric-structure. I recently tried characterizing the capacitance-voltage behavior of a Bi4Ti3O12/P-Si junction, using a unique BTO doping, and a ZnO interface layer between the thin film and the semiconductor. The C-V behaviour in the attached image shows MOS behaviours, which is irregular for ferroelectric BTO.  To determine if  this effect is due to a lack of ferroelectrcity or not, I measured the ferroelectric properties of the device using the triangular waveform method, also attached, which presents a non-saturated ferroelectric loop, with signs of strong dielectric contribution.
I was able to conclude that measurements using the triangular waveform voltage method produced evidence of ferroelectric domain switching, were-as the MFS structure indicates non-ferroelectric switching, and am currently attempting to explain this phenomena.
My main theory, is that the I-V measurements detected leakage currents up to 0.023 A/cm2 when the maximum voltage of 5V was applied to the MFS device. This leakage current is several orders higher than reported in undoped BTO, but is similar to that of BTO using similar dopants. Whilst, I have been unable to find any references, I do recall reading that ferroelectrics unpolarised due to high leakage currents. As the MFS using a significantly slower sweeping bias than the triangular waveform voltage, ferroelectric polarization would be lost due to leakage current discharge in the MFS structure., if anyone could confirm this theory, or present another solution, I would be incredibly grateful.
Best Wishes
David Coathup
Relevant answer
Answer
BTO on silicon is a type-II band offset (Amy, F. et al. "Band Offsets At Heterojunctions Between Srtio3 And Batio3 And Si(100)". Journal of Applied Physics 96.3 (2004): 1635-1639. This structure is leaky in nature and typical MOS depletion region should not be achievable. However, the other oxides like SiO2 underneath this leaky film can still show the type-I capacitance response. The model should be the ferro-electric capacitors in series with MOS. For the leaky structure the P-E extraction can be very tricky: 1) the depolarization field on semiconductor interface, 2) determination of actual surface potential and electric field across the ferro film 3) PUND measurements should be carefully done (look at Scott, J F. "Ferroelectrics Go Bananas". Journal of Physics: Condensed Matter 20.2 (2007): 021001. ) !!!! try P-U and N-D pulses to remove the leakage current. Also see Miller, S. L. and P. J. McWhorter. "Physics Of The Ferroelectric Nonvolatile Memory Field Effect Transistor". Journal of Applied Physics 72.12 (1992): 5999-6010. 
Also here is our recent work:
Bests,
  • asked a question related to Semiconductor Device Physics
Question
1 answer
I am working on traps where the i need to visualize the traps which ever i mentioned in the trap physics section. I am working on synopsys TCAD tool for SiC IGBT device simulation.
Relevant answer
Answer
Define
"TrappedCarDistrPlot" after physics section and 
Define 
"hTrappedCharge eTrappedCharge" in plot section.
Please refer page number 419 in SDEVICE user guide
Thank you
  • asked a question related to Semiconductor Device Physics
Question
2 answers
Somebody show me how i can extract and plotting the transitions energies of quantum dots structure using silvaco please
Relevant answer
Answer
Salam, Well u can calculate it from the energy band diagram which is can extracted from the structure image provided by silvaco
  • asked a question related to Semiconductor Device Physics
Question
3 answers
I am looking for a way to obtain contaminated silicon samples, mainly electrically active metallic impurities such as Cr, Cu and Fe. The passivation is critical to remove the surface recombination part of the lifetime. I need to obtain the SRH lifetime of the sample using IDLS. I am thinking along the lines of solution contamination, since I have certain solutions with known concentrations of metallic impurities. However, I would appreciate some advice on how to incorporate the same into the bulk.
Relevant answer
Answer
Hi Abhay,
Two other ways that have been used to intentionally contaminate wafers are (i) ion implantation followed by annealing, and (ii) the introduction of contaminates into the silicon melt.  The second of these requires a good relationship with a silicon supplier!
AlOx is an excellent option for surface passivation but you'll almost certainly need to apply the AlOx after the silicon has been contaminated.  Otherwise, it will prevent the contamination of the silicon, or its surface passivation will be damaged during the contamination process.
If you haven't access to AlOx deposition equipment (e.g. like PECVD or ALD), there are alternative ways to chemically passivate the surface of silicon wafers.
All the best for your experiments, Keith.
  • asked a question related to Semiconductor Device Physics
Question
5 answers
I guess this will probably depend on the medium through which you using. But I imagine that electron and hole transport cannot be distinguished between with a simple I-V measurement alone. It could be that contacts, materials, light illumination, temperature variance, could play a role in distinguishing the two... any help would be greatly appreciated.
Relevant answer
Answer
Hall measurements are the most common approach to answer this question.
Alternatives include phototransport (e.g. the Haynes-Shockley experiment), and Seebeck/thermopower measurements.
Each method requires its own assumptions, and I believe that they all require decent Ohmic contacts, which is sometimes not straightforward and sometimes overlooked.
  • asked a question related to Semiconductor Device Physics
Question
4 answers
I have read a fair few papers about this: defect models, papers that deal with demonstration of Fermi level depinning in Ge using certain top metal or MIS combinations. There is no doubt that the pinning position is near the valence band (VB) as I have confirmed this by experimentally measuring Schottky barriers for various metal/ Ge combinations (on both n and p type Ge).
Fermi level pinning is usually attributed to a distribution of donor and acceptor states near the VB forming a charge neutral level (~0.1 eV above the VB). 
Unlike GaAs, I could not find any intuitive explanation for the physical origin of these defects (antisite defects seem to be the main candidates that behave like donor and acceptor states in III-V's). Moreover, segregation of group V atoms at atomic terraces are known to create dipoles that could affect the surface workfunction and local charge. Together, these phenomenon may somehow account for fermi level pinning. However, in Ge, there's only one species (Ge atoms) so I'm finding it hard to understand how both types of defects may arise. Are point defects (interstitials and vacancies) alone sufficient to create this effect? Could you provide any references that may be helpful? Thanks.
Relevant answer
Answer
Srinivas,
The FLP at the surface of semiconductors due to the presence of high density surface states is an observed phenomenon. The complexity of this effect is that it depends on the surface properties of the material both chemically and geometrically. So, the findings may change from a laboratory to the other according to the surface treatment and the contacted environment. However there is studies of the germanium surface under well controlled conditions. Paul Handler and William M. Portnoy found that the surface of germanium has a strong p-type conductivity which is consistent with your observation of fermi level pinning at the surface near the valence band edge. They attributed this to : there is a two-dimensional surface state band at the surface which overlaps in energy a two-dimensional valence band just beneath the surface according to their expression in their paper at the link: http://journals.aps.org/pr/abstract/10.1103/PhysRev.116.516
I think this model can account for your experimental findings. An old paper but very useful.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
5 answers
i have just started working on how to make a TFT device deposited by spray and the measuring instrument we've got in my laboratory is  Autolab PGSTAT30/2 . we improvised on the third terminal using an external voltage source which goes to make contact with the gate, while the other two terminals is contacting the source and drains... The output so far has not be encouraging. I just want to know if there is in researcher out there who has done something on TFT using Autolab PGSTAT30/2... most importantly if what I am doing is right or wrong. suggestion and opinions will be kindly appreciated.
Regards
Relevant answer
Answer
Dear Abayomi,
In order to measure the transfer characteristics of any FET transistor you nee to hold its drain at a specified voltage say VDS= xx Volys. Then you have to apply a variable voltage power supply between the gate and the source to vary the the gate to source voltage. Then you need to measure VGS by a DC voltmeter  and the drain current IDS by a DC ammeter with the appropriate or automatic ranging.
Then you need two variable voltage power supplies and one DC voltmeter and one DC ammeter all with the appropriate measuring ranges and sensitivities. I am surprised that you want to send your specimens for measurements,
One thing to notice in the connections described by in your question. You must connect the source connected to gate and the source such that you have a common reference point as i described above.
Please display your measuring circuit diagram.
Best wishes
  • asked a question related to Semiconductor Device Physics
Question
3 answers
please explain to me the theory of charge transfer relate to work function because as I know, Schottky is about metal semiconductor junction.
Relevant answer
Answer
I agree with the previous comment, However, how do you know that you have a 'Schottky graph'? This implies thermionic emission. Note that this requires an ideality factor very close to unity (1.0x)
  • asked a question related to Semiconductor Device Physics
Question
6 answers
In Gate All Around Nanowire Junctioless MOSFET, it should be normally on device and the threshold voltage should be negative, so how by using the workfunction difference between metal gate and semiconductor it shifts the threshold voltage to positive value
Relevant answer
Answer
Thank you very much for your answer
  • asked a question related to Semiconductor Device Physics
Question
4 answers
I am not getting any gate leakage current in the output. I read in literature that gate leakage models should be used. There are options such as Fowler-Nordheim tunneling and Ielmini tunneling models but I'm not sure which one is appropriate for Al2O3.
Relevant answer
Answer
Thank you Peter... The confusion arose because the oxide is thick. Can I use parameters of SiO2 for Al2O3 considering both are oxides?