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# Semiconductor Device Physics - Science topic

Explore the latest questions and answers in Semiconductor Device Physics, and find Semiconductor Device Physics experts.

Questions related to Semiconductor Device Physics

The common architecture of optoelectronics,

**pn junction, can not be**simultaneous electroluminescent light emitter and light detector. Here, to implement these two functions in one pn junction device,**the direction of electrical bias should be switched**. Recently, in the metal-semiconductor-metal (MSM) geometry, the**Halide-Perovskite Light-Emitting Photodetector**has been demonstrated.It is my interest, are there

**any other examples in optoelectronics**where these two device functions (electroluminescent light emission and light detection) have been demonstrated simultaneously at the one specified applied bias condition?Please suggest some "easier" non-open-access journal/s, other than IEEE-TED, for publication in the field of device modeling and simulation of CMOS image sensors.

I have designed a CMOS image sensor device in TCAD and need to convert its equivalent model in a SPICE simulator to obtain the overall read noise of the designed pixel with backend electronics. Would I need to build the photodiode model from scratch in SPICE or can I use some already available PDK for the purpose?

If they are material dependent , what are the ranges for InAs, GaAs and AlGaAs materials?

I referred one thesis to determine the RI for binary and ternary semiconductor, where it is mentioned that formula obeys for reststrahlen region. I calculated RI for mentioned materials but I have confusion regarding the limits of formula.

I am talking about perovskite material. In optoelectronic application basically, we need a direct band gap material. so, if have any technique to convert this then please explain it in detail or give any proper references.

So, I have designed (MIS) structure with strong bands bending. I would like to know is there any eigen energies near an interface. Is it possible with Atlas? And how it is possible to take quantization into account during a simulation? By

*quantum*model?We are doing PEC experiments using 100 Watt xenon lamp with two electrode systems. In the formula ABPE (%) = [ J X (1.23 - Vapp) / Plight ] x 100. how to calculate Plight ? Should we use standard value 100 mW/cm2 for AM 1.5 system or do we have to calculate with respect to the our sample area? Also, please give the example calculation details for my case (Please see attached data in excel file).

Thank You...

In non-local measurements, we apply current between two leads and measure voltage on different leads away from the current leads. to calculate resistance, do we need to divide the non-local voltage by current - as such current is not flowing through the voltage leads?

can you please suggest good literature on non-local measurements?

Thanks

Is it possible to use a Current to Voltage Converter as a non-inverting amplifier?

While doped reservoir or source or drain the doping concentration describe by MOLAR FRACTION=5*10^(-3)

Dear all,

Here I am simulating TIPS-pentacene based bottom-gate top-contact organic thin film transistor (OTFT) using Synopsys TCAD. I am using Poole-Frenkel mobility model for TIPS-pentacene OTFT simulation. For linear reion, I got similar output current characteristics in experiment as well as in simulation however, in saturation region simulated output characteristics and experimental output characteristics differs.

How to mitigate this difference? Do I need to define mobility model for saturation region?

While simulating the effect of a heavy ion strike on a reverse biased SiC Schottky diode in Sentaurus 3D, I see totally different maximum lattice temperatures when simulating different time ranges or even by selection of different number of points to be plotted in the same time range. Everything else including the device structure mesh etc remains the same.

The three solve statements below provide three different temperature profiles -

Solve {

Poisson

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}

NewCurrentPrefix= "Tr_"

transient( InitialTime=0 Finaltime = 1e-8 increment=1.4

InitialStep=1e-9 MaxStep=1e-8 MinStep=1e-25){

coupled{ poisson electron hole Temperature}

CurrentPlot ( Time= (Range= (0 1.0e-8) Intervals= 200))

}

}

Solve {

Poisson

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}

NewCurrentPrefix= "Tr_"

transient( InitialTime=0 Finaltime = 1e-8 increment=1.4

InitialStep=1e-9 MaxStep=1e-8 MinStep=1e-25){

coupled{ poisson electron hole Temperature}

CurrentPlot ( Time= (Range= (0 1.0e-8) Intervals= 2000))

}

}

Solve {

Poisson

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron }

Coupled(Iterations= 100 LineSearchDamping= 1e-4){ Poisson Electron Hole Temperature}

NewCurrentPrefix= "Tr_"

transient( InitialTime=0 Finaltime = 1e-7 increment=1.4

InitialStep=1e-9 MaxStep=1e-6 MinStep=1e-25)

{

coupled{ poisson electron hole Temperature}

Plot ( Time= ( 1e-13; 5e-13; 1e-12; 5e-12; 6e-12; 1e-11; 1e-10; 1e-9; 1e-8; 1e-7) noOverwrite )

}

}

Would anybody have an idea of what could I be doing wrong ?

I just started to study about

*Mott’s Formalism*and as I was going through some prerequisite material for*Variable-Range Hopping Conduction*I read the following paragraph,*" Theories on non-defective non-doped semiconductors show that the Fermi level is positioned around mid-gap to obey the condition of charge neutrality in the material. In the case of band conduction in SiOx*

*this would lead to an increase in activation energy with increasing x, from around 0.9 eV in a-Si up to around 1.5 eV for suboxides with x ≈ 1.5. Indeed, an increase in activation energy has been observed in several studies on the conduction of different silicon suboxides. In these studies the x dependence of the (room temper- ature) resistivity of SiOx is easily explained in terms of an increased activation energy within a band conduction model. "*

**Can someone please explain how does the band gap increase when x increases in Silicon Suboxides?**PFA the document I am referring to.

*Thanks in advance!*

even though

_{ exp(EF-Eg)/KT) and exp(-EF)/KT) terms or very small}Dear all,

In TONYPLOT I am only getting the plots between different current and voltages.I want to know how to extract the values of Cgs and Cgd in SILVACO ATLAS device simulator.

Thank You in advance.

Hello,

Can anyone comment on the carrier mobility of SOI wafers?

I would presume that given the right process, e.g. wafer bonding, it shouldn't differ much from the mobility of bulk Si.

However, I haven't work with such wafers before and I'd appreciate experts' input before we purchase some.

Thanks,

Lior

How can I apply 'scharfetter-gummel discretization scheme' for quasi-fermi levels instead carrier concentrations?

To calculate the saturation current of the metal/ZnO/Si heterojunction diode which one should be considered for the Richardson constant. For example, whether we should consider the Richardson constant of ZnO or Si.

I know about abrupt and graded heterojunctions and have read about metallurgical junctions but I have not seen a good example of a metallurgical heterojunction. For example, how can one explain a metallurgical heterojunction using CIGS/In2S3 hetero-structure?

What is the substitute of Hall effect measurement (carrier concentration)?

We are working with Sentaurus TCAD to simulate the electrical characteristics of the MOS devices. In case nano-particle embedded MOS system for memory cell application the C-V loops are experimentally measured by accumulation (A) to inversion (I) and I to A. The area of the loop indicate the performance on charge storing capacity of the devices. But in case of TCAD simulation we are unable to simulate the C-V loop. So, How to simulate C-V hysteresis loop for MOS capacitor with TCAD?

This question might be too general. My solid-state physics background is limited so I cannot find another way to ask more specifically.

Nevertheless, I tried to make a specific question. I tried to calculate the effective density of states in the valence band Nv of Si using equation 24 and 25 in Sze's book Physics of Semiconductor Devices, third edition. The calculation used only the DOS effective mass of the valence band as the material parameter. The result is shown in attached file.

I don't know why the calculated Nv (1.02x10^19 cm^-3) is quite smaller than the Nv of Si given in Appendix G of the same book (2.65x10^19 cm^-3).

Can someone tell me how they calculate Nv of Si? Is this measurable?

Thanks, Hung.

Many literature reports on the increase in V

_{OC}when interfacial recombination is being suppressed, with little change to J_{SC}and FF. How can we explain this strong relation between V_{OC}and interfacial defect densities?Additional question: The formula V

_{OC}= nkT/q ln(I_{L}/I_{0}+1) show shows that a decrease in recombination (either in bulk or at interface) will reduce the dark saturation current I_{0}, which in turn increases V_{OC}. However, I recall that some SCAPS simulations show how V_{OC}is unaffected by changes in bulk defects, only the J_{SC}changes. Are the simulations wrong, or is my understanding wrong?Thank you so much professors and researchers!

In today's class I saw how we calculate to find current and voltage with a very simple method but I tried this and the answer is not matching.

So I want to ask you give me some suggestion to solve problems with the help of these theorems..

Hello

there is a p-type of HpGe detectors, this kind is characterized by the litium dead layer wich existe in the outer side of the detector cristal and it is increased with the passage of time ( dead layer= 0,7 mm if the detector is new ).

On the other hand, the n-ype of these detectors is characterized by a very thin dead layer ( in order of 10E-4 mm ) in the outer side and gross daed layer in the detector cavity.

Flowing our monte simulation of the n-type HpGE using MCNP gives a clair contrast with the expiremental results. where :

MCNP effeciency /Experemental effeciency <1 .

The insertion of the a dead layer ( dead layer depth= 0,08 mm) in the simulation improve the results especially in the <100 keV energy range.

My quation is, do what i did is correct ? and this value of the dead layer is reasonable after 20 years of functioning ? especially that in the leterature, the study of the dead layer of the n-type detector is rare and it is limited for the dead layer existing in the inere part (the cavity).

Regards

Hello,

I'm looking for a simple commercial solution for measuring C-V curves of simple MOS capacitors. This equipment is to be used in a student teaching lab.

The equipment should be reliable, affordable and easy to use, with its own program for running the measurement (i.e. not having to write LabView scripts).

For the sake of simplicity I can sacrifice fancy options such as multiple frequency measurements etc.

Any recommendations/thoughts/ideas?

Thanks in advance

I have a set of coupled ODEs:

J = mu*e*n(x)*E(x) + mu*K*T0* dn(x)/dx

and

dE(x)/dx = (e/eps)*[N_D(x) - n(x)]

These are the drift diffusion equation and Gauss's law for a unipolar N+ N N+ device. The doping profile N_D(x), the mobility mu, T0 are known. The DC current, J, is also known, as are the boundary values: n(0) = N+, N(L) = N+. I want to self consistently solve the above two equations using finite differences, but I am unsure how to go about doing so.

Thanks in advance!

From Donald Neamen's book on " Semiconductor Physics and Devices (4th edition)", page 113 quotes Nc and Nv values to be 2.8 x10^19/cm^3 and 1.04 x10^19/cm^3 for electron and hole effective density of states in silicon at T = 300 K. The band gap of silicon is 1.12 eV ( T = 300 K). Using k = 8.625 x10^-5 eV/K and T = 300 K and using ni^2 = Nc Nv exp(-Eg/kT), the value of ni comes to be 6.806 x 10^9/cm^3 at T = 300 K where as for all non degenerate free carriers calculation for example calculating minority carriers from known majority carriers, a value of ni = 1.5 x 10^10/cm^3 at T = 300 K is quoted throughout the exercises and solved-out problems in this book. Even though the book is widely referenced for semiconductor device related courses in top ranked US universities at least for undergraduate program, this erroneous result (much too low value) of ni coming out of listed Nc and Nv values for silicon in this textbook through computation by using above equation, does not even come close to used value 1.5 x10^10/cm^3. In the other highly popular textbook " Advanced Semiconductor Fundamentals (2nd edition)" by Robert F. Pierret, page 113 quotes Nc and Nv values for silicon at T = 300 K to be 3.23 x10^19/cm^3 and 1.83 x 10^19/cm^3. Using Eg = 1.12 eV at T = 300 K and k = 8.625 x10^-5 eV/K and ni^2 = Nc Nv exp(-Eg/kT), value of ni comes out to be 9.696 x10^9/cm^3 which is much closer to be ni value 1 x10^10/cm^3 quoted by Pierret in his two textbooks for solved-out problems and exercises. R.F. Pierret's textbooks along with Donald Neamen's textbook are reference textbooks in many university teaching on semiconductor device physics and principles world-wide. The two textbooks written by R.F. Pierret provide more accurate analysis than book by Donald Neamen although I have recollection that Donald's textbook was included as reference textbook in undergraduate course instruction in Arizona State University Tempe, Arizona, USA. The books must be standardized with respect to precisional quoting of semiconductor device parameters from which other device parameters are extracted and accuracy of these values are important for both solved-out examples and exercise problems.

Sincerely,

Dr. Nabil Shovon Ashraf

Associate Professor

Department of ECE

North South University

Dhaka, Bangladesh.

I am trying to get ohmic contact between Aluminum and p-type silicon (resistivity 1 to 10 ohm.cm). I did check IV with two separated Al contacts on top and it is showing ohmic nature. Also, showing ohmic if taking two separate contacts on bottom of silicon.

But, if i am taking one bottom and one top contacts, it is showing schottky. Here, bottom is instrument chuck ground. According to band diagram of Al/Si/Al, one junction will always give schottky behaviour in forward or reverse bias as i understood.

My goal to have bottom Al/silicon contact ohmic.

I am confused how do people check contact nature. Is it ok to check ohmic nature by taking two contacts on one side of wafer !.

hello,

i did not see a convincing interpretation of the series resistance effect of the

neutral region in any paper or a physical book, the only interpretations seen

are the semiconductor and contact resistivity, while these two interpretaions

are found incorrect by simulation. on the other hand deep trap in the neutral

region has a significant effect.

I want to know how we can obtain turn-on voltage graphically from I-V characteristics of PN junction.

As we know, the connection of p-type and n-type semiconductors will form a pn junction between them. Along with this, a depletion region will be built. What my question is: what will happen if the size of semiconductor is decreased to a scale that is smaller than the length of the depletion region, i.e., how to draw the energy band diagram in this nano-system?

Hello guys

I am working on a project and my objective is to simulate a 3D nanowire with gate all around device and I am having a lot of problems with my simulations.

I was using some models that I think that are completely wrong, because I've read some articles today saying that I should follow the examples in the Atlas Quantum library.

My problem is that I know how to do the structure but I am not quite sure about the models, contact and doping patterns that I should use.. I just need some simple curves like Id x Vgs and Id x Vds. Do you guys have any recomendation about where I can see some coding examples ? Attached there is a picture that I found on Atlas Website (https://www.silvaco.com/products/vwf/atlas/device3d/device3d_br.html) and it is exactly what I have to do, but I just can't find the example related to this picture.

Would someone please help me how I can calculate carrier mobility in graphene field effect transistor?

I have used the Kubelka-Munk function and Tauc plot. But when I get the band gap value, compare with published results, the value is smaller. Maybe Kubelka-Munk function is not suitable for all samples. Are there other effective methods to calculate the band gap from reflectance?

A significant voltage drop has been found between two I-V measuremnts of a solar cell. The test sequence is : initial I-V measurement --> 20 sec carrier injection through forward bias --> current off and waititng for 1.5 sec--> I-V measurement.

The voltage drop varies among solar cells, the maximaum drop can even up to 4.5 mV and the minimum is about 0.1 mV.

Does any one can help to verify if this is a result of heat dissipation or a capacitance effect? and if it is possible to avoid the gap?

Thank you!

How is overdrive voltage (difference between gate voltage and threshold voltage) of a transistor related to temperature? I understand that threshold voltage decreases with increase in temperature. Based on this, can I say that overdrive voltage increases with increase in temperature?

Hope every thing going ok in ur life.

My project is on simulation of a AlGaN based p-i-n uv photodiode structure. I simulated in ATLAS(silvaco) and when I wanted to get dark current from that..

my code and a pic from it attached.

hope someone will reply with a good answer. Thank You in advance.

It is noticed repeatedly that, the Al/n-SiC contacts are exhibiting both p- and n-type Schottky barriers even though the contacts are prepared under the same conditions. Why is it happening? How to go about it?

(Here the SiC substrate is n-type and highly doped >10^17)

I'm looking for commercially available reverse blocking capability device e.g. ±800 V, 25A discrete device (e.g. RB-IGBT). Any idea? (no GTO or SCR).

Fuji and IXYS has but looks like they are obsolete!

I have fabricated an all-inorganic QLED with FTO/NiO/CdSeZns/ZnO/Al. It has three conduction regions corresponding to Ohmic, Trap limited and space charge limited (SCLC). I expect the device to emit efficiently in the trap limited region and saturate in the SCLC region. But, the device emits efficiently in the SCLC region. Is there an explanation to this? Attached is the plot of current density and luminance (cd/m

^{2}) as a function of voltage.The paper "Application Considerations for Silicon Carbide MOSFETs" downloaded from Cree's website says that, the transition from triode (ohmic) to saturation (constant current) regions is not as clearly defined as it is for the Si TFS IGBT. This is a result of the modest transconductance of the device. The modest amount of transconductance causes the transition from triode to saturation to be spread over a wider range of drain current.

The sentences above describe the difference of output characteristics of SiC MOSFET and Si TFS IGBT. But I cannot understand, please help me!

Dear Seniors and colleagues,

I tried fabricating a bulk heterojunction with TIPS-pc and QD, however my devices did not operate and showed constant drain current instead. It is a lateral top contact configuration, and the fabrication was done in air .. i did not perform the ligand exchange process and made the devices with varying ratios of TIPS-pc and QD

I am aware of the importance of ligand exchange process for better charge transposrt, but shouldn't the device at least show typical transistor behaviour even without it?

any insight into the issue will be greately apreciated

thank you.

Dears,

In c-Si solar cells, charge separation is performed by the electric field in the PN junction. In Perovskite Solar Cells (e.g. TiO2/CH3NH3PbI3/Spiro-oMeTAD) how is the separation of free charges performed?

Thank you!

I am trying to calculated optical properties of an insulator (LOPTICS=.TRUE.) using PBE0+ SOC (LHFCALC = T and LSORBIT = .TRUE.). However, there comes no output for the ' DIELECTRIC FUNCTION', though the calculation was completed smoothly and there is a line (cited) ' imaginary and real dielectric function' in OSZICAR. But the OUTCAR stopped unusually.

What should I do with this ? Thanks in advance.

The high band-bending in the surface of n-GaN creates a "notch" for holes generated in a PL experiment that does not exist in the "bulk" underneath. This opens new ways to emit photons other than the band to band recombination that takes place in the bulk for example. Do we really need to "dope" the GaN bulk with trapping centres to explain a yellow emission in PL that can come from the GaN surface?

Unfortunately, due to proprietary concerns, I don't think I can share the data I'm talking about, but I have recently come across IQE data for a solar cell with a fairly straightforward silicon and silicon germanium design (regular Si cell with a single thin layer of another Si-based material) which appears to have a clear resonance, that goes above 100% IQE, at about 350 nm and 450 nm.

What are the reasons for this? In the presence of quantum wells I would expect the possibilities for resonances at long wavelengths, however what would cause such a feature to occur at short wavelengths? Naively this would suggest carrier multiplication but how, why and why a resonance?

I believe reproducibility is an issue, meaning it seems to be something of a fluke occurrence. At most there may be a single very small quantum well or potential/heterojunction barrier in the system in the emitter region, beyond that nothing exotic.

Anyone have any insights?

Is there a known cause of such features (IQEs above 100% at short wavelengths of ~300-500 nms)?

For silicon solar cell diffusion length can be calculated using dark log J vs. V plot using the formula of saturated current density

**j**

_{0 = (q n Dp) / Lj}where j

_{0}is calculated from intercept of linear region straight line on log J axis.the P-I-N photodiode exist in market

cataloge information is available

C-V & I-V and another curves is available

I have simulated a MOS with electrodes at the gate, bulk, source, and drain, shown in Figure 1, attached.

When a gate voltage is applied, the conduction band energy at the surface of the bulk lowers, as expected because of band bending. This I understand.

However, when a voltage is applied to the drain region, suddenly the conduction band energy in the

*source*region increases, as seen in figure 2. Why is this? Furthermore, why does E_{c}decrease linearly in the red graph?In organic solar cells, we can calculate hole or electron mobility using SCLC. Electron mobility is related to electrical conductivity with the conductivity equation, and we can calculate electrical conductivity once we know the carrier density. If the carrier density isn't known, would we some how be able to measure electrical conductivity directly with a technique like SCLC?

For Pentacene small molecular (semiconductor), May I ask what was the highest hole mobility result you have ever seen?

What is the highest hole mobility of published results so far in the paper?

I am trying to do transistor simulation in nanometer dimensions and have to apply quantum corrections based on 1D schrodinger solver.Can any one help me with this??

Apart form defining Nonlocal mesh in math section and activating Schroedinger in physics section, is there some other factor to be taken care??

While executing simulation, only poison , continuity equations are getting solved

Thank you

Pournami

Will the heat dissipation in a solar cell be the same in both conditions or higher in either of the conditions?

I have to simulate a device in 3D. I want to know how much is the maximum available lengths in x, y and z in SILVACO?

Recently I started to learn how to simulate tunneling currents in Sentaurus TCAD,but there seems to be some problems about the convergence.

I have adjusted Iteration,Digits, MinStep in SDevice command file.but they didn't work.

Is there anyone who can teach me what should I notice when I use gatecurrent(Fowler),gatecurrent(Directtunneling) and nonlocal tunneling model to simulate tunneling currents in Sentaurus TCAD?

(The devices that I tested are just simple Si(p)-SiO2-Si(p) and Si(n)-SiO2-Si(n) structures. Size:10nm-1.5nm-10nm , The simulation is 3D.)

N is proportional to the exp(-E/(KT)), i fit the PL curve and found that the tail of PL is matched well with a Gaussian curve instead of exp(-E/(KT)). so i cannot find the temperature and the carrier density relationship. only find the photon energy and the carrier density relationship.

if I want to add the temperature parameter, how should i do?

does one result from the other ?

is it dependant on device structure or material characteristics ? specifically if we are addressing photo-transistors ?

what methods are taken for the reduction of both recombination rate and dark current ?

Actually What type of hysteresis loop should be approprite for memristor such that it have maximum effeciency?? Means the width should be less or high ?? Then how we can optimize the thin film?? Plz refer some papers too.

Thank u

I have tried for simple p-i-n, but the subthreshold swing remains high as 72mV/Decade.Also the same models and method does not work for other TFET structure.Please help me out by specifying the proper models, methods and how to define qtregions to get accurate I-V characteristics.

The difference in electron and hole mobility in inorganic semiconductor can be understand easily but it is very difficult to understand the electron and hole mobility difference in organic semiconductors.

As silicon has an indirect band gap at bulk.

I am looking at explaining undesirable MOS behaviors in a metal-ferroelectric-structure. I recently tried characterizing the capacitance-voltage behavior of a Bi

_{4}Ti_{3}O_{12}/P-Si junction, using a unique BTO doping, and a ZnO interface layer between the thin film and the semiconductor. The C-V behaviour in the attached image shows MOS behaviours, which is irregular for ferroelectric BTO. To determine if this effect is due to a lack of ferroelectrcity or not, I measured the ferroelectric properties of the device using the triangular waveform method, also attached, which presents a non-saturated ferroelectric loop, with signs of strong dielectric contribution.I was able to conclude that measurements using the triangular waveform voltage method produced evidence of ferroelectric domain switching, were-as the MFS structure indicates non-ferroelectric switching, and am currently attempting to explain this phenomena.

My main theory, is that the I-V measurements detected leakage currents up to 0.023 A/cm2 when the maximum voltage of 5V was applied to the MFS device. This leakage current is several orders higher than reported in undoped BTO, but is similar to that of BTO using similar dopants. Whilst, I have been unable to find any references, I do recall reading that ferroelectrics unpolarised due to high leakage currents. As the MFS using a significantly slower sweeping bias than the triangular waveform voltage, ferroelectric polarization would be lost due to leakage current discharge in the MFS structure., if anyone could confirm this theory, or present another solution, I would be incredibly grateful.

Best Wishes

David Coathup

I am working on traps where the i need to visualize the traps which ever i mentioned in the trap physics section. I am working on synopsys TCAD tool for SiC IGBT device simulation.

Somebody show me how i can extract and plotting the transitions energies of quantum dots structure using silvaco please

I am looking for a way to obtain contaminated silicon samples, mainly electrically active metallic impurities such as Cr, Cu and Fe. The passivation is critical to remove the surface recombination part of the lifetime. I need to obtain the SRH lifetime of the sample using IDLS. I am thinking along the lines of solution contamination, since I have certain solutions with known concentrations of metallic impurities. However, I would appreciate some advice on how to incorporate the same into the bulk.

I guess this will probably depend on the medium through which you using. But I imagine that electron and hole transport cannot be distinguished between with a simple I-V measurement alone. It could be that contacts, materials, light illumination, temperature variance, could play a role in distinguishing the two... any help would be greatly appreciated.

I have read a fair few papers about this: defect models, papers that deal with demonstration of Fermi level depinning in Ge using certain top metal or MIS combinations. There is no doubt that the pinning position is near the valence band (VB) as I have confirmed this by experimentally measuring Schottky barriers for various metal/ Ge combinations (on both n and p type Ge).

Fermi level pinning is usually attributed to a distribution of donor and acceptor states near the VB forming a charge neutral level (~0.1 eV above the VB).

Unlike GaAs, I could not find any intuitive explanation for the physical origin of these defects (antisite defects seem to be the main candidates that behave like donor and acceptor states in III-V's). Moreover, segregation of group V atoms at atomic terraces are known to create dipoles that could affect the surface workfunction and local charge. Together, these phenomenon may somehow account for fermi level pinning. However, in Ge, there's only one species (Ge atoms) so I'm finding it hard to understand how both types of defects may arise. Are point defects (interstitials and vacancies) alone sufficient to create this effect? Could you provide any references that may be helpful? Thanks.

i have just started working on how to make a TFT device deposited by spray and the measuring instrument we've got in my laboratory is Autolab PGSTAT30/2 . we improvised on the third terminal using an external voltage source which goes to make contact with the gate, while the other two terminals is contacting the source and drains... The output so far has not be encouraging. I just want to know if there is in researcher out there who has done something on TFT using

**Autolab PGSTAT30/2...**most importantly if what I am doing is right or wrong. suggestion and opinions will be kindly appreciated.Regards

please explain to me the theory of charge transfer relate to work function because as I know, Schottky is about metal semiconductor junction.

In Gate All Around Nanowire Junctioless MOSFET, it should be normally on device and the threshold voltage should be negative, so how by using the workfunction difference between metal gate and semiconductor it shifts the threshold voltage to positive value

I am not getting any gate leakage current in the output. I read in literature that gate leakage models should be used. There are options such as Fowler-Nordheim tunneling and Ielmini tunneling models but I'm not sure which one is appropriate for Al2O3.