Operating Systems - Science topic

Firewalls

Antivirus Software.

PKI Services.

Managed Detection and Response Service (MDR)

Penetration Testing.

Staff Training.

The engineering philosophy behind Coq and the Coq kernel is well worth careful consideration:

MS Windows OS

Modern OS CPU Scheduling Iaka Dispatching or Thread Switching) can be all of the ones mentioned but some of the ones used in large mainframes successfully are workload related. OS2200 from Unisys (Formrerly Sperry Univac) used a n I/O load preferential method that would favour a User thread that initiated an I/O operation prior to the expiration of its previous CPU Quantum value. This tended to favour those user applications that were not CPU Dominant. Later in our development of the Operating System where NUMA architectures with large numbers of Cores, clustered on a NUMA Node sharing memory, we found there was an advantage to keep threads working on similar memory data sets together that used IP acceleration caches to avoid repeated trips to the memory module to fetch data for operations by the instruction processor. Mapping Instruction processors (Cores) by their respective NUMA Chip allows minimizing data collisions and refresh cycle losses. The Affinity manager in the Dispatcher Kernel code manages the position of the threads relative to their respective cores and nodes. Some Patents were issued on this architecture change that resulted in significant price/performance improvements for the systems in general

Hello, again, Uthpala Athukorala

My additional point when I was thinking about this problem more is that I would (if possible) us another measurement outcome and not only examination scores.

· User can keep in touch with the garden works.

· Monitor the fertilizers and chemical levels.

· Keep in touch with the safety and the good health of plants.

· To keep track on the Harvest.

· Can measure Humidity of soil.

· Measuring the temperature of the garden.

· Update and report in real-time to the cloud server.

For an example, let's take Deposit money to the Bank Account. The Depositor is the User Mode with purpose of deposit money. In User Mode depositor can't execute any processes. He or She has to give a system call to Kernel Mode which act as bank officer. Giving the money to the officer and give account details is the system call. Kernel Mode can access directly with any hardware and execute the process and display the outcome to the user. Which means officer do the processing part to complete the depositor call and tell him or her that process is complete. That means return the System Call. There is no user process without kernel mode, Kernel Mode is the ones who doing processing.

The Depositor - User Mode

Deposit Money - System Call

The Bank Officer - Kernel Mode

thank you for your answers, I reversed the picture, and set the particle size to 700( earlier was 0.05, way too small ), finally got the right number.

Though the process of the human body and the devices differs. When we think about the functionality of the body and the devices we can see some equalities. If a human wants to calculate a math problem first he will analyze and find the inputs for it and then he will process it through the brain then, at last, he will say the answer for it. Like that in a computer operating system if users want to open an application operating system will analyze it with the processor and it opens the application. But it only does what we tall it to do. but humans work and do things by thinking out of the box.

Hi Guido Ehrmann,

Thx for your suggestion. I'm going to look between Ubuntu Core and Rasbian.

IoT-specific protocols already exist at every layer of the OSI (open system interconnection) model, and the wide number of use cases across vertical industries guarantees that many new standards will emerge. The relatively high-ranking position of standards compared to other responses is a little unexpected because it is a more strategic issue and one that takes time, commitment, and investment to address. Therefore, it is encouraging to see that large enterprises recognize the significance of one of the more complex issues associated with IoT development. https://www.rtinsights.com/is-iot-development-that-different-from-web-development/

Interesting

Universal Analysis can be downloaded freely from TA website and installed on any computer. Probably, this should also work for TA Advantage that is currently used to control the instruments, but I never had this issue, so I cannot say that for sure.

For clear understanding of this subject, you can refer to my new paper which contains a complete and detailed information:

Nidhal Kamel Taha El-Omari, “Cloud IoT as a Crucial Enabler: a Survey and Taxonomy”, Modern Applied Science, The Canadian Center of Science and Education, published by Canadian Center of Science and Education, Canada, p-ISSN: 1913-1844, e-ISSN: 1913-1852, DOI:10.5539/mas.v13n8p86, 13(8):86-149, 2019.

https://www.researchgate.net/publication/334725286_Cloud_IoT_as_a_Crucial_Enabler_a_Survey_and_Taxonomy

Hi Goran,

Your best option is creating a windows service (.net) and using FileSystemWatcher class for file monitoring. It can be used to monitor network shares also. Anyway, as Rivalino said it can also be done creating file minifilter driver which resides in kernel space or try to use API hooking using Microsoft Detours package.

MS Windows Azure provides all three major services: IaaS, PaaS and SaaS.

Thank you all!

Thanks to all of you for your prompt response

Hi,

i suggest installing Openstack via the Kolla Project. Its a supported Openstack Project. It runs a full Openstack installation on ubuntu or centos. It supports several Openstack versions and additional projects.

I would say its the de facto standard of installing Openstack

Search on these valuable files

Anybody found anything new since I posted this question?

Obviously you are new to this. The first step to anything is coming up with a name. A name that can rally developers to your cause. Act fast, all the good names are taken. Without a name, you can't even market or sell or profiteer from your OS - and what good is that. ( Read Dilbert for details. )

The problem you have is pretty much it has all been done. Who wants to spend their time on re-creation rather than innovation. So you need a hook, something that is a minimally viable kernel.

So what is the thing that this new OS is to do better?

Back to Dilbert, you need a project you can market to developers as something worth working on. THAT is how you get other people to code your operating system. It also helps to have done some of the heavy lifting. That minimally viable kernel, that shows you are more than a dilettante or a provocateur.

So what is your pitch? Why do we need a new operating system, why do we need to code it for you? Go....

You can simply download a ready NS2 included virtual machine.

 

I fully agree that HW (when correctly designed) is the least likely to fail, at least the processor. Memory and power subsystems do fail (because designers are optimistic). Nevertheless, the responses I had until now mainly point to HW reliability data. Its my belief that the most system level failures (think embedded, safety/mission critical) are due to programming errors, I/O issues (related to data representation and range), power supply glitches. One can more or less attribute these further to incomplete specifications. E.g. in VirtuosoNext we now catch processor exceptions and recover very fast but the exception has an origin, typically memory violation (pointer errors), non-converging algorithms, numerical issues like overflow, etc. The issue is that in order to improve the situation and develop optimal fault tolerance strategies, one needs data. What is the probability of these happening? It looks like nobody, even the big avionics players, have such data. Of course, the scope is potentially very wide as many issues are process related, and ultimately education related. Still, I am surprised how large organisations keep repeating the same "mistakes". Many catastrophic failures in embedded, for example at ESA, are related to overflows of sensor data. Its easy to fix by clamping them and by modeling such a situation during design. 

thanks @U. Dreher for your answer.

@Rahis Kumar Yadav: Sorry, but that's not correct, and U. Dreher is right: Both "INC" and "DEC" cause cyclic counting, i. e. in the upward direction (INC) is the maximum value (0xFF for 8 bit) followed by the minimum value (0x00), and vice versa in the downward direction (DEC). INC and DEC work as well if you interpret the register content as two's complement numbers: Counting down, after 0 = 0x00 comes -1 = 0xFF.

P.S. @Rahis Kumar Yadav: On a second thought and reading the question again, you are right: After the execution of DEC R0 the content of the register remains 0xFF until another instruction changes it. ;-)

As a practical matter the measurements are intrinsic to the hardware.   There are testing tools which boot up on its own RTOS and will test the system.  In other words, this is a borrow, not build situation.  But if you insist on building, here is how I would approach it, apologies in advance for the too many words:  

To Samir's point, doing this in an arbitrary live OS is considerably more tricky.

You will need to use some method to enter a non-preemptable privilege time execution state - such as you might need to happen during an interrupt service routine.  The name used to describe this execution environment will vary from OS to OS.  

In linux they call this an "atomic context" - for obvious reasons - but also if you mess up the kernel goes nuclear.  For example, you cannot call any blocking functions, and using swapped out virtual memory?  Kaboom!

There are several examples of writing ISR's for Linux - find one you like.   You may, depending on the OS, be able to use an atomic context outside of an ISR, in which case you might be able to implement a kernel module implementing a procfs interface to interrogate the test code.  that makes running the tests and getting the results easy. 

You would basically disable interrupts while your test code beats up on the RAM.  You can still use the on-CPU super high resolution timer which does still advance during an interrupt blackout.   Provided the amount of time you stall the kernel is not too long ( single digit seconds ) you should be OK. 

Dear Bilal,

I suggest to you links and attached files in topics.

- Difference between CloudSim 3.0.3 planetlab power package and ...

- Fahimeh Farahnakian - Doria

https://www.doria.fi/bitstream/handle/.../TUCSDissertation215.pdf?... 

- cloudsim/Dvfs.java at master · Cloudslab/cloudsim · GitHub

https://github.com/.../cloudsim/.../cloudsim-examples/.../cloudsim/e...

-Green-Cloud Information Systems and Computer Engineering

Best regards

The data you want is in hardware based Performance Monitoring Counters.   These are typically NOT emulated by virtual machine environments because they are overhead and generally meaningless given the underlying caching statistics are maintained on a per core / package basis and the workload can be scheduled to run on a variety of cores, each with its own hardware level statistics.

Some virtualization technologies can emulate these counters.   It does so by taking a picture of the actual hardware counters on the cores currently running the workload.  Then when the workload is task switched off the core, the delta in the underlying physical counters is computed and applied to a virtual counter.   Since the underlyign time base is also virtual, computing pages fault per second, for example, is meaningless as you have no way to know if the workload was scheduled for a 100% duty cycle or 1%.   e.g. the meaning of 100 faults per "second" varies greatly depending on how much actual compute time the workload had available.

As mentioned by Peter, this housekeeping and also the diminished meaning / significance to the statistics makes it a futile effort in most cases.

You can, for example, in VMWARE ESX, enable PMC - with a lot of caveats.  Specifically it complicates live move comparability, as the guests cannot be migrated to a host with even seemingly trivial differences in PMC capabilities.  In EVC, where the guests are lied to, making all hosts seems like a lowest common denominator processor model / stepping, you cannot enable the counters because they cannot be reliably masked - the guest OS may still discover the counters are available on boot, then once the guest is migrated, an invalid opcode will be thrown on access.

So.... short answer: no.   long answer: yes, with animal sacrifices.

-- Bob

 Respected Himadri Nath Saha Sir,

I have already done the steps shown as in the above link. But still my error is not solved

I implemented myself a tool do this. Find the justification to start from scratch here

Hi Zakira,

I believe it could answer your question:

Cache Allocation Technology (CAT) in:

BR,

Fábio

Scheduling tools like TrueTime in MATLAB, TORSCHE Toolbox in matlab to understand the scheduling process

Dear Peter! Thank you very much for your answer.

I was looking just for a very simple approximation, and your ballpark estimate of thousands is good enough to me. I was looking for a way to understand the difference in complexity (in terms of number of instructions) between RISC microcontrollers with their 100 or so instructions and general purpose CPUs like the i7...

Dear Sir,

              There are several types of repairs. If you will apply copula repair policy, it would show better performance than that of general repair.

Why cant you try ns3 or ns2 with SUMO. As both the simulators have AODV. GPSR, DS R and DSDV protocol. Only way is you need to define your protocol in either of these simulators. But i have no idea on Veins

You can refer these papers.

Good luck.

Dear Gloria.

You can also see the work of this RG researcher :

You might want to check this out:

Dear Karima,

After setting the initial energy of your nodes, you need to update it according to an energy model such as the first order radio model or the discrete radio model. You need to select the energy model most appropriate to your nodes and application at hand.

Regards

TLB ==> Translation Lookaside Buffer?  If so, for the HW architecture(s) that I am familiar with, SW is unaware of a TLB miss and has no involvement.  Also, prefetch of instructions has no SW involvement at all -- this is a purely HW function.  The net result of either a TLB miss or a prefetch failure is a decreas in MIPS.  This is typically observed when a change in context occurs -- the machine execution slows down while the various caches, TLB, and pipelines are repopulated.  This can, of course, be mitigated with a branching pipeline design but it can never be eliminated.

ROS is a software package which help robotic researchers to do their works in offline (mostly). For using, it is not necessary to know mathematical background of the robot says kinematics and dynamics.

It has several advanced features which enable robotic researchers to work very easy and convenient way.

There are several things, better you start using and you will find the importance. It is not hard to learn as well

Highest priority is always given for 'command frame' when compared to the data frame. So channel is always ready to receive or transmit command frame which is used to control an action. Generally, this type of working mechanism you can find in papers based on wireless sensor and actuator networks.

Hi, I am not sure what you exactly need to accomplish but some basic tutorial on ADS configuration you will find here:

During the installation you will be able to set a path to database file by default it is: %SystemRoot%\System32\Ntds.dit

Here is info how to relocate the file http://blogs.technet.com/b/canitpro/archive/2015/04/01/step-by-step-moving-an-active-directory-database-to-a-new-location.aspx

unfortunately there is no general solution, the details of expected deployment system are essential in the next steps of solution design

Dear Shashikant,

I really doubt it works. The CUDA program must have access to the graphics driver, and from the description of PsExec it won't have. There may be other ways, if you have a Tesla card.

I have had a similar problem, and the best solution which worked great for me was the free TightVNC.

Hope it helps.

I don't know this "Interact" method specifically. But I'm assuming that it does not exist by default on WEKA and you want to implement it.

Before start you should answer to yourself these questions:

1) Are you confortable with Java programming language and object-oriented programming?

2) Is there other programming language in which your method is already implemented and is easy to use?

If you answer "NO" to question 1) or "YES" to question 2), I would suggest that you implement/use your method in other programming language and generate the modified database in an .arff or .csv file for posterior use in WEKA.

If you answered "YES" to question 1) and "NO" to question 2), you can implement your method as one of WEKA classes (maybe you can also share your code with the community).

Look in WEKA javadocs ... I guess you will have to implement a class using the "ASEvaluation" interface, then you can execute the feature selection through the use of a filter. For an example of class doing this, look at "ChiSquaredAttributeEval".

Regards,

Leno.

:)  ..... Will do.... Thanks again 

Hi I Putu Susila,

I just want to know whether contiki can be real-time. do you have an idea regarding this case?

thank you

Operating System has two major roles mainly i.e. as a hardware resource manager and as a virtualization of Harware resources. I would disagree that OS has noting to do with the UX and UI. Altough UX and UI may be not counted as OS's main functions, but it is important part of our everyday means of interaction with computers.

I would not mix realtime with quick processing. By defiition real time enables you only getting a guaranteed answering time. A guaranteed answer every 10 second would be also a real time process. So real time enables you that something is definitely happening also if the computer is very busy. So real time is something very usefull for data acquisition processes or to handle break conditions in a certain time window.

Hi: if i understood your question exactly, U can use the Tiny-Core linux dest. and its family. I hope that help.

Hello Raj,

    The first question to ask yourself is if you want to evaluate the overhead analytically or empirically. If you want to do an analytical evaluation then just look at the specification for Java RMI and RPC over DDS -- BTW notice that RTI-DDS is a DDS implementation not the Standard, you may also consider some more widely used and Open Source alternatives as OpenSplice (http://www.prismtech.com/dds-community).

If you are looking to do an empirical analysis then you can somehow estimate the temporal overhead performing some basic tests for small sample. The space overhead can be estimated indirectly by looking at the throughout delivered to the application vs. the bandwidth used on the network. In that case recall to take into account he protocol headers for level 4 and level 3, e.g. UDP + IP or TCP + IP.

HTH.

A+

Take a look at http://developer.android.com/reference/android/media/MediaRecorder.AudioSource.html

No, it is mutation not crossover that allows to avoid local minima in GA by introducing diversity in solution space.

Just search upon exploration and exploitation in GA.

I am not certain I clearly understand your question. From what I get, you should perform Worst Case Execution Time (WCET) analysis on the code of your runnables, which gives you a conservative estimate of the worst possible execution time of your runnables. Then using this, you must define or choose a scheduling policy (unless you are working with an OS which imposes one). Such policies include Rate Monotonic, Deadline Monotonic, Earliest Deadline First etc. and usually come with analytic criterion which help you figure out if your system is schedulable in the worst case under these policies (i.e. if any possible execution of your system respects the timing constraints placed on your tasks). Usually, such criterion work only for task systems without dependencies between the task instances, but there also exist techniques that allow you to build schedules (or test the schedulability of the system) even in the presence of dependencies. If you want I can point you to some publications tackling this problem of real-time scheduling with dependencies.

I hope this will help you.

Have a look at Valgrind, it is a very comprehensive tool for doing this sort of work (I think it should be able to do what you need):

The tools for cache behaviour analysis are particularly good IMO.

One way of looking at firmware is that it is fossilized software. One way of looking at hardware is that it is fossilized firmware. When you fossilize software you lose some of it's flexibility it becomes a static thing where the dynamics are set by bios settings or drivers that have to be loaded at run-time.

 A HDL Language or Hardware Definition Language is meant to translate software directly into hardware. I am not sure you could achieve the dynamism of a hardware/firmware/Software system with just an HDL language. To redesign even a fraction of the systems to the same HDL language OS would be a major undertaking because there are so many platforms out there, on which to place an OS.

Why do you want to take on all the platforms at once?

Aamir,

My misunderstanding. I don't have the materials only the reference where to get them.

Best wishes.

Janet

Computer processors are simulated as discrete systems due to their state transitions being governed by the clock. So there is no difference on simulating a MHZ or a GHz processor other than the running time of the simulation. There are many available simulators on line, some are able to simulate whole machines running Linux and others are more specific procensors internal components. You should define the specific kind of simulation you want.

A virtualization software isn't a simulator, it is a special mode of  execution of a processor which redirects some hardware instructions and contexts to a host operating system. 

Get rid of Windows and use Linux. It will be much more secure too. Equivalent applications are available for almost everything you might want to use, and for the occasional Windows application you can use Wine (a Windows emulator/API translator for Linux) or VirtualBox (a virtual machine which you can use to run a copy of Windows when you need it).

It is not dependent on the operating system but on the Simulator one is using. ns2 is a good simulator, open source, well documented  and internationally accepted platform WSN simulation. It works on Linux and may take some time for people to get familiarized to it. However, one can develop new protocols and by modifying the ns2 source code, simulate the performance of the developed protocol using. 

Thank you all for the suggestions.

Are you suggesting boot spash logo which would be BIOS or initial kernel boot in Debian which I think is what you tried.  I am not clear in what the objective is as I assume a user can switch to any Terminal runtime Crtl+Atl F1-F7. I did change BIOS and also fiddled with basic Linux to have a clean boot-up, with or without logo but depending on the runmode terminal I switched to gives feedback or blank or Logo with login prompt.  But what about remote boot via another terminal, what would you like to be displayed?  

You can manually ask the Linux kernel to perform an oomkill by triggering the appropriate system request, e.g.:

echo f > /proc/sysrq-trigger

Yes GCC 4.6 templates are much more optimized, intermediate code optimization is better, loop unroll is much more intelligent. For full report check: http://www.phoronix.com/scan.php?page=article&item=gcc_4248_intelamd&num=1

ARM processor are often powered by small battery when being used extensively in consumer electronics, including PDAs, tablets, mobile phones, digital media and music players, handheld game consoles, calculators and computer peripherals such as Hard drives, printers, and routers.

The new ARM cortex are more energy efficient than new Intel Atom processor But only in terms of GHz/ W), but it is only a simple 32 bit RISC, whereas Intel has a powerful 64 bit CISC architecture. 

Intel x86 processors can deliver up to 3.6 GHz while consuming up to 130 W, or at the low end 1.8 GHz at 40 W. The ARM line of chips has been reported to deliver 1 GHz at 700 mW [320] (down by x50 in terms of GHz/W) and can reach up to 2 GHz; while still consuming less than a watt (down by x 75 in terms of GHz/W), So thr power savings seem to be substantial.

It's a combination of the hypervisor software that uses emulation drivers (so that it can present well known hardware abstractions to the guest OS installed) as well as hardware features like Intel's VT-x and VT-d to accelerate this mapping from the hypervisor to the actual platform.  One important distinction is whether you are talking about a type 1 or type 2 hypervisor - i.e. one that runs on bear metal or one that runs on an OS and in turn allows you to install guest OS's, most often used for testing and convenience.  A simple way to learn about this is to just download Oracle Virtual Box (https://www.virtualbox.org/) and start installing guest OS's on you native Windows/Linux/Mac-OS-X system, but this is type 2.  To learn about a bare metal type 1, you'll need to try out VmWare ESX or Xen, or others that support bare metal install.  The type 2 are great for learning, teaching, testing, and general convenience.

First of all, I would like to mention that Ns-3 is not an extension of ns-2; it is a new simulator.  However, both simulators are written in C++ but ns-3 is a new simulator that does not support the ns-2 APIs. Some models from ns-2 have already been ported from ns-2 to ns-3. The project will continue to maintain ns-2 while ns-3 is being built, and will study transition and integration mechanisms.

ns-3 is open-source, and the project strives to maintain an open environment for researchers to contribute and share their software.

You can install on Linux OS and Cygwin. In addition, NS3.2 is the latest version with useful features.

I would agree with ROS, but it also depends upon your objectives. For education and entry level robotics, http://www.robotc.net/, is really basic and works with many education kits. ROS includes quite a bit of code and from my viewpoint not simple to embed it well into a simple system design. I prefer building up my own embedded Linux or FreeRTOS (http://www.freertos.org/) platform, bringing over key code libraries like OpenCV for computer vision, and building up my own sensor and actuator drivers and interfaces, but ROS is intended to save you this trouble. My observation though is that if you build and configure your own platform, you understand it well, it's just what you need and therefore more efficient, and you can run on a smaller and more efficient processor like TI-OMAP (Beagle boards and Gumstix), Raspberry Pi, or a Microchip MIPS processor.

I think when the time slice ends, and when there is an interruption (different from the time slice) are two different cases. The context switch which occurs in both cases hardly depends on the underlying hardware (CPU). The context switch depends on the number of registers, etc... In the case of the end of the time slice, the cost of executing the next task (for a time quantum) really depends on the cost of the scheduling algorithm and not only the cost of the context switch. Most of modern CPU can effectively read/write all the registers in a single instruction. This makes difficult to be able to optimize this part at the OS level.

I would suggest implementing it using a Filesystem in User Space (FUSE) under Linux (see http://fuse.sourceforge.net/). This way you can use normal development tools, debuggers etc. on your code (and it won't lock up your system if you make a mistake). You may also code in languages other than C if you wish. The API is well-documented and there are many example filesystems implemented in this way. You can benchmark performance of your proposed filesystem using well-known tools such as bonnie++, or using real filesystem-sensitive applications such as big databases, squid http proxy etc.

Alternatively you could look at some simulated operating system; maybe something like MOSS (http://www.ontko.com/moss/) might be suitable.

Hi,

It depends on the operating system. If you are talking about Linux then see "signal" in section 7 of the Linux manual:

"A signal may be generated (and thus pending) for a process as a whole

(e.g., when sent using kill(2)) or for a specific thread (e.g., certain

signals, such as SIGSEGV and SIGFPE, generated as a consequence of exe‐

cuting a specific machine-language instruction are thread directed, as

are signals targeted at a specific thread using pthread_kill(3)). A

process-directed signal may be delivered to any one of the threads that

does not currently have the signal blocked. If more than one of the

threads has the signal unblocked, then the kernel chooses an arbitrary

thread to which to deliver the signal."

Thus it also depends on your threads, if they block or not the SIGALRM signal. If you want to receive a process pending alarm with a specific thread, then only this thread should unblock the corresponding signal, and the other ones should block it. Be aware that the main thread (which corresponds to the main function in C) usually has the SIGALRM signal unmasked. This mask is inherited from the parent process if your process has been created through a fork(). By default the shell creates processes with SIGALRM enabled.

Hope it will help...