High Level Synthesis - Science topic

Xilinx System Generator supports a sufficiently large number of DSP blocks, ranging from simple adders, multipliers etc. to complex blocks such as FFTs, filters and memories, etc. supporting floating-point DSP. It is only limited to Xilinx FPGA products and requires manual conversion of Simulink floating-point numbers to fixed-point, which can be a time consuming and error-prone process.

An automated HLS flow allows custom logic designers to specify design functionality in high level programming languages for both embedded software and customized hardware logic on the SoC.

The LegUp high-level synthesis tool is freely available at http://legup.eecg.utoronto.ca/