Analog-Digital Conversion - Science topic

Thank You very much Aparna Sathya Murthy Maam!!

Thank You !! Aparna Sathya Murthy Ahmed Khalid Ahmed Asinger

Dr. Trauer, We were busy with a very similar question some time ago. Based on a literature survey, we concluded that there were six major (families of) obstacles: (i) exponentially growing . complexities (complicatedness), (ii) trade-off limitations (investments/efforts and benefits/gains), (iii) real-life coupling (interfacing, interoperation, and reliability), and (iv) computational performance issues, (v) verification and validity issues, and (vi) unclear responsibility (legal) matters. Seemingly, these are still valid in the present days. Regards, I.H.

Dear Ibrahim,

Please, the data sheet of the flowmeter and the DAC should be provided. Before you talk about the frequency output (-5:5v), what is your input parameter? But, if you have really considered the above parameter, the answer is No.

Here I have attached the spectrum plot of ideal adc and dac present in cadence. The resulting enob=0.293bits

Sinad=3.53dB

SFDR= 6.67dB

What mistake am I making?

Vin= 500mV(DC)+500mV(amplitude)+260k(freq)

Vpulse=0-5V (400nS period)

Thanks for your help with this Tomás Zarza !

I also have the same concern. Especially for analog signals.

Theoretically thousands years unless unexpected disasters occur...

Hello Hossein,

Yes, you are on the right track. And I further understand that you have sampled the input signal at 200SPS.

Well, can I invite your kind attention to your own answer a year ago where you have shown your various input signals via 1.png graphics file.

I can see that you had fed a 50mV signal with 1Hz, 10% duty cycle and have sampled this pulse signal with various rates as 50, 100 and 200 SPS rates.

Now you have acquired the technique as to how to sample the signal, get the data and analyze using some tools like MATLAB, you repeat the same 1Hz 10% square wave input and check how your ADC is responding in a similar way as the you have fed this SINC input.

And see what results you get? Hopefully you shall get what you have been looking for such a long period of time!

Bye the way kindly accept my belated Ramadan Greetings!

All the best!

-Prasanna

Another idea from under the shower: let the PC do the conversion of numbers into ASCII characters. Send your data in binary form.

Regards,

Joachim

I send a pdf file ,i think is useful

best wishes

Hi,

if I understand your experiment, you want to send the generated data using a serial port. The RS232 mentioned by you has its own protocol. The start and stop bit do not the transmitted data. The workflow of the RS232 port generates these bits themselves and, on the receiving side, the receiver protocol again removes the start and stop bits from the transmitted data.

The problem may be the speed of data generation and RS232 bandwidth (limited speed).

You can compare the input and output data of your experiment with the XOR circuit. If the coincident input and output bits are different, the XOR circuit will generate logic output 1. If you divide the number of logic 1 at the XOR output by the number of tranferred bits, you get the percentage of error tranferred bits.

thank you very much :)

Joerg Fricke is absolutely correct rdgarding the necessity to process samples from 10 s resp. 100 s long intervals. In your special case a high sampling frequency might be counter-productive: if your interest is on  the grid frequency, a comparably low sampling frequency might help to solve the problem (reduce the number of samples to process) - provided you've got an appropriate anti-aliasing filter. Otherwise aliasing effects might show up as frequency shift.

Hope this helps

P.S.: Haven't a python program as well. Don't think this is your problem.

Mohadese:

I am attaching some papers on simple to complex simulation environment of MATLAB Simulink to simulate a sigma-delta modulator. Some of these papers are very standard and highly cited. Hoping these papers will be useful for this project you are pursuing. 

Sincerely,

Dr. Nabil Shovon Ashraf

Assistant Professor

Department of ECE

North South University

Dhaka, Bangladesh.

Hi

you should pre-amplify the signal if its amplitude is very low and then filter it before its digital conversion by ADC. However, you can also directly model your ADC in MATLAB to evaluate its performance from FFT and see whether pre-processing of the signal is required or not.

I assume this is a chip design, not being built from discrete components?

Depending on the overall speed of the ADC pipeline, if you can stagger the clocks so that each stage is slightly shifted (by say half the inherent transition time of the circuit logic) then that will significantly reduce peak currents in the supply.

Actual timing would best be defined through simulation. For the chip layout software you are using there should be tools to do that.

Hi, well the buffer will add some noise (maybe around 0.5dB at worst), but you can characterize the LNA's NF with and without buffer, since your next stage is usually a downconversion mixer and not a 50 Ohm load.

We want an ADC to be as linear as possible fro every possible signal.

Except for subsampling ADCs, this means from DC to Nyquist.

Nyquist is often a worst case because distortions increase with the input signal's frequency.

Anyway, let's assume the highest test tone is 31/64*fs, slightly lower than Nyquist.

It is true that in about 2 samples it makes a full period. But it is also true that you can take for instance 1024 points. In that case, there will be 31*16 periods (ca 500) in the sample.

You normally want to use many more points than 1024, excpecially if the input signal is not at a coherent frequency (i.e., not exactly at 31/64) and is thus spread around the center through a sinc function.

Assuming a coherent input, H1 is at 31/64*fs. H2 should be at 62/64, but because this is in the second Nyquist band, it is aliased at 2/64. H3 should be at 93/64, in the third Nyquist band, and it aliases to 29/64...

Every Hn can be mapped at some frequency in the Nyquist band. The resulting spectrum is not the obvious spectrum of analog signals with equally spaced harmonics, but it results from it by aliasing.

Quantization noise tends to be white, though in ADC textbooks there are better characterizations.

Finally, you see noise, which is white, except around DC, where flicker dominates.

At Nyquist you also see the worst effects of phase noise (a perfect input tone, with power concentrated at one frequency, would be spread around the center). In this case 1024 points is not particularly useful due to limited frequency resolution.

Phase noise is worse at Nyquist because its distortion is proportional to the input frequency (i.e., 2*pi*fin*sigmatau).

No characterization can be made with two points. At least 64 in my example are required. But coherent sampling is easy. When it comes to an arbitrary input tone, you want the finest frequency resolution you can get, often tens of thousands of samples, at least.

Hi

Perhaps this document & homepage section can help?

There exists electronics that convert TTL pulses to sine wave output, where the peak-to-peak time distance is the angle output, though Matlab is then not part of the picture.

/Claes

Hello Manoj,

When you are comparing two ADCs from different vendors the comparison should be made on equal levels or with same parameters.

For ADS1191, although it is a 16-bit device, its sampling speed is 125sps to 8ksps.

On the contrary, AD9653 is a very high speed device capable of sampling at 125MSPS rate.

Therefore, keeping the sampling speed in view you make your own judgment as what signal frequency you want to sample or digitize at.

Then look at the data interface option - ADS1191 uses SPI interface with host micro (controller or processor) whereas AD9653 has differential serial interface with mostly suited for high speed interface/ data transfer. This should be governed by the controller or processor that you are using in your application to talk to the ADC.

Finally, pay attention to the cost.

Therefore, I would suggest you make a careful study of these and many other parameters such as power supply, input signal span, clock speed, etc. in making a choice for your application.

Thanks and best wishes!

Would be very happy to hear from you.

 Hello Rebanta,

Kindly note that MAX038 is a function generator IC with an additional provision of the on-chip phase-frequency comparator.

On the other hand CMOS CD4046 has a VCO and dual phase comparators.

The only worry I have is the frequency response of the phase comparators in CD4046 (or its variants). Therefore I would suggest rather different approach as to have a high-frequency ExOR (Exclusive-OR) gate as your phase comparator. particularly when your phase difference is very small. For frequencies in few tens of kHz range, the phase difference and related pulses are seen good but as the frequency approaches the MHz range, we need to be serious about the Tr and Tf of the logic circuits also.

Dear Anush,

Adding to Mr.Dreher, the successive approximation register SAR analog to digital converters are sequential circuits and therefore they must be properly timed. That is you have to be sure that the current event must be finished before you start the following one. It is so that you first sample the input analog signal in a time called the aperture time or the acquisition time, then you start the conversion process by initializing the shift register, read its contents, convert it to analog value and compare it with the value of the sample if it is smaller you increment the shift register by writing one to the second most position of the shift register. If it is larger you write zero in the most signification position of the shift register and one in the second most significant position, Then you read the content of the SAR and the process repeats again till you decide for the the least significant bit. It is c;ear now that the successive approximation needs precise control and timing circuit as it is a sequential circuits.

You have to consult the standard references in the A/D converter literature.

wish you success.

Hi Muhammad,

There is a series of precision ADCs, albeit on higher resolution side, from Analog Devices. It is AD77XX which are 24-bit serial ADCs with in-built programmable digital filter and serial interface and dual channel inputs. The sampling rate is also low, a few kHz and are specifically targeted for Stain-gauge and loadcell applications. Give a look and you should find it much suited for your job.

All the best again!

Dear Purnendu,

Yes,one samples 1024 samples in a time of Tsx 1024 and  convert them from analog to digital in Tcx 1024. Ts= i/5GHz and Tc= 1/ 33MHz. It turns out you can acquire only a portion of  the waveform  during the sampling time and overlook the rest of the waveform till the end of the conversion time. Then what do you deduced is okay.

What is the central frequency of your ultrasound transducer? We typically try to ensure that the sampling frequency of the ADC is at least 10 times the maximum frequency of interest. I would also advise you to check the effective number of bits (ENOB) of a front end before finalising your choice.

Kind regards 

Dr David Cowell

Thank you for the answer! We have solved the problem, there was one extra ground in the circuit and as you said the analog input was too less.

The SHARC from AD is definitly a safe choice however if you are looking for a good DSP that is moderate in price and easy to program my vote will go for the dsPIC starter kit from microchip.

ETS has already the TI microprocessor TMS... but every two or three years we have problems to adapt their software to our OI and TI can't help.

You can use TI ADS 7818 serial ADC with 500 KSPS sampling rate., 12 bit resolution.  Other serial ADC ADS 7883/7886 (1 MSPS sampling rate ) can also be useful.

The purpose of Gray codes in communications is that constellation points that are close together differ in as few bits as possible. This way, if you decode the "wrong" (e.g. neighbouring) constellation point, only few bits will be wrong. Note that these bits have no real meaning, they are just arbitrarily assigned to identify a constellation point.

In ADCs the bits have a meaning: all bits work together to represent one value. If a wrong value is measured, e.g. due to noise, the representation of this value (the bits) may be wildly different, but you are only interested in the meaning of the value. For example, the representation of 0111b is very different from 1000b, but 7 is very close to 8, so that's okay for an ADC.

Dear Ranjana Sridhar, Check the link below is useful for you or not! With best wishes, Good Luck!