Yogendra Joshi’s research while affiliated with Georgia Institute of Technology and other places

As power densities increase in heterogeneously integrated systems, with the introduction of new 3D architectures and the increasing number of transistors on chips, there exists a continued bottleneck for thermal management. High temperatures have a drastic impact on memory performances and refresh cycles. Moreover, thermal coupling between neighboring chiplets on a package is increasing as the types of chips on a heterogeneously integrated package diversify, and this, in turn, creates different heat flux densities within a heterogeneously integrated package. Thus, there arises a need for the implementation of efficient thermal design and solutions that cater to high heat fluxes within a package as well as different heights for different chip stacks within a package. In this paper, we present a parametric thermal design of heterogeneously integrated packages for high-performance computing. We focus on a 2.5D packaging structure, which includes components including artificial intelligence (AI) accelerators and high bandwidth memory (HBM) on a silicon interposer. Analytically and numerically, we investigate the thermal challenges stemming from high power density in stacked dies, variations in die heights, and cooling limitations at the package surface. To mitigate temperature gradients within the package, we propose a thermal-aware package structure, emphasizing the inside architecture. Also, the thermal coupling effect is studied for multiple cooling technologies on the outer surface using a thermal violation region graph. This research has shown that not only the internal structure of the package but also its ability to transfer heat to the outer surface has a significant impact on the thermal coupling effect. Using our approach, we can design package architecture systematically considering the external cooling environment in the early design stage.

As the capacity of electric vehicle (EV) battery packs increases and recharging times are reduced, effective battery thermal management becomes a key challenge. When exposed to elevated temperatures and non-uniform thermal conditions, insufficient heat dissipation within the battery module can detrimentally impact both its operational lifespan and performance, posing a potential risk of thermal runaway. Therefore, by reducing maximum temperatures and enhancing temperature uniformity through the batteries in order to improve lifespan and performance. Furthermore, depending on the specific battery cell technologies employed in EVs, battery swelling also emerges as a significant challenge as it can increase heat generation and drops in battery life. Thus, this paper develops a two-phase flexible battery thermal management system, enhanced with a copper microstructure, using a dielectric coolant (HFE-7000) to mitigate battery surface temperatures. The heat transfer performances were experimentally studied in a mass flow rate range of 4.5 g.s−1 to 11 g.s−1 with representitive heat dissipation values between 10 W.m−2 and 1.4 W.m−2 and shows the ability of the system to maintain average surface temperatures in a the battery optimal operational range between 25°C and 35°C.

Cities account for over 66% of global energy use and with over 68% of the population expected to live in urbanized areas by 2050, anthropogenic urban heat release is likely to become one of the most significant contributors to the creation of urban microclimates. In the present work, an open-source framework for one-way upstream coupled multiscale urban thermal environment simulations is examined and validated and can provide valuable insights about the flow behavior and energy transport between spatial scales. In this study, a city-wide multiscale model with over 500,000 building, road, and tree canopy data points parameterizing Atlanta, GA as a digital twin is developed and validated with a spatial scale of 5 m. The validated model is used to perform a parametric study on the implications bulk surface albedo has on the city's anthropogenic heat release in terms of heat flux. The study demonstrates that anthropogenic heat flux for building waste energy accounts for a small part of the total surface heat flux, and a detailed understanding of the components of urban heat (particularly with respect to total surface heat flux) is required to predict and simulate an urban thermal environment.

Coldplates are a crucial component in various cooling applications, such as cooling data center servers and power electronics. The unprecedented growth in electronics power density, along with the resulting ultra-high heat fluxes, demands a transition from single-phase forced convection to two-phase flow boiling heat transfer. The majority of studies in the literature have focused on flow boiling in fin-enhanced silicon microgaps and microchannels, with only a few addressing flow boiling in millimeter-scale heat sinks. In the present study, flow boiling of HFE-7200 dielectric fluid in a millimeter-scale pin-fin coldplate is experimentally investigated under non-uniform heating conditions. Four background heaters represent the low-dissipating-power devices. On the other hand, five hotspot heaters mimic the high-heat-flux devices and generate heat fluxes ranging from 50 W/cm2 to 1,000 W/cm2, corresponding to hotspot heat inputs ranging from 62.5 W to 1.25 kW, respectively. The coldplate's thermohydraulic performance is investigated for various flow rates and inlet temperature ranging from 0.5 L/min to 1.5 L/min and from 25°C to 60°C, respectively. A high-speed camera is utilized for a narrow field of view (FOV) flow visualization at a frame rate of 2229 fps, while a digital camera is used for a wider FOV at 60 fps. Flow visualization demonstrated the transition between bubbly, slug/churn, and stratified two-phase flow regimes.

Cooling presents a significant challenge for high-performance three-dimensional integrated circuits (3D ICs). To this end, this research explores through-silicon via (TSV)-compatible micropin-fin heat sink (MPFHS) for high-power 3D chip stacks. Copper TSVs with a diameter of 5.2 μm and a high aspect ratio of 29:1 are developed. An extensive experimental and computational investigation of the MPFHS under varying flow rates and power conditions was conducted, showing that the MPFHS maintains an average chip temperature below 72°C, even with a total power dissipation of 500 W and a power density of 312 W/cm ² at a flow rate of 117 mL/min. The minimum total thermal resistance achieved was 0.286°C·cm ² /W.

The unique properties of metal foams make them potential candidates for a range of applications, including microsystem thermal management. Using additive manufacturing to create foam-type structures can improve upon prior thermal solutions by eliminating thermal interface materials and allowing for customization/local control of parameters. In the present investigation, flow boiling in additive manufactured metal foams is investigated both experimentally and numerically. Two test samples, one with uniform structure and the other with pathways for vapor removal, are compared both experimentally and numerically. A conjugate computational fluid dynamics and heat transfer (CFD-HT) model utilizing a three-dimensional volume of fluid (VOF) model with accompanying evaporation/condensation model provided in-depth visualization of the boiling flow phenomena. The experiments generated the thermohydraulic performance over a range of heat fluxes, demonstrating that the sample incorporating dedicated vapor pathways performed better in both pressure and heat transfer performance metrics compared to the uniform foam. Additionally, negative system-level effects (i.e., hydraulic oscillations) were shown to be abated using the vapor removal structures. The numerical model yielded further insight into the factors contributing to the improved performance. Results indicated the pathways functioned as vapor removal channels, allowing the generated vapor to vent from the foam structure into the lanes. Further computational investigations demonstrated changes in flow regimes, where the addition of vapor channels caused the flow to change from churn to annular. Bubble behavior unique to the vapor pathway structure was studied, showing stagnant regions that eject vapor into the channel.