Wilkie Olin-Ammentorp's research while affiliated with Argonne National Laboratory and other places

Publications (20)

Preprint
It has been well-established that within conventional neural networks, many of the values produced at each layer are zero. In this work, I demonstrate that spiking neural networks can prevent the transmission of spikes representing values close to zero using local information. This can reduce the amount of energy required for communication and comp...
Article
Full-text available
Reinforcement learning (RL) is a foundation of learning in biological systems and provides a framework to address numerous challenges with real-world artificial intelligence applications. Efficient implementations of RL techniques could allow for agents deployed in edge-use cases to gain novel abilities, such as improved navigation, understanding c...
Preprint
Despite rapid progress, current deep learning methods face a number of critical challenges. These include high energy consumption, catastrophic forgetting, dependance on global losses, and an inability to reason symbolically. By combining concepts from information bottleneck theory and vector-symbolic architectures, we propose and implement a novel...
Preprint
In this work, we extend standard neural networks by building upon an assumption that neuronal activations correspond to the angle of a complex number lying on the unit circle, or 'phasor.' Each layer in such a network produces new activations by taking a weighted superposition of the previous layer's phases and calculating the new phase value. This...
Preprint
Reinforcement learning (RL) is a foundation of learning in biological systems and provides a framework to address numerous challenges with real-world artificial intelligence applications. Efficient implementations of RL techniques could allow for agents deployed in edge-use cases to gain novel abilities, such as improved navigation, understanding c...
Article
Despite drawing inspiration from biological systems which are inherently noisy and variable, artificial neural networks have been shown to require precise weights to carry out the task which they are trained to accomplish. This creates a challenge when adapting these artificial networks to specialized execution platforms which may encode weights in...
Article
Resistive Random Access Memory (ReRAM), a form of non-volatile memory, has been proposed as a Flash memory replacement. In addition, novel circuit architectures have been proposed that rely on newly discovered or predicted behavior of ReRAM. One such architecture is the memristive Dynamic Adaptive Neural Network Array, developed to emulate the func...
Conference Paper
In neuromorphic applications, resistive memory solutions (implemented as Resistive Random Access Memory or ReRAM) have significant potential in emulating the desired two-terminal synaptic functionality of real synapses. One of the unique features for the demonstrated ReRAM devices includes conductance modulation, which allows for the implementation...
Conference Paper
Approaching the training of spiking neural networks as a black-box optimization problem, we compare the performance of two evolutionary methods which must train the weights of topologically-fixed spiking networks towards different tasks. One evolutionary method is a 'traditional' optimizer, and the other is a natural evolutionary strategy (NES) whi...
Preprint
Reservoir computing is a subfield of machine learning in which a complex system, or 'reservoir,' uses complex internal dynamics to non-linearly project an input into a higher-dimensional space. A single trainable output layer then inspects this high-dimensional space for features relevant to perform the given task, such as a classification. Initial...
Preprint
Artificial neural networks normally require precise weights to operate, despite their origins in biological systems, which can be highly variable and noisy. When implementing artificial networks which utilize analog 'synaptic' devices to encode weights, however, inherent limits are placed on the accuracy and precision with which these values can be...
Article
Advances in integrated circuitry from the 1950s to the present day have enabled a revolution in technology across the world. However, fundamental limits of circuitry make further improvements through historically successful methods increasingly challenging. It is becoming clear that to address new challenges and applications, new methods of computa...
Preprint
Full-text available
Transfer entropy (TE) is a powerful algorithm which attempts to detect the transfer of information from one system to another. In neuroscience, it has the potential to track the movement of information through complex neuronal systems, and provide powerful insights into their organization and operation. One such application is the ability to infer...
Article
The recent surge of research on resistive random access memory (ReRAM) devices has resulted in a wealth of different materials and fabrication approaches. In this work, we describe the performance implications of utilizing a reactive ion etch (RIE) based process to fabricate HfO2 based ReRAM devices, versus a more unconventional shadow mask fabrica...
Article
Resistive Random Access Memory (RRAM) is a novel form of non-volatile memory that is expected to play a major role in future computing and memory solutions. We have developed memristive RRAM devices and integrated logic devices on a 300mm wafer platform with the IBM 65nm 10LPe process technology. The RRAM device consists of an inert tungsten bottom...
Article
Resistive Random Access Memory (RRAM) is a new class of electronic device whose resistance level can be modulated by feeding a current through the device. The resistance level (memory state) of RRAM devices is non-volatile, making them a viable replacement for flash memory. In addition, this characteristic can be utilized for various circuit level...

Citations

... In this work, I apply phase coding to execute artificial neural networks via spikes. This technique has been previously demonstrated, allowing for neural networks which can be trained conventionally in the complex domain and executed via networks of spiking resonate-and-fire neurons [11], [12]. Furthermore, the correspondence of phase-based representations with what is known as a 'vector-symbolic system' allows vectors of activations to be combined and manipulated algebraically. ...
... Yet another promising avenue is make the processes of classification and reconstruction (i.e., generation) of raw sensory data simultaneously. One particular realization of this idea, called "bridge networks, " was recently presented in [304]. Finally, it is worth mentioning that a neural network does not necessarily need to produce HVs, but it can benefit from the HDC/VSA operations by improving its retrieval performance through superimposing multiple permuted versions of an output vector, as demonstrated in [56]. ...
... A thorough survey on hardware accelerators is outside the scope of this paper. Interested readers can refer to [156], a review of accelerators and similar works [157][158][159]. However, we could provide the overview of different design aspects at the architecture level to speed up the ML computations ...
... Conversely, recurrence can be a source of instability and fragility when functioning as positive feedback but a source of stability and robustness when functioning as negative feedback [38,[53][54][55]. Inherent 'noise' levels in a neural circuit may also be mechanisms of maintaining robustness [56], and the work herein shows that robustness against noise can emerge with increased complexity. ...
... Here, hafnium oxide based memristors are considered for the synapse circuit design, which has suitable characteristics for analog memory [15]. There are four operations that can be performed on a memristor: FORM, RESET, SET, and READ. ...
... Next, the SET operation puts the memristor into a low resistance state (LRS). For the SET operation, a small range of LRS values from single KΩs to a few tens of KΩs can be targeted [16], [17]. While utilizing the HRS has benefits for implementing low power and a highly dynamic synapse [18], the inherent stochastic behavior of memristors in a HRS can be mitigated by strictly using a LRS. ...
... However, for neuromorphic applications it can be advantageous, as the processes that underpin biological synaptic and neuronal behavior are not strictly deterministic. 25 Figure 2(a) plots the conductance (using a read bias of þ5 V) as a function of the cumulative number of successively applied 50 ms voltage pulses (1000 in a positive sense followed by 1000 in a negative sense). Clearly, the conductance levels progressively and asymptotically increase, showing plasticity, as the number of positive voltage pulses increases, and then asymptotically decrease with the cumulative number of negative pulses. ...
... Returning to the earlier qualification that a higher target in-degree may increase the collective transfer from the target's set of sources taken jointly, we note that this was previously empirically observed by Li et al. [17], and over the sum of pairwise transfers by Olin-Ammentorp and Cady [48]. Analytically investigating collective transfer across a set of sources jointly for the VAR dynamics remains a topic for future work. ...
... The etching step may lead to material redeposition along the device's sidewalls. This material can form a leakage path next to the VCM-based memristive device reducing the resistance and the forming voltage and increasing the device's variability [1,1]. After manufacturing the TE, the memristor is pacified, which means that the device is isolated from the surroundings and the TE is connected to the metal layers. ...
... Memristive devices can be fabricated using traditional silicon processes as shown in Figure 9. Work at SUNY Polytechnic Institute has demonstrated the integration of transition metal oxide based memristors in the first metallization layers of a 65nm CMOS process. (19,20) To date, both HfO 2 RRAM elements and Hf 1-x Zr x ferroelectric tunnel junction (FTJ) structures have been integrated, specifically at the metal 1 (M1) / via 1 (V1) interface. Figure 9. 300mm wafer-scale integration of memristive devices with CMOS. ...