Venumadhav Bhagavatula’s research while affiliated with University of Washington Seattle and other places

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Publications (16)


Transformer-Based Tunable Matching Network Design Techniques in 40nm CMOS
  • Article

July 2016

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82 Reads

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8 Citations

IEEE Transactions on Circuits and Systems II: Express Briefs

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Venumadhav Bhagavatula

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A fully integrated transformer-based tunable impedance-matching network is described. The tuning network independently tunes the real and imaginary parts of the impedance. A test chip implemented in a 40-nm CMOS process achieves the resistive tuning range of one octave, making it suitable for shared Bluetooth/Wi-Fi power amplifier (PA) applications. The main sources of insertion loss are identified, and strategies to minimize the insertion loss while maximizing the tuning range of the real and imaginary parts are discussed in this brief.


An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers

January 2016

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237 Reads

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57 Citations

IEEE Journal of Solid-State Circuits

This paper presents a CMOS millimeter-wave (mm-wave) receiver designed to meet the challenges in low-power, ultra-broadband, phased-array systems with a large number of array elements. This receiver employs a high intermediate-frequency (IF) heterodyne architecture to reduce the frequency and power consumption associated with distributing a local oscillator (LO). The receiver operates over a bandwidth of 51–71 GHz, while maintaining 20 GHz of bandwidth along the signal chain of the entire mm-wave front end, through a high-IF stage, and to the baseband output. To maintain a high fractional bandwidth (fBW) throughout the signal chain, this receiver employs multiple gain-equalized transformers. Receiver measurements show an overall flat bandwidth response of 20 GHz, with a total gain of 20 dB, a minimum double-sideband noise figure of 7.8 dB, and an input 1 dB compression power of [Formula: see text] while consuming 115 mW from a 1.1 V supply. The test chip, implemented in a six-metal layer 40 nm CMOS process, occupies an area (including pads) of [Formula: see text] .


Fig. 1. (a) Canonical form of the LPDA (b) low-pass to band-pass filter transformation (c) canonical form of the BPDA. 
Fig. 2. (a) Norton transformation of a series floating inductor; (b) equivalent circuit for and ; (c) equivalent circuit for and .
Fig. 3. Derivation of the compact-area bandpass filter starting with the canonical bandpass filter (top figure) through the application of mirror-symmetric dual Norton transforms. 
Fig. 4. 
Fig. 5. 

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A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms
  • Article
  • Full-text available

May 2015

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2,276 Reads

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19 Citations

IEEE Journal of Solid-State Circuits

This paper presents the design of a high fractional-bandwidth millimeter-wave band-pass distributed amplifier (BPDA) implemented in a 40 nm (LP) CMOS process. A high-order load impedance with multiple resonant elements is often used to realize wideband amplifiers. However, these implementations require the use of numerous inductors which occupy a prohibitively large amount of silicon area. A mirror-symmetric Norton transformation technique which reduces inductor component values for a wideband amplifier, allowing an area-efficient layout, is described in this paper. The BPDA consumes 34 mW while providing a power-gain of 7 dB from 24-to-54 GHz with less than 2 dB in-band gain-variation. The BPDA has a measured 77% fractional bandwidth, a +11 dBm in-band IIP3, and an in-band noise-figure less than 6.2 dB, while occupying an area of 0.15 mm .

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An Integrated CMOS Passive Self-Interference Mitigation Technique for FDD Radios

May 2015

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2,411 Reads

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35 Citations

IEEE Journal of Solid-State Circuits

This paper presents an integrated passive self-interference mitigation (SIM) technique for FDD radios. A Four Port Canceller (FPC) serves a dual function as a receiver input matching network, and provides an auxiliary path from the transmitter (TX) to the receiver (RX) to perform leakage cancellation, with minimal penalty on the RX noise figure (NF), and power consumption. An example of this technique is applied to the design of a WCDMA front-end consisting of a low noise amplifier (LNA), the FPC, and an emulated power amplifier (PA) in a 40 nm, 6-metal-layer TSMC CMOS process. With proper tuning of the FPC and the use of an off-chip +30 dBm power amplifier, greater than 20 dB of TX leakage suppression is achieved over a cancellation bandwidth of 5 MHz.


Table 1. Table of comparison 
Fig.1 Low-pass distributed amplifier and low-pass to bandpass transformations
A compact 24–54 GHz CMOS band-pass distributed amplifier for high fractional bandwidth signal amplification

June 2014

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108 Reads

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8 Citations

This paper describes a compact 24-54 GHz two-stage band-pass distributed amplifier (BPDA) utilizing dual mirror-symmetric Norton transformations to reduce inductor component values allowing an area-efficient layout. The BPDA, implemented in a 40nm CMOS process, occupies an active area of 0.15mm2, has a 77% fractional-bandwidth, an overall gain of 7dB, a minimum in-band IIP3 of 11dBm, inband noise-figure less than 6.2dB while consuming 34mA from a 1V supply.


Fig.2. Four Port Canceller (FPC)
An integrated CMOS passive transmitter leakage suppression technique for FDD Radios

June 2014

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93 Reads

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15 Citations

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

An integrated passive transmitter (TX) leakage suppression technique is proposed for FDD Radios. A Four Port Canceller (FPC) serves a dual function as a receiver (RX) input matching network, and provides an auxiliary path from TX to RX, used for leakage cancellation, without degrading the RX noise figure (NF). The FPC is integrated with a low noise amplifier (LNA) and an emulated power amplifier (PA) in 40nm CMOS process. A cancellation of 23dB is achieved with a negligible power consumption and noise penalty.


Figure 2. a) Long-range wireless sensor devices, and the potential for networking scavenging; b) data transmission system (DTS).
Figure 3. a) Simple energy scavenging device with super-cap, and transmitter; b) regulation of sensor energy source; c) conceptual plot of LDO losses in sensor systems; d) conceptual diagrams of regulator-less PA and tunable matching network.
Figure 4. a) PA with tunable matching network (TMN) and power control loop (PCL); b) simplified schematic of PA first and second stages; c) power combining transformer with switch network.  
Figure 1. a) Collaborative mesh networks and direct transmission; b) potential beam-forming phased-array systems.  
Future Integrated Sensor Radios for Long-Haul Communication

April 2014

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149 Reads

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8 Citations

IEEE Communications Magazine

big data, techniques to acquire, communicate, and store sensor data will evolve to address new demands placed by a rapidly changing application space. Research and development on wireless sensor radio communication over the past decade has been largely focused on energy efficiency for short-range communication. However, going forward, sensor radios will require new modes of communication, which include leveraging existing network infrastructure and increasing the communication range of a single device. This article overviews several existing approaches for wirelessly communicating sensor data, followed by potential future strategies to enhance range and connectivity using single-chip wireless sensor transceivers. As an example of devices for longrange sensor communication, a regulator-less CMOS power amplifier specifically tailored for the demands of longer-range sensor data communication is described. This PA was designed to provide a fixed high-output power using a dynamic voltage supply as commonly found in sensor applications where an energy storage element (super capacitor) supplies the transceiver. The PA system is integrated in a 90 nm CMOS process, has a peak output power of 24 dBm, with an efficiency of 12 percent at 1.8 GHz, making this device suitable for data communication over distances of several hundred meters. As the PA supply varies from 2.5 to 1.5 V, the power control loop maintains a constant output power with an accuracy of ??0.8 dB.



A Fully Integrated, Regulatorless CMOS Power Amplifier for Long-Range Wireless Sensor Communication

May 2013

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1,141 Reads

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10 Citations

IEEE Journal of Solid-State Circuits

This paper presents a CMOS power amplifier (PA) system designed with the explicit goal of customizing a high-output power transmitter for sensor applications, where the supply voltage from an energy storage element is often time varying. The PA is intended for use in a long-range sensor transceiver and can operate directly off a super-capacitor source. A constant output-power, regulatorless, series power-combined PA with a fully integrated tunable matching network is implemented in an attempt to eliminate all energy losses associated with a high-current voltage regulator. The PA monitors the output voltage at the off-chip antenna and digitally modulates the PA load impedance to maintain a constant target output power as the super-capacitor discharges. The PA system, integrated in a 90-nm CMOS process, has a peak output power of 24 dBm with an efficiency of 12% at 1.8 GHz, making it suitable for sensor data communication over distances of several hundred meters. As the PA supply varies from 2.5 to 1.5 V, the power control loop maintains a constant output power with an accuracy of pmpm0.8 dB.


Analysis and Design of a Transformer-Feedback-Based Wideband Receiver

March 2013

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2,760 Reads

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17 Citations

IEEE Transactions on Microwave Theory and Techniques

This paper proposes a multistage transformer-feedback-based design approach for a high fractional-bandwidth (fBW) IF stage in a 60-GHz heterodyne receiver. An in-depth analysis of source-to-gate transformer-feedback amplifiers, including the design of the matching network, is presented. Analytic expressions for the input resistance, quality factor, and noise figure (NF) as a function of the transformer turns-ratio (n ) and magnetic coupling factor (k) are derived. To validate the proposed analysis, a wideband IF amplifier and mixer were designed in a 40-nm CMOS process. From measured results, this device achieves a 16% -3-dB fBW, a peak power gain of 27.6 dB, an NF of 5.3 dB while consuming 28.8 mW from a 0.9-V supply.


Citations (13)


... In Jeong et al. [27], impedance tunable IMN using a transmission line with variable characteristic impedance was presented, where the variable characteristic impedance was achieved by using parallel combinations of multiple transmission lines controlled by the RF switch. In Suvarna et al. [28], an integrated transformer-based tunable IMN was described. The real and imaginary parts of the impedance can be tuned independently. ...

Reference:

Design of Compact Complex Impedance Transformer with Frequency and Terminal Impedance Tunability
Transformer-Based Tunable Matching Network Design Techniques in 40nm CMOS
  • Citing Article
  • July 2016

IEEE Transactions on Circuits and Systems II: Express Briefs

... The additional transistors M3a/b have bias in the area of weak inversion region to provide the best IIP3. M3a/b has little impact on energy use, gain, NF, etc. because of the benefits of the PD design and with a low supplemental current of 0.4 mA, the simulated noise figure (NF) of the LNA is presented in Fig.11(c), showcasing the performance with and without the implemented post-distortion (PD) technique according to references [25] and [26]. ...

An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers
  • Citing Article
  • January 2016

IEEE Journal of Solid-State Circuits

... In applications where high accuracy is imperative, leakage current must be kept to a minimum to prevent significant voltage drops across the capacitor. On the other hand, in high-frequency signal applications, high levels of leakage current may not have a significant impact on circuit performance [178], [179]. Leakage current was measured for 100 hours at room temperature, 300˚C, 500˚C, and 700˚C, including ramping up to the targeted temperature and cooling down to the room temperature. ...

An Integrated CMOS Passive Self-Interference Mitigation Technique for FDD Radios

IEEE Journal of Solid-State Circuits

... Increasing the interest in each stage of a DA amplifier is undoubtedly the simplest approach to raise its appeal. The first conceivable solution for this is to enhance the transconductance [15]. However, raising gm requires either increasing the operating point current or increasing the transistor size, both of which result in additional constraints such as greater circuit power consumption and transistor capacitors, lowering the circuit's bandwidth and thus not boosting GBP. ...

A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms

IEEE Journal of Solid-State Circuits

... Techniques for cellular (long-range) and sensor (short-range) PAs have developed independently over the past decade due to the significantly different system specifications (power levels) as well as system architectures (energy sources). The long-range sensor PA [11] proposed in this article lies at the intersection of these two fundamentally different radio front - ends. Any autonomous sensor-transmitter can be separated into two basic subsystems, as shown inFig. ...

A long-range, fully-integrated, regulator-less CMOS power amplifier for wireless sensor communications

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Venumadhav Bhagavatula

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Ka Wo Pang

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... It dissipates only 12.5 mW but the output power is quite low. Bhagavatula et.al [16], demonstrates a compact DA with an active area of only 0.15 mm 2 with only 5 dB gain. DAs with nonuniform techniques like tapered lines, weighted unit cells, gate-drain transformer feedback [11]- [14] signify some of the performance metrics but fall short in terms of an optimum solution that should target all aspects. ...

A compact 24–54 GHz CMOS band-pass distributed amplifier for high fractional bandwidth signal amplification

... Other SI suppression techniques include passive vector modulator downconversion mixers [44], baseband Hilbert transform equalization [45], integrated high-Q passive filters using bond wires [46], transformer coupling [47], polyphase filters [48], active bandpass sink filters [49], a least-mean-squares adaptive filter [50], a mixer-first FD LNA [51], a harmonic-reject PA to suppress out-of-band SI [52], and an LC phase-shift network [53]. However, these approaches typically rely on some resonant circuitry that delivers a relatively narrow-band solution. ...

An integrated CMOS passive transmitter leakage suppression technique for FDD Radios

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

... Reactive feedback using integrated transformers, in which the magnetically coupled windings provide a path for current-sense current feedback, has received considerable interest [8]- [10]. There are three fundamental transformer-feedback topologies [11]: drain-to-source, drain-to-gate, and source-to-gate. The first two, drain-to-source and drain-to-gate, have been applied in single-ended amplifiers to neutralize the device capacitance and improve reverse-isolation over a wide bandwidth. ...

Transformer feedback based CMOS amplifiers

... For example, the 2 GHz absolute bandwidth occupies 7.1% fractional bandwidth at 28 GHz, which occupies 100% fractional bandwidth at the 2 GHz IF band. Several wideband amplifiers have been designed in [2,3,4,5,6,7,8] using the transformer matching, feedback technique or inductor-less design. A package-level wideband driver amplifier in 65 nm CMOS is presented in this paper. ...

A Transformer-Feedback based wideband IF amplifier and mixer for a heterodyne 60 GHz receiver in 40 nm CMOS