Tejinder Kumar's scientific contributions

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Publications (3)

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... Sys-temVue acts as an intermediate stage between simulation world, as in Matlab; and the real implementation world, as in field programmable gate array (FPGA). It can handle a hardware in the loop (HIL), to get the simulation out into the manufacturing world [3]. SHU et al. present a novel implementation of real-time radar environment simulator with four channels for missile-borne SAR using wideband DRFM technique and parallel computing technique based on FPGA is presented. ...
Reference: Implementation of Synthetic Aperture Radar Active Decoy Hardware
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... En el presente trabajo se emplea una metodología similar a la planteada por Shah [15] (Figura 1), pues es utilizado ampliamente en la literatura descrita. A excepción de la primera etapa de la metodología, correspondiente al diseño en punto fijo del modelo, el resto de las etapas pueden ser acometidas dentro del flujo de trabajo del HDL Workflow Advisor. ...
Reference: Diseño de un receptor DVB-S en VHDL utilizando las herramientas del entorno MATLAB/Simulink
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