Srijita Patra’s research while affiliated with Intel and other places

Very-large-scale integration (VLSI) technology scaling has resulted in a substantial rise in power density within a chip. This leads to thermal nonuniformity across integrated circuits (ICs) impacting electromigration (EM), which occurs due to dislocation of conducting elements of interconnects caused by electron flow. Detecting EM risk by accelerated stress methods is an active area of research. This article describes a technique that uses laser to create concentrated area of high temperature, or hot spot. The high temperature is applied to targeted areas of the specific circuit or intellectual property (IP) block of a product, while the rest of the chip continues to operate at standard conditions. The notable benefit from this technique is the capability to selectively accelerate the stressing (EM) process of an individual IP block, rather than stressing the entire chip uniformly.