Salem Abdennadher’s research while affiliated with Intel and other places

... An integrated circuit (IC) is a microelectronic device that integrates various components and their interconnecting wires onto a small silicon chip using semiconductor manufacturing processes. It offers significant advantages such as miniaturization, low power consumption, high durability, and cost-effectiveness [14][15][16][17][18][19]. ICs can be classified into analog, digital, and hybrid types based on their functions and structures. ...

Reference:

On-chip assessment procedure and calibration structure for aging durability assessment of integrated circuits

... With fast progress being made toward addressing reliability, performance and testing [11] [12] challenges, security of chiplets has been left as an afterthought. Disaggregation of a system into multiple smaller dies opens a possibility for new side-channel attacks, hardware Trojans or counterfeits in the supply chain, probing of chiplet interfaces, reverse engineering, and even swapping of individual chiplet dies. ...

Reference:

Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques

... Trendily, the physical size of components decreases, the gate-oxide layer of transistors becomes thinner, and the junction depth becomes shallower. Consequently, smaller transistors are more vulnerable to the electrostatic- discharge (ESD) transient, and have a considerably higher failure rate [1][2][3][4][5][6]. The laterally-diffused metal-oxide-semiconductor field-effect transistor (LDMOSs) are often used in many integrated circuits of automotive electronics, power management circuits, power electronics, and communication modules [7][8][9][10][11][12] under high-voltage operation situations, owing to their distinguished characteristics, including being able to operate at a high blocking voltage and high conduction current. ...

Reference:

Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers

... Abdennadher and Shaikh [35] presented a review of industry practices of the approaches based on DFT to testing high-speed IO interfaces, as well as a comparison of these approaches to specification-based testing. They discussed DfT, which assesses device performance in five areas: transmitter with functional speed, transmitter implied jitter production, receiver with functional speed, receiver minimum detectable level, and receiver jitter tolerance. ...

Reference:

A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

... Some require high throughput, others require integrity or low latency and they might also require different QoS. This variety results in complex test and validation processes for manufacturers [2] which will negatively affect time to market and also require expensive test equipment. ...

Reference:

A system-level overview and comparison of three High-Speed Serial Links: USB 3.0, PCI Express 2.0 and LLI 1.0

... In test economics, this is very essential. To successfully cover all flaws in an IC, the testing method necessitates skill in the areas of RF signal testing, high current testing, and fast transient testing [6]. ...

Reference:

Test Development for Power Management Integrated Circuit