Karen Kodary’s research while affiliated with Institut National des Sciences Appliquées de Lyon and other places

What is this page?


This page lists works of an author who doesn't have a ResearchGate profile or hasn't added the works to their profile yet. It is automatically generated from public (personal) data to further our legitimate goal of comprehensive and accurate scientific recordkeeping. If you are this author and want this page removed, please let us know.

Publications (2)


Loop Fusion for Memory Space Optimization
  • Conference Paper

February 2001

·

23 Reads

·

45 Citations

Antoine Fraboulet

·

Karen Kodary

·

Anne Mignotte

Portable or embedded systems as well as submicronic technologies have made the power consumption criterion crucial. Memory is known to be extremely power consuming. Moreover multimedia applications are memory intensive applications. Therefore, we propose new techniques to optimize a behavioral description of multimedia applications before the hardware/software partitioning (codesign). These transformations are performed on "for" loops that constitute the main parts which handle the arrays of the multimedia code. The paper presents an optimal algorithm to reduce the use of temporary arrays by loop fusion. Although the algorithm is not polynomial, experiments have shown that it is very efficient.


Citations (2)


... Hence, efficiency and dependability are key concerns for these systems. Considerable effort has been made to incorporate concurrent applications in embedded systems[1][2][3][4][5][6][7][8][9]and for their programming[10][11][12][13][14][15][16][17][18][19][20][21][22]. However, to exhibit high performance, such programs have to be much sophisticated while being largely aware of the underlying architecture. ...

Reference:

PRESGen: A Fully Automatic Equivalence Checker for Validating Optimizing and Parallelizing Transformations
Loop fusion for memory space optimization
  • Citing Conference Paper
  • January 2001

... At the lowest level, it is crucial to fully leverage hardware features, including processor architecture and instruction sets, parallelism, and memory hierarchy. Hardware-related optimizations include loop transformation [9,12,22,30,36,41,49,51], parallelization [39,46,68,73], vectorization [25,57,58], among others. ...

Loop Fusion for Memory Space Optimization
  • Citing Conference Paper
  • February 2001