Haomiao Wei’s research while affiliated with University of Electronic Science and Technology of China and other places

In this letter, a high-efficiency 485–525 GHz frequency balanced tripler using three-port matching technology (TPMT) is reported. In comparison to traditional balanced tripler, the TPMT uses an on-chip capacitor connected to a biased microstrip line (Ms) at the bias port, which not only provides dc and RF isolation but also functions as part of the diode matching. The impedance of bias port participates in the matching process of the diode, effectively reducing the parasitic effect associated with the on-chip capacitance and thereby enhancing the efficiency of the tripler. In addition, this study adopts the on-chip power combining technology to improve the power handling capability of the frequency tripler and minimize the effects of assembly errors. At room temperature, the measured results show that the tripler has an efficiency of 4.2%–13.42% over the 485–525 GHz band at 70–172-mW input power.

This letter presents an extremely concise and compact power combining Schottky-based 180-GHz frequency doubler using the Y-junction match. In contrast to the conventional power combining configurations with complex power divider/combiner networks, interconnected waveguides, and single doubler, this work employs a direct matching approach to match the optimal embedded impedance of the diode. The Y-junction applied in this letter provides power dividing/combining, impedance matching, and microstrip (MS) to waveguide transitions in one structure. This structure not only significantly reduces the difficulties associated with waveguide manufacturing but also simplifies the circuit-matching process, thereby minimizing waveguide length loss. A 180-GHz power combining frequency doubler has been demonstrated based on this prototype. The measurement results show that the doubler delivers continuous wave (CW) input power of 500 mW with the output of 76 mW from 168 to 189 GHz. The peak output power is 108 mW at 182 GHz with 500-mW pumped.

This letter reports a Schottky-based wideband 200–325-GHz terahertz (THz) frequency tripler adopting a waveguide wedge iris (WWI) match instead of a conventional reduced-height waveguide (RHW) match. The wedges in this letter provide the auxiliary impedance matching and in-line cavity configuration in one structure. The auxiliary matching function is derived from the capacity to implement both shunt capacitive iris (CI) and RHW matching of WWI in a simultaneous manner. Due to the merits of design flexibility and structure compactness, a WR-3 band THz monolithic integrated frequency tripler based on the matching waveguide wedges is fabricated and then packaged in an extremely small flange-like cavity. The verified tripler exhibits a conversion efficiency of 2%–6.6% across the bandwidth of 200–325-GHz under 150 mW of pumped power.

This paper proposed an accurate series resistance model tailored for Schottky diode‐based terahertz multipliers. Compared to the conventional electrothermal model (E‐T model) only considering thermal effects, this model comprehensively accounts for both thermal and frequency effects of the series resistor components, including the temperature‐dependent epilayer resistance (Repi) and the temperature‐frequency‐dependent spreading resistance (Rspreading). The evaluation of thermal effects relies on steady‐state thermal simulation and the corresponding electrothermal model. Notably, the frequency‐dependent spreading resistance part is derived from the fitting conductivity of doped buffer layers and extracted by auxiliary three‐dimensional electromagnetic simulations. Based on this model, a balanced 225–300 GHz frequency tripler with AlN substrate has been designed and manufactured. By introducing this model, a significant improvement in the consistency between simulated and measured results has been achieved compared to the single E‐T model, regardless of whether the input power is low (80 mW) or high (160 mW).

In this article, a novel waveguide reconfigurable Schottky diode-based frequency doubler with tunable multiband high efficiency output is proposed and demonstrated. The multiband frequency output is achieved by reconfigurable input waveguide matching and cross-band output circuits matching. In the doubler, the whole cavity is composed of two parts: reconfigurable input matching waveguide cavities and coused main circuit associated with the coused cavity. These reconfigurable cavities are designed to match input impedance for corresponding band. The coused main circuit is adopted by weight optimization to fulfill output match of multiband. Then, the reconfigurable cavity is assembled into doubler through reduced-height waveguide choke flange, which aims to alleviate the assembly interconnection losses. Sample of the frequency doubler, operating at 170, 183, and 220 GHz, has been demonstrated based on this prototype. Measured results indicate that, the peak efficiencies of three bands are 38%, 34.5%, and 22.3%, respectively, with a total tunable operating bandwidth of 50 GHz.

This paper proposes a high‐power solid‐state power combining frequency multiplier source based on a waveguide magic‐T divider. The magic‐T has the merits of high isolation and reliability compared to conventional Y/T junction power dividers and wider bandwidth compared to 3 dB couplers. In the waveguide magic‐T, a two‐stage cuboid ridge is employed to reduce the difference‐port reflection and act as a matching element for the improved isolation port. Furthermore, two bent waveguides are connected with the output port of the magic‐T, which can achieve phase congruence. The reliability of the solid‐state power combining multiplier can be enhanced by this low‐loss, high‐isolation power divider. Moreover, the divider also facilitates the realization of a high‐power frequency multiplier. Measured results show that the multiplier has a maximum output power of 90.3 mW at 178 GHz with an input power of 448 mW.

In this paper, a linear optimization method(LOM) for the design of terahertz circuits is presented, aimed at enhancing simulation efficacy and reducing the time of the circuit design workflow. This method enables the rapid determination of optimal embedding impedance for diodes across a specific bandwidth to achieve maximum efficiency through harmonic balance simulations. By optimizing the linear matching circuit with the optimal embedding impedance, the method effectively segregates the simulation of the linear segments from the nonlinear segments in the frequency multiplier circuit, substantially increasing the speed of simulations. The design of on-chip linear matching circuits adopts a modular circuit design strategy, incorporating fixed load resistors to simplify the matching challenge. Utilizing this approach, a 340GHz frequency doubler was developed and measured. The results demonstrate that, across a bandwidth of 330GHz to 342GHz, the efficiency of the doubler remains above 10%, with an input power ranging from 98mW to 141mW and an output power exceeding 13mW. Notably, at an input power of 141mW, a peak output power of 21.8mW was achieved at 334GHz, corresponding to an efficiency of 15.8%.

The research on high power 190 GHz doubler based on the GaAs Schottky diodes is proposed in this paper. The frequency doubler comprises a improved diode configuration that increases the number of anodes by changing the diode arrangement to improve power handling capacity. Electromagnetic and thermal simulation is utilized to demonstrate that the doubler can carry more power. The input power is gradually pumping from 200 mW to 500 mW with an applied DC bias of -15 V. And the peak efficiency of the doubler is measured to be 17%, while the maximum output power is 85 mW at 190 GHz.