Hanzhang Cao’s research while affiliated with Nanjing University of Science and Technology and other places

This paper presents a Ka‐band flat‐gain low‐noise amplifier (LNA) in 65‐nm CMOS technology. An optimized gate bias technique is utilized for comprehensive optimization among noise figure (NF), input 1 dB compression point (IP1dB), and power consumption. Then a current‐reused technique is used to further reduce power consumption, and an inductor is inserted in the current‐reused DC path to improve the circuit's common mode stability. The interstage and output magnetic‐coupled resonator (MCR) matching network with individual pole manipulation is optimized to achieve an enhanced gain flatness. From the measurement results, S21 of 14.8–15.5 dB is achieved from 26.5 to 29.5 GHz, with a gain ripple of 0.7 dB. Measured NF varies from 2.85 to 3.3 dB, with the lowest NF at 27.5 GHz. The measured IP1dB at 28 GHz has achieved as high as −12.5 dBm. The whole LNA consumes 6.8 mW under a 1‐V supply, achieving a high FoM of 25.31 Hz in dB (dBHz). The fabricated LNA occupies a core area of 0.1 mm².

This paper presents a 28 GHz GaN enhanced single‐sideband time‐modulated phased array (ESTMPA), based on a monolithic microwave integrated circuit (MMIC), including both a time‐modulated circuit and an RF front‐end module (FEM). The time‐modulated circuit mainly consists of a numerically controlled attenuator to balance the amplitude, compact phase shifters to generate balanced signals, a reconfigurable power divider, and a quadrature power divider. The FEM mainly consists of a low noise amplifier and a power amplifier, featuring codesign of input/output networks. Based on the in‐phase/quadrature (I/Q) composite modulation technique, a stepped modulation waveform, realized by the time‐modulated circuit, is used to enable a weighted array of phases. This helps generate a scanned beam at the first positive sideband and eliminate the undesired sidebands. The final MMIC‐based four‐element ESTMPA shows a relative suppression level of −16 dB at the positive fifth sideband and −13 dB at the zeroth sideband, and a much higher level at the other undesired sidebands. As a result, a wider signal bandwidth and a higher harmonic efficiency are achieved. In addition, the ESTMPA shows a beam sweeping angle from −30° to 30° in far‐field measurement.

A high-power dual-wideband GaN power amplifier (PA), which features a filter-based input diplexer and a transformer-combined load, has been proposed in this study. The diplexer realized by low-/high-pass filters presents a high dual-band isolation (>15 dB) and can arbitrarily select the location of the two widely spaced bands. Instead of using a diplexer in the output matching network (OMN), a transformer-combined load design has been proposed to simplify the OMN design. The transformer can effectively minimize the loading effect from each other branch, but does not obviously influence the optimal output impedance. The designed PA can operate in either Ku -or Ka -band mode. In the Ku -band mode, an output power more than 40 dBm and a power-added efficiency (PAE) more than 35% are obtained at 13.5–18 GHz. In the Ka -band mode, the output power more than 30 dBm and the PAE more than 17.5% are obtained at 33–38 GHz. The gain in the Ku - and Ka -band modes is more than 30 and 13 dB, respectively.