Felicia Kiebler’s scientific contributions

In this paper, we show that low-voltage operation of a GaN transistor (5.5V) as a driver allows very high line-up efficiency, including driver and end-stage. We realized two-stage MMIC in 0.25pm GaN HEMT technology. The MMIC die and high harmonic matching circuits were assembled into a standard ceramic RF package. The load-pull measurement results of the packaged MMIC show that the line-up efficiency is preserved to >70% in the presence of an 8 dB output power variation. We designed a PCB based on the load-pull measurement data as a demonstration board. We measured 76% line-up efficiency with an output power of 35.4dBm and a linear gain of 27dB at 2.14 GHz. Applying a WCDMA signal, a -52.4dBc ACLR performance was observed at 29.4dBm average output power using a vector switched generalized memory polynomial digital pre-distortion (VS-GMP DPD) algorithm.