Ben Simner's research while affiliated with University of Cambridge and other places

Publications (5)

Preprint
Full-text available
Virtual memory is an essential mechanism for enforcing security boundaries, but its relaxed-memory concurrency semantics has not previously been investigated in detail. The concurrent systems code managing virtual memory has been left on an entirely informal basis, and OS and hypervisor verification has had to make major simplifying assumptions. We...
Chapter
Full-text available
Virtual memory is an essential mechanism for enforcing security boundaries, but its relaxed-memory concurrency semantics has not previously been investigated in detail. The concurrent systems code managing virtual memory has been left on an entirely informal basis, and OS and hypervisor verification has had to make major simplifying assumptions. We...
Chapter
Architecture specifications such as Armv8-A and RISC-V are the ultimate foundation for software verification and the correctness criteria for hardware verification. They should define the allowed sequential and relaxed-memory concurrency behaviour of programs, but hitherto there has been no integration of full-scale instruction-set architecture (IS...
Chapter
Full-text available
Computing relies on architecture specifications to decouple hardware and software development. Historically these have been prose documents, with all the problems that entails, but research over the last ten years has developed rigorous and executable-as-test-oracle specifications of mainstream architecture instruction sets and “user-mode” concurre...
Conference Paper
Modern program logics have made it feasible to verify the most complex concurrent algorithms. However, many such logics are complex, and most lack automated tool support. We propose Starling, a new lightweight logic and automated tool for concurrency verification. Starling takes a proof outline written in an abstracted Hoare-logic style, and conver...

Citations

... Rely-guarantee reasoning [Jones, 1983] supports temporal decomposition of a workload across concurrent threads. The pioneering work on concurrent separation logic [O'Hearn, 2007 and its descendants [Windsor et al., 2017] tackled spatial decomposition of memory across separately verified data structures. Fruitful combination of these two techniques was demonstrated in the logics RGSep [Vafeiadis and Parkinson, 2007], LRG [Feng, 2009, Liang andFeng, 2013] and TaDA [da Rocha Pinto et al., 2014]. ...