Bahar Ajdari’s research while affiliated with Intel and other places

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Publications (6)


(a) Multiple vibrational excitation (MVE) concept after Bravaix et al.¹ (b) Dual photo-carrier pulses (red) creating vibrational states (blue) leading to permanent degradation. The setup can resolve the MVE lifetime by comparing the permanent effects of (iii), (ii), and (i).
Concept of the laser-induced hot-carrier accelerated degradation process.
Simplified diagram of the laser setup. A beam splitter splits the laser pulse in two pulses and routes them in two optical paths of equal length. From the speed of light, micron-level stage accuracy translates to femtosecond-level delay accuracy.
(a) Frequency degradation of RO structures aged by laser. The laser dose factors the TPA current and the exposure time. (b) Frequency degradation of additional RO samples aged by classic electrical stress.
Left (solid red): Photocurrent recorded in double pulse configuration for various delays (autocorrelator). Right (dashed blue): Degradation for various samples irradiated at various delays.
Laser-based FinFET hot-carrier degradation resolved in time-domain
  • Article
  • Publisher preview available

March 2025

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R. Ascázubi

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B. Ajdari

Hot-carrier degradation in contemporary FinFET transistors by means of ultrafast infrared laser pulses enable the study of the evolution of excited states leading to device degradation. Here, we present results from a time-resolved optical setup where additive populations of hot-carriers are photo-injected. We report the experimental observation of damage-inducing excited states with a lifetime of 170 ± 40 fs.

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Electromigration Failure Characterization Using Laser-Induced Nonuniform Heating

January 2025

IEEE Transactions on Electron Devices

Very-large-scale integration (VLSI) technology scaling has resulted in a substantial rise in power density within a chip. This leads to thermal nonuniformity across integrated circuits (ICs) impacting electromigration (EM), which occurs due to dislocation of conducting elements of interconnects caused by electron flow. Detecting EM risk by accelerated stress methods is an active area of research. This article describes a technique that uses laser to create concentrated area of high temperature, or hot spot. The high temperature is applied to targeted areas of the specific circuit or intellectual property (IP) block of a product, while the rest of the chip continues to operate at standard conditions. The notable benefit from this technique is the capability to selectively accelerate the stressing (EM) process of an individual IP block, rather than stressing the entire chip uniformly.





Citations (2)


... Two-photon ultrafast laser absorption has been shown to induce permanent degradation in FinFET transistors. 2 The laser-assisted HC degradation reported in Ref. 2 is a different process from that using electrical HC although it exhibits many similarities. The laser technique enables the implementation of time-domain studies with multiple successive laser pulses. ...

Reference:

Laser-based FinFET hot-carrier degradation resolved in time-domain
Hot-Carrier Aging by Ultrafast Laser on 22FLL FinFET Technology
  • Citing Conference Paper
  • April 2024

... Moreover, the aging effects become more pronounced in deep sub-micron ICs due to increased manufacturing uncertainties, resulting in varying burn-in speeds among different ICs. Consequently, even if IC chips pass structural and functional tests, they can still face failure problems during practical use due to aging effects [19][20][21][22][23][24][25].To address these issues, this research presents utilizing the initial threshold voltage of the critical path as a key parameter for assessment the aging durability of ICs and employs an on-chip test structure to rapidly test the initial threshold voltages of different critical paths [26][27][28][29][30]. The on-chip test structure offers high calibration precision and enables individual prediction of the aging durability of ICs while simultaneously detecting the actual aging condition of the circuit during use. ...

Q&R On-Chip (QROC): A Unified, Oven-less and Scalable Circuit Reliability Platform
  • Citing Conference Paper
  • March 2022