D. Michael Miller

University of Victoria, Victoria, British Columbia, Canada

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Publications (60)14.05 Total impact

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    ABSTRACT: We investigate the subclass of reversible functions that are self-inverse and relate them to reversible circuits that are equal to their reverse circuit, which are called palindromic circuits. We precisely determine which self-inverse functions can be realized as a palindromic circuit. For those functions that cannot be realized as a palindromic circuit, we find alternative palindromic representations that require an extra circuit line or quantum gates in their construction. Our analyses make use of involutions in the symmetric group $S_{2^n}$ which are isomorphic to self-inverse reversible function on $n$ variables.
    Full-text · Article · Feb 2015
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    ABSTRACT: Reversible logic represents the basis for many emerging technologies and has recently been intensively studied. However, most of the Boolean functions of practical interest are irreversible and must be embedded into a reversible function before they can be synthesized. Thus far, an optimal embedding is guaranteed only for small functions, whereas a significant overhead results when large functions are considered. In this paper, we study this issue. We prove that determining an optimal embedding is coNP-hard already for restricted cases. Then, we propose heuristic and exact methods for determining both the number of additional lines as well as a corresponding embedding. For the approaches we considered sums of products and binary decision diagrams as function representations. Experimental evaluations show the applicability of the approaches for large functions. Consequently, the reversible embedding of large functions is enabled as a precursor to subsequent synthesis.
    Full-text · Article · Aug 2014 · ACM Journal on Emerging Technologies in Computing Systems
  • D.Michael Miller · Mathias Soeken · Rolf Drechsler
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    ABSTRACT: The need to consider fault tolerance in quantum circuits has led to recent work on the optimization of circuits composed of Clifford+T gates. The primary optimization objectives are to minimize the T-count (number of T gates) and the T-depth (the number of groupings of parallel T gates). These objectives arise due to the high cost of the fault tolerant implementation of the T gate compared to Clifford gates. In this paper, we consider the mapping of a circuit composed of NOT, Controlled-NOT and square-root of NOT (NCV) gates to an equivalent circuit composed of Clifford+T gates. Our approach is heuristic and proceeds through three phases: (i) mapping a circuit of NCV gates to a Clifford+T circuit; (ii) optimization of the placement of the T gates in the Clifford+T circuit; and (iii) optimization of the subcircuits between T gate groupings. The approach takes advantage of earlier work on the optimization of NCV circuits. Examples are presented to show the approach presented here compares well with other approaches. Our approach does not add ancilla lines.
    No preview · Article · Jul 2014
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    Zahra Sasanian · Robert Wille · D. Michael Miller
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    ABSTRACT: In previous work and motivated by a theoretical discussion on physical realizations, a new quantum gate library (the NCV-v1 library) for electronic design automation of quantum circuits has been proposed. Here, qudits instead of qubits are assumed, i.e. a basic building block which does not rely on a two level quantum system but a (multiple-valued) d-level quantum system is assumed. However, the descriptions on the foundation of this new library remained brief. This technical report provides an extended description of the applied ideas and concepts.
    Preview · Article · Sep 2013
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    Mathias Soeken · D. Michael Miller · Rolf Drechsler
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    ABSTRACT: The Pauli matrices are a set of three $2\ifmmode\times\else\texttimes\fi{}2$ complex Hermitian unitary matrices. In this article, we investigate the relationships between certain roots of the Pauli matrices and how gates implementing those roots are used in quantum circuits. Techniques for simplifying such circuits are given. In particular, we show how those techniques can be used to find a circuit of $\text{Clifford}+T$ gates starting from a circuit composed of gates from the well-studied NOT, CNOT, V library.
    Full-text · Article · Aug 2013 · Physical Review A
  • Zahra Sasanian · D. Michael Miller
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    ABSTRACT: The circuits produced by reversible and quantum synthesis approaches are not often optimal and post synthesis optimizations are beneficial. This paper introduces a functional approach for the optimization of reversible and quantum circuits that uses a recently introduced structure for semi-classical quantum circuits called Decision Diagram for a Matrix Function (DDMF). Experimental results are given that show that using DDMFs leads to more optimizations than are found using existing approaches.
    No preview · Chapter · Jan 2013
  • Robert Wille · Mathias Soeken · D. Michael Miller · Rolf Drechsler
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    ABSTRACT: Motivated by its application in several emerging technologies, the synthesis of reversible circuits has received significant attention in the last decade. The proposed methods can roughly be divided into two different categories: (A) approaches ensuring the minimal number of circuit lines and (B) hierarchical approaches. Both synthesis paradigms have significant differences with respect to the gate costs and the number of lines in the resulting circuits. Hence, designers often have to deal with unsatisfactory results were either the gate costs or the number of circuit lines is disproportionately large. In this paper, the relation between the gate costs of a reversible circuit and the number of circuit lines is considered. We observe that by slightly increasing the number of circuit lines, significant reductions in the gate cost can be obtained. Vice versa, by accepting a small increase in the gate costs, the number of lines can significantly be reduced. Following these observations, two optimization approaches are applied to demonstrate and experimentally evaluate these effects. The optimization approaches generate alternative circuit realizations from which the best one can be picked with regard to the designers' requirements. As a result, a synthesis scheme is proposed that does not focus on a single cost metric, but trades off the competing requirements.
    No preview · Article · Jan 2013 · Integration the VLSI Journal
  • D. Michael Miller · Zahra Sasanian
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    ABSTRACT: This paper reviews recent developments on mapping reversible circuits to libraries of elementary quantum gates. The emphasis is on optimization of both the initial reversible circuit and the resulting quantum circuit. At the quantum level, improved realizations of single mixed-polarity multiple-control Toffoli gates are presented as well as techniques for performing quantum gate optimizations across Toffoli gate boundaries. Experimental results show the effectiveness of the methods presented using circuits from the REVLIB benchmark suite.
    No preview · Conference Paper · Dec 2012
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    ABSTRACT: This paper considers the optimization of reversible circuits composed of multiple-control Toffoli gates to quantum circuits using the well-known NCV-1 (NCV) library and the recently introduced NCV-v1 library which both use a four-valued model for the quantum gates. The techniques introduced handle positive and negative controls which are central to many reversible circuit synthesis procedures. Experimental results confirm the methods are applicable to circuits obtained by diverse synthesis methods. The results also show the significant advantage of the NCV-v1 library.
    Preview · Article · May 2012 · Proceedings of The International Symposium on Multiple-Valued Logic
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    D Michael Miller · Mitchell A Thornton
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    ABSTRACT: The use of decision diagrams (DD) for the computation and representation of binary function spectra has been well studied [2,3,5]. Computations and representation of spectra for multiple-valued logic (MVL) functions have also been considered [6]. For binary functions, this approach can be implemented using one of a number of the highly efficient publicly available binary decision diagram (BDD) packages, e.g. CUDD [13]. Work with MVL functions requires a package suited to the MVL case, e.g. [7,8]. Quantum multiple-valued decision diagrams (QMDD) were introduced in [9-12] as a means to represent and manipulate the matrices required for binary or multiple-valued reversible and quantum gates and circuits. In this paper, we show how QMDD can also be applied to the computation of spectral transformations of binary and multiple-valued functions. A major motivation for this work is that it introduces an approach to the spectral analysis of reversible and quantum circuits in a representation that is applicable to simulation and synthesis of such circuits. It is also of interest in that it is a consistent approach for a variety of transformations of binary and multiple-valued functions.
    Preview · Article · Apr 2012
  • Zahra Sasanian · D. Michael Miller
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    ABSTRACT: A common synthesis scenario is to first find a cascade of binary reversible gates realizing a given reversible function and to then map the cascade to a circuit composed of elementary quantum gates. This paper considers the mapping phase with the goal of reducing the number of quantum gates required. A novel method for rearranging gates is presented that is shown to be more effective than the conventional moving rule. Results are presented for the quantum library: NOT, controlled-NOT, and the square-root-of-NOT gates (V and V + ). The approach is applicable to other quantum gate libraries.
    No preview · Article · Jan 2012 · Journal of multiple-valued logic and soft computing
  • Shigeru Yamashita · Shin-ichi Minato · D. Michael Miller
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    ABSTRACT: This paper proposes an efficient synthesis method for semi-classical quantum circuits (SCQCs) based on decision diagrams for a matrix function (DDMFs). The underlying technique is similar to the one used in previous work on reversible circuit synthesis methods based on binary decision diagrams (BDDs). Our method can be considered to be a generalization of the previous work in the sense that we can synthesise SCQCs which include reversible circuits as a special case. Moreover, we introduce some new ideas concerning how to consider the trade-off between the numbers of gates and qubits, and how to optimize the designed circuit by changing the variable order of the given DDMF.
    No preview · Article · Jan 2012 · Journal of multiple-valued logic and soft computing
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    Zahra Sasanian · Robert Wille · D. Michael Miller
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    ABSTRACT: Quantum computing offers a promising alternative to conventional computation due to the theoretical capacity to solve many important problems with exponentially less complexity. Since every quantum operation is inherently reversible, the desired function is often realized in reversible logic and then mapped to quantum gates. We consider the realization of reversible circuits using a new class of quantum gates. Our method uses a mapping that grows at a very low linear rate with respect to the number of controls. Results show that, particularly for medium to large circuits, our method yields substantially smaller quantum gate counts than do prior approaches.
    Preview · Article · Jan 2012
  • Zahra Sasanian · D. Michael Miller
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    ABSTRACT: Multiple-control Toffoli (MCT) gates are widely used in the synthesis of reversible circuits. These gates are not usually directly implemented and need to be mapped to circuits of more elementary components such as quantum gates. In this work, the realization of MCT gates with mixed controls is explored for the NCV quantum library containing NOT, CNOT, V and V + gates. The results show that the proposed approach significantly improves the best known NCV costs for MCT gates. 1
    No preview · Article · Aug 2011
  • Zahra Sasanian · D. Michael Miller
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    ABSTRACT: Mapping a circuit of reversible gates to a circuit of elementary quantum gates is a key step in synthesizing quantum realizations of Boolean functions. The library containing NOT, controlled-NOT and controlled square-root-of-NOT gates has been considered extensively. In this paper, we extend the library to include fourth-root-of-NOT gates. Experimental results using REVLIB benchmark circuits show that using this extended library results in smaller quantum circuits.
    No preview · Conference Paper · Jul 2011
  • Martin Lukac · Ben Shuai · Michitaka Kameyama · D. Michael Miller
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    ABSTRACT: We present an approach to the cache bottleneck problem using reversible logic circuits. The high traffic between the cache and the main memory in current systems considerably slows down the performance of the general information processing unit (IPU). Moreover this high traffic has the consequence of high heat generation in VLSI elements such as the CPU or dedicated processors. Thus the reduction in use or complete removal of the cache memory could be beneficial to current processors architecture. We present a model where the IPU is designed as a logically reversible circuit. This allows one to reduce the cache memory traffic because data can be recovered using the output of the current processing. We illustrate the implementation of the approach by providing a design of an adiabatic reversible Toffoli gate with a power consumption equivalent to a classical adiabatic circuit. With these approaches, the cache-memory bottleneck and heat dissipation can potentially be reduced even by using only logically reversible circuit implementation.
    No preview · Conference Paper · Jun 2011
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    D. Michael Miller · Robert Wille · Zahra Sasanian
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    ABSTRACT: A new method for determining elementary quantum gate realizations for multiple-control Toffoli (MCT) gates is presented. The realization for each MCT gate is formed as a composition of realizations of smaller MCT gates. A marking algorithm which is more effective than the traditional moving rule is used to optimize the final circuit. The main improvement is that the resulting circuits make significantly better use of ancillary lines than has been achieved in earlier approaches. Initial results are also presented for circuits with nearest-neighbour communication. These results show that the overall approach is not as effective for that problem indicating that research on direct synthesis of nearest-neighbour quantum circuits should be considered. While, the results presented are for the NCV quantum gate library (i.e. for quantum circuits composed of NOT gates, controlled-NOT gates, and controlled-V /V + gates), the approach can be applied to other libraries of elementary quantum gates.
    Preview · Article · May 2011 · Proceedings of The International Symposium on Multiple-Valued Logic
  • D. Michael Miller · Zahra Sasanian
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    ABSTRACT: One approach to determining a quantum circuit is to first synthesize a circuit composed of binary reversible gates and to then map that circuit to an equivalent quantum gate realization. This paper considers the mapping phase with the goal of reducing the number of quantum gates required. Our method is based on novel line labeling and gate moving procedures. Results are presented for the quantum library: NOT, controlled-NOT, and the square-root-of-NOT gates (V and V<sup>+</sup>). The approach is applicable to other quantum gate libraries.
    No preview · Conference Paper · Sep 2010
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    ABSTRACT: Spectral techniques on Abelian groups are a well-established tool in diverse fields such as signal processing, switching theory, multi-valued logic and logic design. The harmonic analysis on finite non-Abelian groups is an extension of them, which has also found applications for particular tasks in the same fields. It takes advantages of the peculiar features of the domain groups and their dual objects. Representing unitary irreducible representations, that are kernels of Fourier transforms on non-Abelian groups, in a compact manner is a key task in this area. These representations are usually specified in terms of rectangular matrices with matrix entries. Therefore, the problem of their efficient representations can be viewed as handling large rectangular matrices with matrix-valued entries. Quantum Multiple-valued Decision Diagrams (QMDDs) and Heterogeneous Decision Diagrams (HDDs) have been used for representation of matrices with numerical values, under some restrictions to the order of matrices to be represented. In this paper, we present a generalization of this concept for the representation of rectangular matrices with matrix-valued entries. We also demonstrate an implementation of an XML-based software package aimed at handling such data structures.
    No preview · Conference Paper · Jan 2010
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    D. Michael Miller · Robert Wille · Rolf Drechsler
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    ABSTRACT: Additional lines are required to implement an irreversible function as a reversible circuit. The emphasis, particularly in automated synthesis methods, has been on using the minimal number of additional lines. In this paper, we show that circuit cost reductions can be achieved by adding additional lines. We present an algorithm for line addition that can be targeted to reducing the quantum cost of a circuit or the transistor count for a CMOS implementation. Experimental results show that the cost reduction can be significant even if (1) only a small number of lines (even one) is added and (2) other circuit optimizations have already been applied.
    Preview · Conference Paper · Jan 2010