Ahmed Emira

Cairo University, Al Qāhirah, Muḩāfaz̧at al Qāhirah, Egypt

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Publications (29)20.7 Total impact

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    [Show abstract] [Hide abstract] ABSTRACT: We present a key idea of using the graphene-based Schottky junction to achieve high sensitivity and wide detection range radiation sensors. Nanostructured Schottky junction is formed at the interface between a graphene, metal electrode, and a semiconductor. The current flowing through the junction is mainly controlled by the barrier's height and width. Therefore, the detection principle is based on Schottky barrier height (SBH) modulation in response to different materials and stimuli. We have illustrated the concept for gamma (γ) radiation sensors. It's demonstrated that the integration of graphene leads to a great enhancement in sensitivity of up to 11 times coupled with 5 times increase in the sensing range as compared to conventional Schottky junctions. Furthermore, it was demonstrated that for proposed sensors, that the change in SBH could be fairly linearized as a function in the radiation dose unlike the SBH of comparable conventional junctions. The new concept opens the door for a novel class of minitiuarized, low biased, nanoscale radiation sensors for wireless sensor networks. The devices are based on new nanostructured Schottky junctions made by growing graphene on ultrathin platinum catalytic layer grown on different silicon substrates. Graphene high uniformity film with small flakes size embedded with platinum particles was synthesized using two deposition steps. The integration of graphene layers on regular M-S junctions was only possible by using an ALD grown platinum thin film (10-40 nm) and then growing graphene in PECVD at temperatures lower than platinum silicide formation temperature. The radiation sensing behaviors were investigated using two different substrate types. The first substrate type is a moderately doped n-type (n ≈ 2 × 1015 cm−3) silicon substrate in which a Schottky rectifier response with different threshold voltages was observed. A device that is based on Pt/n-Si conventional Schottky junction was used as a reference. The various devices were exposed to a range of γ-irradiations (2 − 120 kGy) using Co60 source, and a change in terminal voltages before and after radiation were measured accordingly. A sensitivity of 3.259 μA/kGy.cm2 at 1 V bias over a wide detection range has been realized. The charge transport mechanisms are interpreted on the basis of testing the detectors at elevated temperatures and theoretical models, both of which both verified tunneling as the dominant charge transport in the device. Tunneling allowed the operation of the detectors at lowbias voltages with good sensitivity.The detector's realized sensitivity at low bias voltage is a significant advantage, allowing the sensor to operate on a small battery or an energy-harvesting source. This is ideal for low-cost wireless sensor networks.
    Full-text · Article · Jun 2015 · Sensors and Actuators A Physical
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    [Show abstract] [Hide abstract] ABSTRACT: In this paper, an active filtering technique is presented which is capable of filtering the out-of-band blockers in wireless receivers. The concept is based on the feedforward cancellation technique where a blocker replica is subtracted at the output of the low-noise amplifier (LNA). In contrast to the previously reported feedforward cancellation methods, exact gain and phase matching are easily obtained in the proposed architecture to produce a highly selective narrowband frequency response at the output of the LNA with wide rejection bandwidth. For the proof of concept, the system is implemented in a 65 nm CMOS technology. It occupies a total area of 0.8 mm2 and the current consumption is 24 mA from a 1.2 V supply. The system post-layout simulations showed a blocker rejection of more than 33 dB for blocker signals 100 MHz away from the desired signal when the feedforward path is activated. The noise figure (NF) of the entire system is 3.8 dB that degrades to 5.8 dB when the feedforward path is activated.
    Full-text · Article · Mar 2014 · Microelectronics Journal
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    [Show abstract] [Hide abstract] ABSTRACT: In this paper, two high-voltage charge pumps (CPs) are introduced. In order to minimize the area of the pumping capacitors, which dominates the overall area of the CP, high-density capacitors have been utilized. Nonetheless, these high-density capacitors suffer from low breakdown voltage, which is not compatible with the targeted high-voltage application. To circumvent the breakdown limitation, a special clocking scheme is used to limit the maximum voltage across any pumping capacitor. The two CP circuits were fabricated in a 0.6- μm CMOS technology with poly0-poly1 capacitors. The output voltage of the two CPs reached 42.8 and 51 V, whereas the voltage across any capacitor did not exceed the value of the input voltage. Compared with other designs reported in the literature, the proposed CP provides the highest output voltage, which makes it more suitable for tuning MEMS devices.
    Full-text · Article · Oct 2013 · IEEE Transactions on Industrial Electronics
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    Full-text · Patent · Mar 2013
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    Full-text · Patent · Aug 2012
  • [Show abstract] [Hide abstract] ABSTRACT: In this paper, an efficient ultra-low-voltage PMU working for TEG input voltages as low as 200mV is proposed. The PMU core, charging an energy buffer, employs a main DC/DC converter. It consists of a cascade of two Dickson-based charge pumps with a variable conversion factor and switching frequency. Feedback is provided from the load buffer by means of a current sensor to a control unit that maximizes the overall power transfer efficiency at low input voltages. System simulation results demonstrate a peak efficiency greater than 70% with a controller current consumption less than 2μA. The PMU core was simulated in Cadence environment using a UMC CMOS 180nm process and the layout of the basic core building blocks is presented. The fully-integreable design consumes an area of approximately 30mm2.
    No preview · Conference Paper · Jun 2012
  • [Show abstract] [Hide abstract] ABSTRACT: This brief presents a highly integrated low-Intermediate Frequency receiver for use in UHF/VHF channel 7 and Channel 8 Integrated Services Digital Broadcasting-Terrestrial (ISDB-T) systems (90–220 MHz). It features an ultralow power consumption of 68 mW (55 mW in attenuator mode) with a noise figure of 3 dB. The device fully complies with the ISDB-T standard and is implemented in 0.13-$\mu\hbox{m}$ CMOS technology with fully integrated low-noise amplifier/matching networks, a voltage-controlled oscillator, a phase-locked loop/loop filter, a crystal oscillator, baseband filters, and Variable Gain Amplifier. The tuner only requires a prefiltering RF surface acoustic wave filter to notch out cellular frequencies and a biasing inductor to implement a fully compliant ISDB-T tuner. The full characterization of the tuner and the comparison with previous implementation are presented. The chip area is 2.1 mm $ \times$ 2.1 mm.
    No preview · Article · Jun 2012 · Circuits and Systems II: Express Briefs, IEEE Transactions on
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    [Show abstract] [Hide abstract] ABSTRACT: This letter demonstrates RF microelectromechanical systems (MEMS) fractal capacitors possessing the highest reported self-resonant frequencies (SRFs) in PolyMUMPS to date. Explicitly, measurement results show SRFs beyond 20 GHz. Furthermore, quality factors higher than 4 throughout a band of 1-15 GHz and reaching as high as 28 were achieved. Additional benefits that are readily attainable from implementing fractal capacitors in MEMS are discussed, including suppressing residual stress warping, eliminating the need for etching holes, and reducing parasitics. The latter benefits were acquired without any fabrication intervention.
    Full-text · Article · Feb 2012 · Journal of Microelectromechanical Systems
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    [Show abstract] [Hide abstract] ABSTRACT: This paper studies analytically and numerically the spring softening and hardening phenomena that occur in electrostatically actuated microelectromechanical systems comb drive resonators utilizing folded suspension beams. An analytical expression for the electrostatic force generated between the combs of the rotor and the stator is derived and takes into account both the transverse and longitudinal capacitances present. After formulating the problem, the resulting stiff differential equations are solved analytically using the method of multiple scales, and a closed-form solution is obtained. Furthermore, the nonlinear boundary value problem that describes the dynamics of inextensional spring beams is solved using straightforward perturbation to obtain the linear and nonlinear spring constants of the beam. The analytical solution is verified numerically using a Matlab/Simulink environment, and the results from both analyses exhibit excellent agreement. Stability analysis based on phase plane trajectory is also presented and fully explains previously reported empirical results that lacked sufficient theoretical description. Finally, the proposed solutions are, once again, verified with previously published measurement results. The closed-form solutions provided are easy to apply and enable predicting the actual behavior of resonators and gyroscopes with similar structures.
    Full-text · Article · Sep 2011 · Journal of Microelectromechanical Systems
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    [Show abstract] [Hide abstract] ABSTRACT: In this paper, the N-phase current driven passive mixer clocked by 1/N duty-cycle clocks is analyzed. The anal- ysis shows that the N-phase passive mixer holds the property of impedance transformation, where it can frequency-translate baseband lowpass impedances into RF frequency to synthesize high-Q bandpass filters. This property can be used to replace the off-chip SAW filter in wireless receivers. For the proof of concept, the system is implemented in 65nm CMOS technology. The simulation results are in a close agreement with the theoretical results.
    Full-text · Conference Paper · Aug 2011
  • [Show abstract] [Hide abstract] ABSTRACT: For energy harvesting applications, a power management unit (PMU) architecture operating at low input voltages is required. The most critical sub-blocks of such a PMU are the voltage multiplier and the low-voltage clock generator. An ultra-low-voltage exponential gain charge pump (ECP) that serves as a voltage multiplier for such PMUs is analyzed. A low-cost fully-integrated CMOS implementation for the ECP is proposed. Circuit simulations demonstrate a 0.85-0.90 V output for input voltages as low as 150 mV and static loads up to 1.5 μA. The ECP was simulated in Cadence environment using a TSMC CMOS 65 nm process and a total of 5 nF MIM capacitors.
    No preview · Article · Jun 2011
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    [Show abstract] [Hide abstract] ABSTRACT: In this paper an integrated SAW-less narrowband RF front-end for direct conversion wireless receivers is presented. The analysis of the feedback system shows a shift of the center frequency f<sub>RX</sub> for the overall RF bandpass filter from its nominal value f<sub>LO</sub>. The proposed architecture incorporates a notch filter at 2f<sub>LO</sub> to insure that there is no shift in f<sub>RX</sub>. The design has been implemented in 65nm CMOS process. It consumes 44mA from a single 1.2V supply. Simulation results show a rejection of more than 15dB in a bandwidth of +/-500MHz around 2GHz due to the additional feedback loop. The theoretical and simulation results are in close agreement.
    Full-text · Conference Paper · Sep 2010
  • Mohammed Omar · Ahmed Emira · Mohamed Dessouky
    [Show abstract] [Hide abstract] ABSTRACT: This paper presents a novel VGA (Variable Gain Amplifier) with an embedded complex (polyphase) analog FIR (Finite Impulse Response) filter architecture. The idea is based on a modified version of the integrate and dump circuit. The proposed modifications allow altering the frequency response of the circuit without significantly increasing the circuit complexity along with maintaining acceptable gain control range, noise and linearity. The proposed circuit was designed using 0.13 μm CMOS technology. It consumes 365 μA from 1.2 V supply with an input referred noise of 50 nV over √Hz.
    No preview · Article · Aug 2010 · Midwest Symposium on Circuits and Systems
  • Mohammed Omar · Ahmed Emira · Mohamed Dessouky
    [Show abstract] [Hide abstract] ABSTRACT: This paper presents a novel VGA (Variable Gain Amplifier) with an embedded analog FIR (Finite Impulse Response) filter architecture. The idea is based on a modified version of the integrate and dump circuit. The proposed modifications allow altering the frequency response of the circuit without significantly increasing the circuit complexity along with maintaining acceptable gain control range, noise and linearity. The proposed circuit was designed using 0.13 μm CMOS technology. It consumes 105 μA from 1.2 V supply with an input referred noise of 27.15 nV/√(Hz).
    No preview · Conference Paper · Jul 2010
  • [Show abstract] [Hide abstract] ABSTRACT: In this work, a complete single-ended readout circuit for capacitive MEMS gyroscope using chopper stabilization technique is presented. A novel noise cancellation technique is used to get rid of the bias noise. The circuit offers superior performance over state of the art readout circuits in terms of cost, gain, and noise for the given area and power consumption. The full circuit exhibits a gain of 58dB, a power dissipation of 1.3mW and an input referred noise of 12nV/√Hz. This would significantly improve the overall sensitivity of the gyroscope. The full circuit has been fabricated in 0.6μm CMOS technology and it occupies an area of 0.4mm × 1mm.
    No preview · Conference Paper · Jul 2010
  • Ahmed Emira · Hassan Elwan · Salwa Abdelaziz
    [Show abstract] [Hide abstract] ABSTRACT: In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter has two modes of operation. The continuous mode is used for heavy loads, and the pulse-skipping modulation (PSM) mode is used for light loads. To optimize the Buck converter efficiency in PSM mode, an ON-time control loop is utilized. Short-circuit and over-temperature protection schemes are used to improve the design robustness. Three Buck converters were integrated in a TSMC 0.25μm CMOS chip with 2×2mm<sup>2</sup> die area. Up to 93% and 86% efficiencies are achieved at 2.5V and 1.2V output, respectively, using 3.6V input.
    No preview · Conference Paper · Jul 2010
  • [Show abstract] [Hide abstract] ABSTRACT: This brief proposes a scalable multichannel clock and data recovery architecture that exploits the synchrony of multiple point-to-point serial links and uses a single voltage-controlled oscillator (VCO) to drive multiple phase detection loops. The proposed architecture can be naturally reduced by design to an ensemble of weakly interacting delay-locked loops. As a result, the jitter peaking problem is asymptotically eliminated, which makes this architecture well suited for use in long-haul repeater chains. Moreover, it allows controlling VCO jitter transfer to the recovered clock without affecting data jitter transfer. The architecture is demonstrated both by a Verilog-A behavioral model along with a rigorous system and statistical analysis.
    No preview · Article · Jun 2010 · Circuits and Systems II: Express Briefs, IEEE Transactions on
  • [Show abstract] [Hide abstract] ABSTRACT: A two-stage differential-ramp based continuous-tuning IF VGA is introduced. The design has a bandwidth in excess of 100 MHz consuming 5-mA from a 1.2-V supply. The ramp generation circuit consumes additional 200 muA from a 2.5-V supply. Thanks to the multiple differential control ramps, 49-dB linear-in-dB continuous gain tuning range is achieved with 19-dBm OIP3 at the maximum gain setting. The input referred noise density of the proposed design at maximum gain setting of 40-dB is 3.5-nV/sqrt(Hz).
    No preview · Conference Paper · Jun 2009
  • [Show abstract] [Hide abstract] ABSTRACT: In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5 V while using 2.5 V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DCDC switches to protect it against overvoltage breakdown. 5 MHz switching frequency is used to allow using smaller external inductors. The Buck converter is implemented in TSMC 65 nm CMOS technology and it occupies 0.15 mm<sup>2</sup> while the LDO regulator, bandgap, clock generator and bias circuits occupy 0.19 mm<sup>2</sup>. Up to 88% and 77% efficiency is achieved at 2.5 V and 1.2 V output, respectively, using 3.6 V input. If the input voltage is limited to 3.3 V, the LDO regulator is bypassed, and the peak efficiency becomes 92% for 2.5 V and 85% for 1.2 V output.
    No preview · Conference Paper · May 2009
  • [Show abstract] [Hide abstract] ABSTRACT: The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (SigmaDelta) modulator. The LDO provides biasing to the microphone and OTA input. The OTA presents high input impedance to the microphone and act as a pre-amplifier. The OTA consumes 100 muA from 3.3 V supply and SigmaDelta modulator consumes 480 muA from 1.2 V supply at a sampling frequency of 3 MHz and achieves dynamic range of 81.5d B. A decimation filter is added after the SigmaDelta modulator with decimation factor 64. The design has been implemented in 65 nm CMOS process and occupies 0.25 mm2.
    No preview · Conference Paper · May 2009

Publication Stats

219 Citations
20.70 Total Impact Points

Institutions

  • 2012-2014
    • Cairo University
      • • Department of Electronics and Communication Engineering
      • • Faculty of Engineering
      Al Qāhirah, Muḩāfaz̧at al Qāhirah, Egypt
  • 2002
    • Texas A&M University
      • Department of Electrical and Computer Engineering
      College Station, TX, United States