Jiseon Paek

Korea Advanced Institute of Science and Technology, Sŏul, Seoul, South Korea

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Publications (2)0 Total impact

  • [Show abstract] [Hide abstract]
    ABSTRACT: This paper presents a digitally controlled envelope modulator with low code-AM distortion that can be used as a building block in a digital to RF polar transmitter. The RF envelope signal modulation is performed by digitally controlling the number of activated unit amplifier cells. The phase modulated LO input signal drives a switching transistor gate of the each cell. The 8-bit cell array has 63 unary-weighted cells for MSB 6 bits and 3 segmented unary- weighted cells for LSB 2 bits. Low code-AM distortion is achieved by introducing a current source below the switch transistor in the unit cell. A Class E output matching network is used for the high drain efficiency. The proposed modulator delivers 4.91-dBm peak output power at 970MHz with the power consumption of 28.4mW. An EDGE signal is applied to demonstrate the dynamic operations. It is fabricated in 0.13 �è m CMOS process and the chip size without pad is 380um �Û 770um.
    No preview · Article · Jan 2011
  • Jiseon Paek · Bonghyuk Park · Songcheol Hong
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    ABSTRACT: A RF receiver front-end for direct sequence code division multiple access (DS-CDMA) ultrawide band (UWB) wireless system is implemented in 0.18 mum CMOS technology. The receiver includes transmit-receive switch (T/R switch), a low noise amplifier (LNA) and a down-converting mixer. The front-end delivers an average power gain of 10 dB, and an IIP3 of -13 dBm at the wide bandwidth of 3 to 4.7 GHz. In the receive mode, the T/R switch exhibits an insertion loss of 1.45-2.3 dB, a 17-dBm power 1-dB compression point (P1dB), and a 26.2-20.1 dB isolation from 3 to 5 GHz. The wideband LNA achieves an average gain of 21 dB with plusmn2 dB flatness and a noise figure of 3.15-4.8 dB
    No preview · Conference Paper · Oct 2006