[Show abstract][Hide abstract] ABSTRACT: This paper proposes a low voltage CMOS nano-ampere current reference circuit and presents its performance with circuit simulations in 180-nm technology. The proposed circuit consists of biasvoltage, current-source and offset-voltage sub-circuits with most of MOSFETs operating in subthreshold region. Simulation results show that the circuit generates a stable reference current of 110-nA in supply voltage range of 0.8-1.8-V with line sensitivity of 9250 ppm/V. The proposed circuit is useful for composing a voltage reference circuit for ultra-low power applications.
No preview · Article · Jan 2013 · IEICE Electronics Express
[Show abstract][Hide abstract] ABSTRACT: This paper presents an architecture of signal-dependent analog-to-digital converter (ADC) based on MINIMAX sampling scheme that allows achieving high data compression rate and power reduction. The proposed architecture consists of a conventional synchronous ADC, a timer and a peak detector, and AD conversion is carried out only when input signal peaks are detected. To improve the accuracy of signal reconstruction, MINIMAX sampling is improved so that multiple points are captured for each peak, and its effectiveness is experimentally confirmed. In addition, power reduction, which is the primary advantage of the proposed signal-dependent ADC, is analytically discussed and then validated with circuit simulations.