M. Yamaguchi

Toshiba Corporation, Edo, Tōkyō, Japan

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Publications (8)1.43 Total impact

  • L. Zhang · M. Koike · M. Ono · S. Itai · K. Matsuzawa · S. Ono · W. Saito · M. Yamaguchi · Y. Hayase · K. Hara
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    ABSTRACT: Superjunction (SJ) MOSFETs with low on-resistance and high sustain voltage are widely used as main switching power devices. For the p/n-pillars of SJ-power devices, precise doping at low-doping region below 1016 cm- 3 concentrations is required, and thus high-sensitivity 2D-carrier profiling of the pillars is indispensable where conventional SCM is insufficient. Previously, we developed the high-vacuum SSRM enabling high-spatial resolution and site-specific 2D-carrier profiling. In this study, we investigated comprehensively the feasibility of applying SSRM to SJ-power devices at low doping below 1016 cm- 3, with both SJ-diodes and low-doping references. The bias dependence of SSRM was analyzed on SJ-diodes and was compared with T-CAD simulations, and both the p- and the n-pillars demonstrate Schottky-like behavior between the probe and the sample. Consequently, the pn-junction delineation also moved with applied bias. We also performed SSRM on reference-staircase structures with low-doping layers down to 1014 cm- 3 of p, n and p/n types, and comparison with SIMS and SRP confirmed the high sensitivity of SSRM. The Schottky contact of the probe-sample was found to be pronounced at low-doping region, particularly p-type doped region. Therefore, the bias polarity should be taken into account to obtain correct information at the low-doping region.
    No preview · Article · Jul 2015 · Microelectronics Reliability
  • S Ono · W. Saito · M. Izumisawa · Y. Sumi · S. Kurushima · M. Tsuji · K. Tokano · M Yamaguchi
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    ABSTRACT: We investigated the profile dependency of specific on-resistance (R<sub>on</sub>A) under high- temperature and high-current-density conditions for 600 V-class semi-superjunction MOSFETs fabricated by the double-ion-implantation and multi-epitaxial method, for the first time. The column doping profile is an important design parameter for the R<sub>on</sub>A characteristics because the profile affects the electron mobility (mue) in the drift region. The n-column profile was modulated by the column diffusion time (t<sub>diff</sub>) in this experiment. The optimal t<sub>diff</sub> achieved minimal R<sub>on</sub>A under the high-temperature and high-current-density conditions.
    No preview · Conference Paper · Jun 2008
  • W. Saito · M. Kuraguchi · Y. Takada · K. Tsuda · T. Domon · I. Omura · M. Yamaguchi
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    ABSTRACT: The current collapse phenomena in 380V/1.9A GaN power-HEMTs designed for high-voltage power electronics application is reported. The influence of these phenomena to the power-electronics circuit performance under high applied voltage is discussed using a 27.1 MHz class-E amplifier, which can be one of an industrial application candidate. It has been found that the optimized field plate structure minimizes the increase of conduction loss caused by the current collapse phenomena and thus improves the power efficiency of the circuit. The minimized device achieved the output power of 13.8 W and the power efficiency of 89.6 % for the demonstrated circuit even with the applied drain voltage of 330 V and the switching frequency of 27.1 MHz. These results show the nature possibility of a new GaN-device application with both high voltage and high frequency condition
    No preview · Conference Paper · Jan 2006
  • M Yamaguchi · I. Omura · S. Urano · S. Umekawa · M Tanaka · T Okuno · T Tsunoda · T Ogura
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    ABSTRACT: The EMI noise of an IGBT/IEGT (injection enhancement gate transistor) circuit is significantly reduced by introducing a new device design criterion. The design criterion improves dV<sub>CE</sub>/dt controllability during the IEGT turn-on transient without sacrificing the featured low saturation voltage of the IEGT structure. The perfectly floating p-well region, as the criterion, prevents the undesirable V<sub>GE</sub> overshoot and the resultant uncontrollable dV<sub>CE</sub>/dt. The design criterion has been applied to a 1200 V ultra thin PT-IEGT, and low noise turn-on characteristics have been experimentally obtained. IEGTs with the new criterion enable low noise operation and precise gate control, which are suitable for active gate drive.
    No preview · Conference Paper · Jun 2004
  • Source
    A. Nakagawa · T. Matsudai · T. Matsuda · M. Yamaguchi · T. Ogura
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    ABSTRACT: We have previously proposed and analyzed the MOSFET-mode operation of ultra-thin wafer PTIGBTs in (T. Matsudai et. al., Proc. of ISPSD'02, p.258). The present paper, for the first time, presents an analytical theory of MOSFET-mode operation, and shows that the safe operating area is determined by a mechanism similar to the second breakdown of npn bipolar transistors. The present paper also experimentally demonstrates, for the first time, that the MOSFET-mode IGBTs are strongly effective for soft switching applications. The developed MOSFET-mode 900 V 60 A thin wafer trench gate PTIGBTs have reduced turn-off loss by 55% at 125°C, compared with the conventional (4th generation) soft switching PTIGBTs.
    Preview · Conference Paper · Jun 2004
  • M. Yamaguchi · I. Omura · S. Urano · S. Umekawa · M. Tanaka · T. Okuno · T. Tsunoda · T. Ogura
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    ABSTRACT: EMI noise of IGBT/IEGT (Injection Enhancement Gate Transistor) circuit is significantly reduced by introducing a new device design criterion. The design criterion improves dV CE/dt controllability during the IEGT turn-on transient without sacrificing the featured low saturation voltage of IEGT structure. The perfectly floating p-well region as the criterion prevents the undesirable V GE overshoot and the resultant uncontrollable dV CE/dt. The design criterion has been applied to a 1200V ultra thin PT-IEGT, and low noise turn-on characteristics have been experimentally obtained. IEGTs with the new criterion enable low noise operation and precise gate control, which are suitable for active gate drive.
    No preview · Article · Jan 2004
  • M. Yamaguchi · I. Omura · S. Urano · T. Ogura
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    ABSTRACT: In this paper, a new design concept is proposed for 600V IGBTs to achieve both fast switching and unclamped inductive switching (UIS) capability. The concept is based on optimizing p-emitter efficiency (γ) for each condition of on-state and sustaining mode. Here the γ is reduced in on-state to lower the turn-off loss, but kept enough in sustaining mode to suppress the electric field. In particular, it is show that the γ of more than 0.4 in sustaining mode prevents the short-time UIS failure. The concept was successfully applied to NPT-IGBT, and the fabricated device has demonstrated fast switching adaptable to a frequency of 150 kHz and UIS capability of 28mJ/mm<sup>2</sup> at a high current density ( J<sub>C</sub>) of 200A/cm<sub>2</sub> (about 6 times the J<sub>C</sub> of MOSFETs).
    No preview · Conference Paper · May 2003
  • M. Tsukuda · I. Omura · W. Saito · T. Domon · M. Yamaguchi

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