[Show abstract][Hide abstract] ABSTRACT: We have investigated a new program disturb phenomenon by DIBL (drain-induced barrier lowering) in MLC NAND Flash device. It is found that lower programmed state cell shows large DIBL effect and its BVdss measurement results in unwanted programming of nearby erased state cells. It is attributed to punch-through leakage of programmed state cell during BVdss measurement. Electrons from this leakage are accelerated by high drain bias, which leads to hot carrier programming. The results indicate that excessive boosted channel potential by local self-boosting scheme creates 'DIBL induced program disturb' by punch-through of channel cut-off cell. This paper suggests that excessive boosted channel potential should be controlled in short channel device for high density MLC NAND Flash operation.
[Show abstract][Hide abstract] ABSTRACT: A new self-boosting phenomenon is observed in 51 nm NAND flash devices. The authors have modeled and named this observation 'local self-boosting by source/drain depletion cutoff, a result of low net N-type dopant in the source/drain region. As cell-to-cell design rules shrink into the 50-nm range, channel dopant is increased to reduce short-channel effects while implantation-related source/drain dopant scattering increases. These factors combine to reduce net source/drain dopant levels and junction depth. Simulation results show that the source/drain region is fully depleted when a programming voltage (Vpgm) of 20 V is applied to unselected cells even at pass-voltage (Vpass) values as low as IV. As the boosting efficiency by source/drain depletion cut-off is higher than that of conventional boosting methods, this phenomenon may be used to obtain sufficient Vpass window margin required for advanced multi-level cell (MLC) applications.