Erhan Ozalevli

Texas Instruments Inc., Dallas, Texas, United States

Are you Erhan Ozalevli?

Claim your profile

Publications (11)4.81 Total impact

  • Tuli Dake · Anand Chellamuthu · Sam Patel · Erhan Ozalevli
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper presents a multi-loop voltage-controlled buck converter that operates at a wide range of programmable switching frequency and works over an input voltage range of 3.5 V to 60 V and load current up to 3 A. The output voltage can be externally set between 0.9 V and 20 V. A major challenge was incorporating line feed-forward technique while having a programmable switching frequency between 200 KHz and 2 MHz. A design technique to implement this feature, low-power mode detection using zero-cross detector, and multi-loop control to improve transient response will be presented. The converter fabricated in 0.5 mum process consumes 60 muA in low-power mode.
    No preview · Conference Paper · Oct 2009
  • Tuli Dake · Erhan Ozalevli
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper presents a precision current sensor featuring a high voltage, high gain (~ 140 dB), and low input offset ( < 1 mV) current sense amplifier. This amplifier does not require offset trimming even for low offset applications. It is a single stage amplifier that has a common gate pMOS differential input pair, which makes it inherently stable. This amplifier topology allows for a wide input common-mode range, thus increasing the versatility of current sensing circuit.
    No preview · Article · Jul 2008 · Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Erhan Ozalevli · Paul E. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, an implementation of a tunable highly linear floating resistor that can be fully integrated in CMOS technology is presented. The second-order effects of a single MOS transistor operating in the triode operation regime are described, and a common-mode linearization technique is applied to suppress these nonlinearities. This technique is implemented by utilizing a low-power circuit design strategy that exploits the capacitive coupling and the charge storage properties of floating-gate transistors. The resistance of the proposed circuit is tuned by utilizing the Fowler-Nordheim tunneling and hot-electron injection quantum-mechanical phenomena. We demonstrate the use of this resistor in highly linear amplifier. We present experimental data from the chips that were fabricated in a 0.5- CMOS process. We show that this resistor exhibits 0.024% total harmonic distortion (THD) for a sine wave with amplitude. Also, we show the programmability of the amplifier gain using the proposed tunable resistor.
    No preview · Article · Jun 2008 · Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Erhan Ozalevli · Huseyin Dinc · Haw-Jing Lo · Paul Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: We present an implementation of a 4-bit binary-weighted-resistor DAC to be used in quantizers. It is built by using tunable floating-gate CMOS resistors, which exploit the capacitive coupling and voltage storage capabilities of floating-gate transistors and employ scaled-gate linearization technique to suppress the MOSFET nonlinearities. The resistance of these resistors drifts 1.6 middot 10<sup>-3</sup>% over the period of 10 years at 25degC. By using these resistors, 15-bit accurate DAC is implemented in 0.5mum CMOS process
    No preview · Conference Paper · Oct 2006
  • E. Ozalevli · M.S. Qureshi · P.E. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper describes an implementation of a low-voltage CMOS buffer employing a negative feedback to improve its performance. Floating-gate transistors are incorporated to obtain low-threshold transistors and to increase the input/output voltage swing of the circuit operating at 1.2V. The designed circuit is fabricated in 0.5mum CMOS process, and occupies 0.0214mm<sup>2</sup>. It achieves total harmonic distortion (THD) of 48dB for 10kHz 0.6V<sub>pp</sub> sinusoidal input signal
    No preview · Conference Paper · Jun 2006
  • Erhan Ozalevli · P.E. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper describes an implementation of a tunable CMOS resistor that can be fully integrated in a standard CMOS technology with low-power and low-voltage applications. It is built by exploiting the capacitive coupling and voltage storage capabilities of a floating-gate transistor. Also, a scaled-gate linearization technique is utilized to suppress the transistor nonlinearities in the triode region. The resistance of the proposed circuit is tuned by utilizing Fowler-Nordheim tunnelling and hot-electron injection quantum mechanical phenomena. We present experimental data from the chip that was fabricated in 0.5mum CMOS process, and show that this resistor exhibits total harmonic distortion (THD) better than 7-bit linearity for 1KHz 1V<sub>pp</sub> sinusoidal input
    No preview · Conference Paper · Jun 2006
  • E. Ozalevli · P. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: We present implementations of highly linear amplifier and multiplier circuits that employ a linear CMOS resistor. This tunable resistor is built by utilizing the common-mode linearization technique, and by exploiting the gate-coupling and charge-storage characteristics of the floating-gate transistors. It exhibits 0.01% THD for 1V<sub>pp </sub> input. Also, the amplifier has an input linear range of 2.5V<sub>pp</sub> for differential and single-ended inputs, and achieves 0.018% THD for 1V<sub>pp</sub> differential input
    No preview · Conference Paper · Oct 2005
  • Source
    E. Ozalevli · C.M. Twigg · P. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper describes an implementation of a compact and low-power 10-bit floating-gate digital-to-analog converter (FGDAC). Nonvolatile floating-gate voltage references are utilized to build a charge amplifier DAC architecture. This novel implementation eliminates the large element spread and resolution trade-off in the traditional design of a charge amplifier voltage-output DAC. The FGDAC was fabricated in a 0.5 micrometre CMOS process and its total area is 0.0522 mm<sup>2</sup>. The presented experimental data shows that INL and DNL values less than plus or minus 0.5 LSB (0.68 mV) are easily achievable. This structure enables digital to analog conversion with programmable linearly or nonlinearly spaced levels.
    Preview · Conference Paper · Jun 2005
  • E. Ozalevli · P. Hasler
    [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, we propose implementations of highly linear floating-gate CMOS resistors that can be fully integrated in CMOS technology. Also, we analyze the second order effects of a single transistor operating in the linear operation regime and apply a linearization technique to suppress these nonlinearities. The resistance of the proposed circuits can be tuned by utilizing Fowler-Nordheim tunnelling and hot-electron injection quantum mechanical phenomena. Finally, we present experimental data from the chips that were fabricated in 0.5 μm CMOS process.
    No preview · Conference Paper · Jun 2005
  • E. Ozalevli · P. Hasler · F. Adil
    [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, we describe implementations of binary-weighted and equal capacitance floating gate digital-analog converters (FGDACs). We improve the accuracy of charge amplifier DAC circuits and reduce their large element spread by utilizing epots in their implementations. We analyze these circuits and present experimental data from the chips that were fabricated in 0.5μm CMOS process available through MOSIS. The characterization results prove that by using the equal capacitance FGDAC structure, we can obtain very accurate results while eliminating the problems caused by the large element spread.
    No preview · Conference Paper · Jun 2004
  • Source
    Erhan Ozalevli
    [Show abstract] [Hide abstract]
    ABSTRACT: With the downscaling trend in CMOS technology, it has been possible to utilize the advantages of high element densities in VLSI circuits and systems. This trend has readily allowed digital circuits to predominate VLSI implementations due to their ease of scaling. However, high element density in integrated circuit technology has also entailed a decrease in the power consumption per functional circuit cell for the use of low-power and reconfigurable systems in portable equipment. Analog circuits have the advantage over digital circuits in designing low-power and compact VLSI circuits for signal processing systems. Also, analog circuits have been employed to utilize the wide dynamic range of the analog domain to meet the stringent signal-to-noise-and-distortion requirements of some signal processing applications. However, the imperfections and mismatches of CMOS devices can easily deteriorate the performance of analog circuits when they are used to realize precision and highly linear elements in the analog domain. This is mainly due to the lack of tunability of the analog circuits that necessitates the use of special trimming or layout techniques. These problems can be alleviated by making use of the analog storage and capacitive coupling capabilities of floating-gate transistors. In this research, tunable resistive elements and analog storages are built using floating-gate transistors to be incorporated into signal processing applications. Tunable linearized resistors are designed and implemented in CMOS technology, and are employed in building a highly linear amplifier, a transconductance multiplier, and a binary-weighted resistor digital-to-analog converter. Moreover, a tunable voltage reference is designed by utilizing the analog storage feature of the floating-gate transistor. This voltage reference is used to build low-power, compact, and tunable/reconfigurable voltage-output digital-to-analog converter and distributed arithmetic architecture. Ph.D. Committee Chair: Paul E. Hasler; Committee Member: Alan Doolittle; Committee Member: Charles M. Higgins; Committee Member: David V. Anderson; Committee Member: Farrokh Ayazi
    Preview · Article ·

Publication Stats

62 Citations
4.81 Total Impact Points

Institutions

  • 2009
    • Texas Instruments Inc.
      Dallas, Texas, United States
  • 2005-2006
    • Georgia Institute of Technology
      • School of Electrical & Computer Engineering
      Atlanta, Georgia, United States