[Show abstract][Hide abstract]ABSTRACT: The unique electronic properties of single-walled carbon nanotubes (SWNTs) make them promising candidates for next generation electronics, particularly in systems that demand high frequency (e.g., radio frequency, RF) operation. Transistors that incorporate perfectly aligned, parallel arrays of SWNTs avoid the practical limitations of devices that use individual tubes, and they also enable comprehensive experimental and theoretical evaluation of the intrinsic properties. Thus, devices consisting of arrays represent a practical route to use of SWNTs for RF devices and circuits. The results presented here reveal many aspects of device operation in such array layouts, including full compatibility with conventional small signal models of RF response. Submicrometer channel length devices show unity current gain (f(t)) and unity power gain frequencies (f(max)) as high as approximately 5 and approximately 9 GHz, respectively, with measured scattering parameters (S-parameters) that agree quantitatively with calculation. The small signal models of the devices provide the essential intrinsic parameters: saturation velocities of 1.2 x 10(7) cm/s and intrinsic values of f(t) of approximately 30 GHz for a gate length of 700 nm, increasing with decreasing length. The results provide clear insights into the challenges and opportunities of SWNT arrays for applications in RF electronics.
[Show abstract][Hide abstract]ABSTRACT: Trade-off between noise figure (NF) and input return loss (RL or |S<sub>11</sub>|) imposes a fundamental limitation on the design of low noise amplifiers (LNA) for ultra-wideband (UWB) applications. A graph-based approach using Smith Chart to achieve optimum values for both NF and input RL over the desired LNA bandwidth is presented. The proposed method and device optimization technique are systematically incorporated to enhance the overall LNA performance in terms of gain, noise, linearity, and power consumption. An UWB LNA prototype is implemented in a 0.13 mum CMOS process to demonstrate the use of this methodology. It shows a gain of 11.3 dB, a NF of 3.9-4.6 dB, and an IIP3 of 3.2-5 dBm over a -3 dB bandwidth of 2.2-9 GHz while consuming 30 mW from a 1.2 V DC supply.
[Show abstract][Hide abstract]ABSTRACT: This letter presents the first characterization of radio-frequency noise of type-II InP-GaAsSb double-heterojunction bipolar transistors (DHBTs) from 2 to 24 GHz. Its small-signal noise equivalent model is developed and verified with the experimental data. The noise performance of the type-II InP-GaAsSb HBT is also compared with the type-I InP-InGaAs HBT with similar cutoff frequencies larger than 300 GHz. The analysis shows that the particular type-II transistor under test has higher noise than its counterpart type-I device primarily due to the difference of dc current gain.
[Show abstract][Hide abstract]ABSTRACT: A large signal device model is developed for type-II InP/GaAsSb/InP devices that is based on the UIUC Type-I SDD model. The model accurately characterizes a balanced 480/420 GHz f T /f MAX device, and is used to design and simulate a 200 GHz static frequency divider.
[Show abstract][Hide abstract]ABSTRACT: A scalable large signal device model was developed for type-I InP/InGaAs/InP devices that is based on the UIUC SDD2 model. Through model segmentation and parasitic separation, the model is able to provide accurate modeling of high speed DHBT devices from 0.5 X 3.0 um 2 to 0.5 X 5.2 um 2 devices.
[Show abstract][Hide abstract]ABSTRACT: InGaP/GaAs SHBTs have been fabricated and the device RF and noise performance has been measured. A small-signal model has been created from the S-parameters of the measured devices. Thermal and shot noise is added to create a first generation noise model, which shows good agreement with measured data. The devices (L=3x12 µm 2) showed an F MIN = 1.68 dB at 6 GHz for V CE = 1.8 V and I C = 1.56 mA.
[Show abstract][Hide abstract]ABSTRACT: A wideband logarithmic amplifier is demonstrated in this paper using InP-InGaAs double heterojunction bipolar transistor technology. The amplifier uses cascaded gain stages including the limiting and unity amplifiers to achieve a piecewise approximation to the ideal logarithmic response. The performance of 43-dB dynamic range, 22-GHz bandwidth, and <plusmn2-dB log error is achieved. The integrated circuit consumes 650 mW and has a chip dimension of 1times0.8 mm<sup>2</sup>
Article · Dec 2006 · IEEE Transactions on Microwave Theory and Techniques
[Show abstract][Hide abstract]ABSTRACT: A quantum well (160 Å ) transistor laser with a 400 μ m cavity length that achieves the large 3 dB modulation bandwidth of 13.5 GHz is described. The fast base recombination (transport determined, τ<sub> BL </sub>≪10 ps ) permits improvement of the carrier-photon damping ratio (≫1/ √ 2 ) , resulting in a resonant peak magnitude of unity and consequently a resonance frequency of ∼0 GHz (no peak) in the small-signal response. Quantum well band filling and bandwidth saturation are observed on the ground state (λ=1000 nm ) , and increase with operation on the first excited state (λ=980 nm ) .
[Show abstract][Hide abstract]ABSTRACT: A high-gain and wide-band variable gain amplifier (VGA) is developed using 300-GHz InP-InGaAs double-heterojunction bipolar transistor (DHBT). Negative-R<sub>E</sub> quad is used to enhance amplifier gain-bandwidth product. At maximum gain, the single-ended S<sub>21</sub> of 17 dB and the associated 3-dB bandwidth of 50 GHz are measured to produce a gain-bandwidth product of 354 GHz in a VGA including a Gilbert multiplier and an output driver. The gain-bandwidth product is twice the value measured from the VGA designed by single resistor degeneration in the same process. The circuit is designed in terms of detailed stability considerations and the experimental results show it to be unconditionally stable over 0.5-50 GHz. The linearity of the VGA is affected by nonlinear effects in DHBTs, and different design approaches are analyzed. An output interception point of the third harmonic of 16.2 dBm is measured.
Article · Mar 2006 · IEEE Transactions on Microwave Theory and Techniques
[Show abstract][Hide abstract]ABSTRACT: In this work an improved large-signal transistor model is developed especially for InP DHBTs based on Agilent ADS SDD model platform. This model includes the nonlinear effects of current blocking and velocity modulation. The model is verified on Vitesse VIP2 300GHz InP/InGaAs DHBTs and the simulation results of different models are compared with measured results. In addition to the validation of single devices, integrated circuits were designed and measured. It is shown that the model presented in this paper has more accurate predictions in circuit nonlinearity than conventional VBIC results.
[Show abstract][Hide abstract]ABSTRACT: This paper describes a modeling approach for Vitesse VIP2 300 GHz InP/InGaAs DHBT technology, including the nonlinear effects in base-collector region covering current blocking, velocity modulation and self-heating. Model is verified in terms of single devices and integrated circuits. Good model fitting to measured DC and S-parameters data from single HBTs is achieved, and several circuits based on Gilbert multiplier are designed for the purposes of model validation and high-speed applications. Nonlinear properties of these circuits are measured and compared with the simulation results from different bipolar transistor models. The variable gain amplifier reported in this paper achieves the highest gain-bandwidth product of over 520 GHz under the limitation of measurement capability.
[Show abstract][Hide abstract]ABSTRACT: This work reports experimental data comparing the low frequency noise spectrum of InP based HBTs. Double heterojunction device structures are examined with and without surface passivation ledges.