[Show abstract][Hide abstract] ABSTRACT: The authors have successfully developed a mass production friendly single metal gate process utilizing an ultra-thin metal inserted poly-Si stack (UT-MIPS) structure. First, the inserted metal gate thickness effects on device performances are carefully examined, and then the other parameters are optimized to give the best performance. As a results, low and symmetrical short channel Vth (0.44/-0.48 V for n/pMOS) and excellent drive currents (620/230 muA/mum for n/pMOS at Ioff =20pA/mum and Vdd=1.2 V) are obtained without using any mobility enhancement strain technology. The estimated operation voltage for 10 years lifetime of optimized UT-MIPS devices (1.25 V for nMOS PBTI and 1.5 V pMOS NBTI) are well beyond the 1.2 V, showing the good reliability characteristics of UT-MIPS devices as well
[Show abstract][Hide abstract] ABSTRACT: We propose a novel V<sub>th</sub>, control method for HfSiON (or HfO<sub>2</sub>) with poly-Si and metal inserted poly-Si stacks (MIPS) gates. By using a selective AlO<sub>x</sub> etch (SAE) process, we successfully integrate dual high-k gate oxide scheme; HfSiO/poly-Si stack for nMOS and HfSiO/AlO<sub>x</sub>/poly-Si stack for pMOS. Therefore, symmetrical V<sub>th</sub> values of 0.43V(nMOS)/-0.44V (pMOS) have been obtained in poly-Si gate. For MIPS gate, we perform the SAE process with impurity incorporation at the channel region, such as N <sub>2</sub> for nMOS and F for pMOS. Consequently, nMOS V<sub>th</sub> of 0.35V and pMOS V<sub>th</sub> of -0.45V are obtained without counter channel doping. Moreover, we find out that impurity incorporation at the channel also improves mobility and reliability characteristics. Finally, by using the SAE process with impurity incorporation, maximum operating voltages above 1.0V are obtained by an extrapolated 10 years lifetime
[Show abstract][Hide abstract] ABSTRACT: LEARNING OBJECTIVES
1. To know the frequency, imaging pattern, and prognosis of the recurrent HCC after liver transplantation. 2. To know important risk factors associated with post-transplantation recurrence of HCC 3. To understand that liver transplantation is not an ultimate treatment method for hepatocellular carcinoma, especially in advanced cases.
In patients with hepatocellular carcinoma(HCC) and hepatic cirrhosis, liver transplantation(LT) can offer dual advantages of treating the tumor and replacing the liver. Nowadays, LT is accepted as treatment of choice, especially for patients with end-stage liver disease. However, unfortunate recurrence is not uncommon. Among 150 LT for HCC during recent 10 years, HCC recurred in 16 cases. Pattern at follow-up CT was variable as follows: disseminated(8), multifocal(3), or solitary(5). Initial presenting organs were liver(11), lymph node(6), lung(4), bone(2), brain(1), abdominal wall(1), and skin(1). Locoregional control was tried for the solitary lesion, but not satisfactory with subsequent recurrence in 3 cases. A single lesion of lymph node in 2 patients showed response to radiotherapy. 9 patients with recurrence expired eventually. In this exhibit, we describe a spectrum of imaging pattern of recurrent HCC after LT with available statistical data including significant risk factors.
[Show abstract][Hide abstract] ABSTRACT: The novel technique to control the V<sub>th</sub> of n/pMOS for HfSiO(N) in both poly-Si and MIPS (metal inserted poly-Si stack) gates is demonstrated. By adding AlO<sub>x</sub> on HfSiO prior to poly-Si deposition, we successfully achieve symmetrical V<sub>th</sub>, values of 0.52V (nMOS), /-0.51V (pMOS) and high performance as I<sub>on</sub>, of 423uA/um for nMOS and 207uA/um for pMOS at I<sub>off</sub>=20pA/um. In addition, we find out that the ultra-thin and conformal TaN layer in MIPS gate does not contribute to the gate work function. By optimizing the TaN thickness, similar V<sub>th</sub> values, compared to poly-Si gate, are achieved. Consequently, the measured saturation currents at I<sub>off</sub>=20pA/um are 430uA/um for nMOS and 250uA/um for pMOS. Both issues of PBTI for HfSiO/AlO<sub>x</sub>/poly-Si structure and NBTI for HfSiO/AlO<sub>x</sub>/MIPS structure are resolved by optimizing the post deposition annealing condition and using ozone interfacial oxide, respectively.
[Show abstract][Hide abstract] ABSTRACT: Reliability characteristics of high-k gate dielectrics with poly-Si gate and metal inserted poly-Si stack (MIPS) gate are investigated in terms of positive bias temperature instability (PBTI) and hot carrier injection (HCI) characteristics. The results indicate that the dopants (P or As) from the poly-Si severely degrade PBTI and HCI characteristics. Therefore, the high-k/MIPS structure, which is not influenced by gate dopants, shows significant improvement in PBTI and HCI characteristics. For the same reason, the worst HCI condition of high-k/poly-Si structure is V g=V d instead of V g at I sub_max, while that of high-k/MIPS structure is V g at I sub_max.