Ganesh S. Samudra

National University of Singapore, Tumasik, Singapore

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Publications (93)171.25 Total impact

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    ABSTRACT: Normally-off AlGaN/GaN MIS-HEMT devices with multiple fluorinated ALD-Al2O3 layers as the gate dielectric have been reported to achieve a high threshold voltage for normally-off operations with satisfactory performance for both on and off states at room temperature. However, a large swing in gate threshold voltage is found when devices operate at elevated temperatures. Hence, further study of the gate dielectric on the distribution of fluorinated trap states in the energy band are required to assess the gate function at higher temperatures. Through the use of the charge analytical model and Poole?Frenkel trap emission theory, the gate voltage stressing measurement was carried out to accurately find the effective trap state distribution within the Al2O3 energy bandgap created by fluorinated treatments. For the samples fabricated and used in the investigation, we found that a higher population of fluorinated trap states located deeper than 1.1 eV corresponding to emission levels above 200 ?C would allow more trapped charges to remain in the dielectric at high temperature for better threshold voltage retention. We also discovered that a higher fluorine treatment power on the gate dielectric could yield a higher trap state density at deeper levels, resulting in better temperature stability.
    No preview · Article · Feb 2016 · Semiconductor Science and Technology

  • No preview · Conference Paper · Jun 2015

  • No preview · Conference Paper · May 2015
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    ABSTRACT: In this letter, the approach of partial AlGaN recess and multiple layers of fluorinated Al2O3 gate dielectric is utilized to achieve highest reported positive gate threshold voltage ( $V_{{{textrm {TH}}}}$ ) without severe reduction on 2-D electron gas carrier mobility in AlGaN/GaN HEMTs. Guided by the design and verification through analytical model, proper fluorine ions incorporation is made through fabrication. The approach resulted in a high $V_{{{textrm {TH}}}}$ of +6.5 V and competitive drain saturation current ( $I_{{{textrm {DMAX}}}}$ ) of 340 mA/mm. Furthermore, low gate leakage current and high breakdown voltage of 1140 V were also demonstrated.
    No preview · Article · Apr 2015 · IEEE Electron Device Letters
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    ABSTRACT: In this paper, an observation of drain current instability on p-GaN gate AlGaN/GaN HEMTs is reported. Contrary to the Schottky gate AlGaN/GaN HEMTs, which show stable and consistent Id-Vd curves under different pulsed conditions, the Id-Vd curves for p-GaN gate AlGaN/GaN HEMTs show a dispersion in the saturation region under the same pulse conditions, which cannot be explained by the trapping of electrons in the material. A model considering the trapping of holes in the p-GaN gate under different gate and drain biases is proposed to explain this new phenomenon.
    No preview · Article · Feb 2015 · IEEE Transactions on Electron Devices
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    ABSTRACT: Multidimensional numerical simulation of boron diffusion is of great relevance for the improvement of industrial n-type crystalline silicon wafer solar cells. However, surface passivation of boron diffused area is typically studied in one dimension on planar lifetime samples. This approach neglects the effects of the solar cell pyramidal texture on the boron doping process and resulting doping profile. In this work, we present a theoretical study using a two-dimensional surface morphology for pyramidally textured samples. The boron diffusivity and segregation coefficient between oxide and silicon in simulation are determined by reproducing measured one-dimensional boron depth profiles prepared using different boron diffusion recipes on planar samples. The established parameters are subsequently used to simulate the boron diffusion process on textured samples. The simulated junction depth is found to agree quantitatively well with electron beam induced current measurements. Finally, chemical passivation on planar and textured samples is compared in device simulation. Particularly, a two-dimensional approach is adopted for textured samples to evaluate chemical passivation. The intrinsic emitter saturation current density, which is only related to Auger and radiative recombination, is also simulated for both planar and textured samples. The differences between planar and textured samples are discussed.
    Full-text · Article · Nov 2014 · Journal of Applied Physics

  • No preview · Conference Paper · Sep 2014
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    Fa-Jun Ma · Ziv Hameiri · G.S. Samudra · Marius Peters · Bram Hoex
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    ABSTRACT: Effective minority carrier lifetime reduction at low injection levels is observed on 125 mm undiffused lifetime samples whose surfaces are under inversion due to field-effect passivation. With numerical analysis, we show that edge recombination is insufficient to account for this phenomenon on these samples. Between surface damage and asymmetric bulk lifetimes mechanisms that can account for the reduction, surface damage is confirmed to be more plausible. We demonstrate that the measured effective lifetime curves can be well reproduced assuming surface damage, a 700 nm thin layer with much lower bulk lifetimes, with numerical simulation.
    Full-text · Conference Paper · Jun 2014
  • Huolin Huang · Yung C. Liang · Ganesh S. Samudra · T.-F. Chang · C.-F. Huang
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    ABSTRACT: During off-state, the influence of surface-trapped electron charges induced by high-field stress near the gate electrode of AlGaN/GaN power high-electron mobility transistor devices causes a reduction in two-dimensional electron gas (2DEG) carrier density at the heterointerface. In a pulse turn-on operation, the weakened 2DEG channel results in a higher on-state conduction resistance during the transient, known as the current collapse phenomenon. The phenomenon increases the switching loss by a higher on-state resistance and prolonged turn-on transition time, thus limits the device operating frequency range. In this paper, such a phenomenon is modeled, analyzed by Sentaurus TCAD simulation, and verified by the laboratory measurement data, with the emphasis on the influence of field plates toward the current collapse. The spatial distributions of trapped electrons and excess free electrons along the AlGaN surface are modeled and analyzed to arrive at the quantitative relationships among the trapped electron density, on-resistance increase, and the electric field distribution which provide a reliable criterion for current collapse reduction. It was found that, with a proper field plate design, it is possible to achieve an improvement on transient on-state resistance and the current recovery time.
    No preview · Article · May 2014 · IEEE Transactions on Power Electronics
  • Huolin Huang · Yung C. Liang · Ganesh S. Samudra · Cassandra Low Lee Ngo
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    ABSTRACT: In this letter, partially recessed gate structures in conjunction with negative trap charges by ${rm F}^{-}$ plasma treatments both at AlGaN barrier and on gate dielectric surface are employed to realize the normally-OFF operation for AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors in Au-free scheme. A partial gate recessed trench is designed to effectively reduce the 2-D electron gas (2DEG) density and achieve positive threshold voltage $({rm V}_{{rm th}})$ without severe degradation in 2-DEG channel mobility. Furthermore, the fixed trap charges are innovatively placed at the gate AlGaN and ${rm Si}_{{rm 3}}{rm N}_{{rm 4}}$ layers by a two-stage ${rm F}^{{-}}$ plasma treatment to further increase the ${rm V}_{{rm th}}$ , without mobility degradation. A high ${rm V}_{{rm th}}$ of 1.9 V and a drain current ${sim}{rm 200}~{rm mA}/{rm mm}$ are achieved in the fabricated device, which also has a lower leakage current and the higher breakdown voltage of 580 V.
    No preview · Article · May 2014 · IEEE Electron Device Letters
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    ABSTRACT: Extraction of the exact surface recombination velocity at highly doped crystalline silicon (c-Si) surfaces is not straightforward and typically involves advanced computer modelling. In this work, two theoretical methods (the Kane-Swanson slope method and the general definition) for the extraction of the emitter saturation current density J0e are compared in SENTAURUS TCAD. We find good agreement between the J0e values obtained by the two methods. Experimental p+ emitter doping profiles on planar {100} samples are used to calibrate the process simulation, followed by a calculation of the doping profiles for textured {111} samples featuring upright pyramids. The experimentally measured J0e values of both textured and planar samples passivated by PECVD AlOx/SiNx stacks are reproduced by adjusting the surface recombination velocity. The electron surface recombination velocity parameter Sn0 at the p+ c-Si/AlOx interface is determined to be ∼1x104 cm/s for all investigated p+ emitters on planar wafers, comparable to values reported for lightly doped c-Si. A high density of fixed charge is found to reduce J0e by up to 90%, due to the suppression of Shockley-Read-Hall recombination at the surface.
    Full-text · Article · Dec 2013 · Energy Procedia
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    ABSTRACT: Evaluation of the level of surface passivation at highly doped crystalline silicon (c-Si) surfaces is not trivial, particularly when the surfaces are textured. In this work we present an advanced numerical analysis that can be used to evaluate the level of surface passivation at both planar and textured samples. First, using Sentaurus TCAD, we compare two widely used extraction methods of the emitter saturation current density J0e, the general definition and Kane & Swanson's method. Experimentally determined doping profiles on planar wafers are used to calibrate two- dimensional process simulations. Process simulations are subsequently used to calculate p + emitter doping profiles for textured wafers, which are required to simulate J0e. Additionally, while matching simulated and experimentally measured J0e values, we find that a high density of negative fixed charge in a plasma enhanced chemical vapour deposited AlOx/SiNx stack has a significant impact on surface recombination at the surface. Furthermore, we compare J0e values from textured and planar wafers and confirm that the difference from the expected geometrical factor can be attributed to surface recombination. Finally, by considering surface charges, we find that the electron surface recombination velocity parameter Sn0 is around 1X104 cm/s for all p+ emitters studied in this work.
    Full-text · Article · Dec 2013 · Energy Procedia
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    ABSTRACT: This paper reports extensive modelling and analysis of the temperature dependence on the device characteristics of the AlGaN/GaN high electron mobility transistors (HEMTs). A physics-based model is proposed in this study in order to correctly predict the gate flat-band Schottky barrier height, energy band Fermi-level (EC-EF) at the AlGaN/GaN interface, two-dimensional electron gas sheet density, gate threshold and (ID-VG) at sub-threshold voltages, and drain current-voltage (ID-VD) characteristics under various high-temperature conditions. The analytical results are then verified by comparing with the laboratory measurement as well as the numerical results obtained from the Sentaurus TCAD simulation. The proposed model is found to be useful for power electronic device designers on the prediction of the AlGaN/GaN HEMT device performance under high-temperature operation.
    No preview · Article · Dec 2013 · Semiconductor Science and Technology
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    Fa-Jun Ma · Bram Hoex · Ganesh S. Samudra · Armin G. Aberle
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    ABSTRACT: An effective surface passivation plays a vital role in the performance of crystalline silicon (c-Si) solar cells. Experimental research shows that fixed charge-induced field-effect passivates the c-Si efficiently. In this work, n-type and p-type c-Si wafers symmetrically passivated by the negative-charge dielectric Al2O3 were numerically modelled with SENTAURUS TCAD. Surface recombination is traditionally modelled by employing the extended Shockley-Read-Hall (SRH) model with single energy level of interface traps. However, experiments show interface traps distribute across the silicon bandgap. Thus, we implemented the extended SRH model with the ability to describe arbitrary energy distribution of interface traps within the bandgap. The extended SRH model predicts a constant effective surface recombination velocity at low injection levels for lightly doped n-type and p-type c-Si passivated by dielectrics with either a high negative or positive charge density. However, this prediction contradicts experimental results which show a significant reduction of the effective lifetime at low injection levels if the polarity of the fixed charge is attracting the minority bulk charge carriers. One explanation is assuming the presence of a thin defect-rich layer close to the c-Si surface in which the lifetimes are degraded. However, the choice of the lifetime and depth of such damaged surface region seem rather arbitrary and its physical origin is still unclear. We show that unequal electron and hole bulk lifetime parameters can also account for the phenomenon. This proposition is physically plausible and the simulation results also show a good agreement with the experimental data from both n-type and p-type c-Si wafers passivated by Al2O3. Our modelling results predict a simple but unambiguous experiment to distinguish between these two explanations.
    Full-text · Article · Dec 2012 · Energy Procedia
  • Shao-Ming Koh · Ganesh S. Samudra · Yee-Chia Yeo
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    ABSTRACT: In this work, strained n-channel FinFETs (nFinFETs) with silicon–carbon (Si:C) source/drain (S/D) stressors featuring NiSi:C contacts with segregated sulfur at the NiSi:C/Si:C interface are investigated in detail. The physical mechanism for the reduction in an effective Schottky barrier for electrons $\Phi_{B}^{n}$ due to presilicide sulfur ion implant and segregation is examined. The presence of sulfur near the NiSi:C/Si:C interface and its behavior as charged donor-like trap states was used to explain the enhancement of electron tunneling across the contact and the reduction in $\Phi_{B}^{n}$ down to 110 meV. New analysis using numerical simulation is presented. The results indicate that the presence of charged states near the interface plays a role in achieving low $\Phi_{B}^{n}$. When the S-segregated NiSi:C contact was integrated in strained nFinFETs with Si:C S/D stressors, external series resistance is reduced, and the drive current is improved. The dependence of the drive current on fin width and gate length is also studied.
    No preview · Article · Apr 2012 · IEEE Transactions on Electron Devices
  • Shao-Ming Koh · E.Y.-J. Kong · Bin Liu · Chee-Mang Ng · Ganesh S. Samudra · Yee-Chia Yeo
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    ABSTRACT: Tellurium (Te) implantation was introduced to tune the effective electron Schottky barrier height (SBH) Φ<sub>B</sub><sup>n</sup> of platinum-based silicide (PtSi) contacts formed on n-type silicon-carbon (Si:C). Te introduced by ion implantation prior to Pt deposition segregated at the PtSi:C/Si:C interface during PtSi:C formation. The presence of Te at the PtSi:C/Si:C interface leads to a low Φ<sub>B</sub><sup>n</sup> of 120 meV for PtSi:C contacts. The integration of Te-segregated PtSi:C contacts on strained n-channel fin field-effect transistors (FinFETs) with Si:C source/drain (S/D) stressors achieves the lowering of the parasitic series resistance R <sub>SD</sub> by ~62% and increases the saturation drive current by ~22%. The Te-segregated contact-resistance reduction technology does not degrade the short-channel effects and positive-bias temperature instability characteristics of n-FinFETs with Si:C S/D. As PtSi has a low SBH for holes and is a suitable contact for p-FinFETs, this new contact-resistance reduction technology has potential to be introduced as a single-metal-silicide dual-barrier-height solution for future complementary metal-oxide-semiconductor FinFET technology.
    No preview · Article · Dec 2011 · IEEE Transactions on Electron Devices
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    ABSTRACT: We report a new technique of achieving reduced nickel silicide contact resistance in strained n-FETs, where a pre-silicide Aluminum (Al) implant was introduced, and the Al profile was controlled/engineered by Carbon (C). C suppresses Al diffusion during silicidation, hence retaining high concentration of Al within the NiSi. Incorporating Al within NiSi reduces the Schottky barrier height for n-Si:C contact, leading to 18 % IOn improvement for Si:C S/D nFETs with no compromise on short channel effects.
    No preview · Article · Dec 2011 · Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
  • Chee Chingchong · Kai Hongzhou · Pingbai · Er Pingli · Ganesh S.samudra
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    ABSTRACT: Flash memory structure in which a silicon quantum dot embedded in the gate dielectric region between the channel and the control gate is considered. A self-consistent simulation for such memory devices is performed and aims to understand the relationship between the device structure and the meaningful quantities, as required for an efficient device operation. In this study, both the traditional SiO2 and HfO2 high-k dielectrics are being explored, and their results are compared and contrasted. In particular, the superiority of HfO2 over the SiO2 is demonstrated through various interlocking investigations on the relationships between the tunneling current, dielectric thickness, barrier height, programming and retention times.
    No preview · Article · Nov 2011 · International Journal of Nanoscience
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    ABSTRACT: We investigate the tuning of Schottky barrier height (SBH) of nickel silicide formed by pulsed excimer laser anneal of nickel on silicon implanted with aluminum (Al). A wide range of laser fluence was investigated, and it has been found that laser fluence influences the distribution of Al within the silicide and at the silicide/silicon interface. This in turn affects the effective whole SBH (PhiBp) at the silicide/silicon junction. High Al concentration at the silicide/silicon interface and high temperature for nano-second duration to achieve Al activation while keeping the Al concentration within the silicide low is vital for achieving low phiBp. We demonstrate the achievement of one of the lowest reported phiBp of ~0.11 eV. This introduces a new option for forming nickel silicide contacts with reduced contact resistance at low thermal budget for possible adoption in future metal-oxide-semiconductor transistor technologies.
    No preview · Article · Oct 2011 · Journal of Applied Physics
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    Haixia Da · Kai-Tak Lam · Ganesh S. Samudra · Gengchiau Liang · Sai-Kong Chin
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    ABSTRACT: We investigated the device performance of graphene nanoribbon tunneling field-effect transistors with heterogeneous channel as a function of the contact doping concentrations. The simulations were carried out based on the non-equilibrium Green’s function, coupled with a Dirac Hamiltonian model, and the roles of symmetric and asymmetric contact doping concentrations on the device performance were identified. It was observed that the device performances such as OFF-state currents (IOFF), ON-state currents (ION) and subthreshold slopes (SSs) were greatly influenced by the source doping concentrations, while variations in drain doping concentrations changed mainly the IOFF. By applying proper asymmetric source and drain doping concentrations, low SS and large ION/IOFF ratio can be achieved, indicating that it is an alternative route to effectively enhance the device performance.
    Full-text · Article · Jun 2011 · Solid-State Electronics