Kai Wang

University of Missouri, Columbia, Missouri, United States

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Publications (12)7.78 Total impact

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    ABSTRACT: Some system-level electrostatic discharge (ESD) tests repeat badly if different ESD generators are used. For improving repeatability, ESD generator specifications have been changed, and modified generators have been compared in a worldwide round robin test. The test showed up to 1 : 3 variations of failure levels. Multiple parameters that characterize ESD generators have been measured. This paper correlates the parameters to test result variations trying to distinguish between important and nonrelevant parameters. The transient fields show large variations among different ESD generators. A correlation has been observed in many equipment under tests (EUTs) between failure levels and the spectral content of the voltage induced in a semicircular loop. EUT resonance enhances the field coupling, and is the dominate failure mechanism. The regulation on the transient field is expected to improve the test repeatability.
    Full-text · Article · Dec 2008 · IEEE Transactions on Electromagnetic Compatibility
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    ABSTRACT: Some system level ESD tests do not repeat well if different ESD generators are used. For improving the test repeatability, ESD generator specifications were considered to be changed and a world wide Round Robin test were performed in 2006 to compare the modified and unmodified ESD generators. The test results show the failure level variations up to 1:3 for an EUT among eight different ESD generators. Multiple ESD parameters including discharge currents and transient fields have been measured. This paper tries to find which parameters would predict the failure level the best in general. The transient fields show large variations among different ESD generators. The voltage induced in a semi-circular loop and the ringing after first discharge current peak show the best correlation to failure levels. The regulation on the transient field is expected to improve the test repeatability.
    Full-text · Conference Paper · Sep 2008
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    ABSTRACT: Susceptibility scanning is an increasingly adopted method for root cause analysis of system-level immunity sensitivities. It allows localizing affected nets and integrated circuits (ICs). Further, it can be used to compare the immunity of functionally identical or similar ICs or circuit boards. This paper explains the methodology as applied to electrostatic discharge and provides examples of scan maps and signals probed during immunity scanning. Limitations of present immunity analysis methods are discussed.
    Full-text · Article · Jun 2008 · IEEE Transactions on Electromagnetic Compatibility
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    ABSTRACT: A method for analyzing electrostatic discharge (ESD) generators and coupling to equipment under test in the frequency domain is proposed. In ESD generators, the pulses are excited by the voltage collapse across relay contacts. The voltage collapse is replaced by one port of a vector network analyer (VNA). All the discrete and structural elements that form the ESD current pulse and the transient fields are excited by the VNA as if they were excited by the voltage collapse. In such a way, the method allows analyzing the current and field-driven linear coupling without having to discharge an ESD generator, eliminating the risk to the circuit and allowing the use of the wider dynamic range of a network analyzer relative to a real-time oscilloscope. The method is applicable to other voltage-collapse-driven tests, such as electrical fast transient, ultrawideband susceptibility testing but requires a linear coupling path.
    Full-text · Article · Sep 2007 · IEEE Transactions on Electromagnetic Compatibility
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    ABSTRACT: A concept for analyzing ESD generators and coupling to EUTs in the frequency domain is presented. Its novelty lies in not only taking the current shaping, but also the radiation effects of structural elements and electrical components located within the ESD generator into account, without discharging the ESD generator. This is achieved by using the frequency domain and substituting the electrical breakdown within the ESD generator (contact mode) for one port of a network analyzer. The network analyzer excites all the pulse forming and the radiating elements of the ESD generator as they would be excited during a discharge. This offers the advantage of an increased dynamic range of frequency domain techniques without having to simplify the complex radiation properties of real ESD simulators.
    No preview · Conference Paper · Sep 2006
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    ABSTRACT: Electrostatic discharges (ESD) can lead to soft-errors (e.g., bit-errors, wrong resets etc.) in digital electronics. The use of lower threshold voltages and faster I/O increases the sensitivity. In the analysis of ESD problems, an exact knowledge of the affected pins and nets is essential for an optimal solution. In this paper, a three dimensional ESD scanning system which has been developed to record the ESD susceptibility map for printed circuit board is presented and the mechanisms that the ESD event couples into the digital devices is studied. The ESD susceptibility of a fast CMOS EUT is characterized by generating the susceptibility map of the EUT. A series of measurements of the noise coupled into a sensitive trace and pin during an ESD soft error event are presented.
    Full-text · Conference Paper · Sep 2005
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    ABSTRACT: Electrostatic discharge (ESD) generators are used for testing the robustness of electronics toward ESD. Most generators are built in accordance with the IEC 61000-4-2 specifications. Using only a few parameters, this standard specifies the peak current, the rise time and the falling edge. Lacking a transient field specification, test results vary depending on which generator is used, even if the currents are quite similar. Such a specification is needed to improve the test repeatability. As for the current, the specification should be based on a reference human metal ESD event. While keeping the presently set peak current and rise time values, such a reference ESD (5 kV, 850-μm arc length) is identified and specifications for current derivative, fields, and induced voltages are derived. The reference event parameters are compared to typical ESD generators.
    Full-text · Article · Dec 2004 · IEEE Transactions on Electromagnetic Compatibility
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    ABSTRACT: Most electrostatic discharge (ESD) generators are built in accordance with the IEC 61000-4-2 specifications. It is shown, that the voltage induced in a small loop correlates with the failure level observed in an ESD failure test on the systems comprised of fast CMOS devices, while rise time and derivative of the discharge current did not correlate well. The electric parameters of typical ESD generators and ESD generators that have been modified to reflect the current and field parameters of the human metal reference event are compared and the effect on the failure level of fast CMOS electronics is investigated. The consequences of aligning an ESD standard with the suggestions of the first paper, of this two-paper series, are discussed with respect to reproducibility and test severity.
    Full-text · Article · Dec 2004 · IEEE Transactions on Electromagnetic Compatibility
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    ABSTRACT: The use of high-speed logic makes modern electronic systems highly susceptible to electrostatic discharge (ESD). Because of their wider bandwidth, faster digital devices are more susceptible to high frequency ESD transient fields. In the analysis of ESD problems, an exact knowledge of the affected PINs and nets is essential for an optimal solution. A three dimensional ESD scanning system, which has been developed to record the ESD susceptibility map for a printed circuit board, is presented, and the mechanisms that the ESD event couples into the digital devices is studied.
    Full-text · Conference Paper · Sep 2004
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    ABSTRACT: Electrostatic discharge (ESD) generators are used for testing the robustness of electronics towards ESD. Most generators are built in accordance with the IEC 61000-4-2 specifications. It is shown that the voltage induced in a small loop correlates with the failure level observed in an ESD failure test on the systems comprising fast CMOS devices, while rise time and current derivative of the discharge current did not correlate well. The electric parameters are compared for typical and modified ESD generators and the effect on the failure level of fast CMOS electronics is investigated. The consequences of aligning an ESD standard with the suggestions of this paper are discussed with respect to reproducibility and test severity.
    Full-text · Conference Paper · Sep 2003
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    ABSTRACT: The discharge current and the transient fields of an electrostatic discharge (ESD) generator in the contact mode are numerically simulated using the finite-difference time-domain method. At first the static field is established. Then the conductivity of the relay contact is changed, which initiates the discharge process. The simulated data are used to study the effect of design choices on the current and fields. They are compared to measured field and current data using a multidecade broadband field and current sensors. The model allows accurate prediction of the fields and currents of ESD generators, thus it can be used to evaluate different design choices.
    Full-text · Article · Jun 2003 · IEEE Transactions on Electromagnetic Compatibility
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    Kai Wang · D. Pommerenke · R. Chundru
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    ABSTRACT: ESD generators are widely used for testing the robustness of electronic equipment against human electrostatic discharge via small metal pieces (e.g. key). Presently the IEC 61000-4-2 ESD standard is hotly discussed to improve test result reproducibility. This paper numerically analyzes an ESD simulator and relates its construction parameters to discharge current and field parameters. It uses FDTD method and models the relay (contact mode discharge) as a material with time dependent conductivity. The process is broken down into a charging phase and a stabilization phase until the electrostatic conditions are reached. Then the conductivity of the relay is changed and the discharge process is simulated. A self-developed code is used to simulate the model. The simulation discharge current, measured ESD simulator's current and IEC reference discharge current are compared Some design choices of the generator are simulated.
    Full-text · Conference Paper · Sep 2002