Conference Paper

Compact reduced order modeling for multiple-port interconnects

Dept. of Electr. Eng., California Univ., Riverside, CA, USA
DOI: 10.1109/ISQED.2006.35 Conference: Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on
Source: DBLP

ABSTRACT

In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The proposed method overcomes the difficulty associated with Krylov subspace based projection MOR methods for reducing circuits with many ports. The novelty of the proposed method lies on the fact that we separately compute the poles and residues of each transfer function in the reduced admittance matrices. Specifically we apply traditional subspace projection method for computing poles and use hierarchical symbolic analysis for computing frequency responses of admittances to determine the residues of transfer functions. In this way, we only use necessary poles (smaller number of poles) to archive the same accuracy than subspace projection based methods. Finally convex programming based optimization is used to enforce the passivity of the reduced models. The new method can lead to much smaller reduced models for a given frequency range or much higher accuracy given the same model sizes than subspace projection based methods for multi-port interconnect circuits. Experimental results on several industry interconnect circuits demonstrate the advantage of the proposed method over the subspace projection based methods.

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    • "Motivated by the expanding complexity of nanoscale integrated circuits, the model order reduction (MOR) of RLC interconnect has been the focal point of substantial research efforts [1] [2] [3] [4] [5]. Model order reduction techniques can be divided into two categories, Singular Value Decomposition (SVD) methods and Krylov subspace projection methods. "
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