A CMOS 2.45-GHz radio frequency identification tag IC with read/write memory
Inst. of Microelectron., Singapore, SingaporeDOI: 10.1109/RFIC.2005.1489811 Conference: Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
Source: IEEE Xplore
A 2.45-GHz RFID tag chip was designed on standard 0.25- μm CMOS process. Using only MOS devices, the low-Vt rectifier circuit produces 100 μW of power with 2 dBm input. The tag IC with bidirectional communication and anti-collision features can be read from a distance of up to 15 cm under a reader power of 250 mW. The die area of 0.79 mm2 includes a 128-bit rewritable non-volatile memory.
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ABSTRACT: Overcoming the price hurdle that hampers mass-scale RFID adoption, this paper examines the architectural trade-offs as well as design issues involved in the development of a passive RFID tag IC targeted for low cost high volume deployment. Peculiar air-interfacing problems related to power rectification, data demodulation and backscattering modulation are addressed through the discussion of a design example whereby a 2.45-GHz RFID tag IC has been implemented in standard CMOS process.
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Conference Paper: A 2.45-GHz RFID tag with on-chip antenna[Show abstract] [Hide abstract]
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