qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking

Abstract

The use of Boolean Satisfiability (SAT) solver for hardware verification incurs exponential run-time in several instances. In this work we have proposed an efficient quantum SAT (qSAT) solver for equivalence checking of Boolean circuits employing Grover's algorithm. The Exclusive-Sum-of-Product based generation of the Conjunctive Normal Form equivalent clauses demand less qubits and minimizes the gates and depth of quantum circuit interpretation. The consideration of reference circuits for verification affecting Grover's iterations and quantum resources are also presented as a case study. Experimental results are presented assessing the benefits of the proposed verification approach using open-source Qiskit platform and IBM quantum computer.

Full text

qSAT: Design of an Efficient Quantum Satisfiability
Solver for Hardware Equivalence Checking
Abhoy Kole∗Mohammed E. Djeridane†‡ Lennart Weingarten‡Kamalika Datta∗‡ Rolf Drechsler∗‡
∗Cyber-Physical Systems, DFKI GmbH, Bremen, Germany
†Siemens Electronic Design Automation GmbH, Hamburg, Germany
‡Institute of Computer Science, University of Bremen, Bremen, Germany
abhoy.kole@dfki.de, {djeridan,len wei,kdatta,drechsler}@uni-bremen.de
Abstract—The use of Boolean Satisfiability (SAT) solver for
hardware verification incurs exponential run-time in several
instances. In this work we have proposed an efficient quantum
SAT (qSAT) solver for equivalence checking of Boolean circuits
employing Grover’s algorithm. The Exclusive-Sum-of-Product
based generation of the Conjunctive Normal Form equivalent
clauses demand less qubits and minimizes the gates and depth
of quantum circuit interpretation. The consideration of reference
circuits for verification affecting Grover’s iterations and quantum
resources are also presented as a case study. Experimental results
are presented assessing the benefits of the proposed verification
approach using open-source Qiskit platform and IBM quantum
computer.
Index Terms—Quantum Computing, SAT Solver, Grover’s Al-
gorithm
I. INTRODUCTION
Real-world applications like hardware verification often pose
a significant challenge for finding solutions in polynomial
time. The verification problem is often formulated as Boolean
Satisfiability (SAT) problem in the form of a miter circuit
for SAT solving using state of the art solvers like Z3 Satis-
fiability Modulo Theory (SMT) solver [1]. The SAT problem
is the first discovered NP-Complete problem [2], and often
relies on heuristics for solutions, e.g. the widely used CDCL
algorithm [3] in modern SAT solvers, that also suffers from
exponential run-time in the worst case.
It is observed that, equivalence checking becomes more
easier when the Boolean circuits are of similar structure [4].
Major problem is faced when verifying digital circuits with
asymmetric structures. Fig. 1 shows the run-time and memory
requirements needed by Z3 SMT solver for verification of two
structurally different multipliers, M1:USP +AR +C R and
M2:USP +W T +CL for bit-range 4to 12. In both mul-
tipliers, the first stage consists of an Unsigned Simple Partial
Product Generator (U SP ). They differ in the partial product
accumulator and final stage. One uses an Array Multiplier (AR)
and Carry Ripple Adder (CR), and the other Wallace Tree
multiplier (WT) and Carry Look-ahead Adder (CL). A massive
increase in the verification time is observed by adding a single
bit from 11 to 12.
Quantum computing on the other hand exploiting quantum
mechanical phenomena, e.g. superposition and entanglement,
seems promising to achieve substantial speed-up over some
classical algorithms. The emergence of noisy intermediate-
4 5 678 9 10 11 12
0
4
8
12
16
20
Bit width
Hours
time
(a) Time requirement
4 5 678 9 10 11 12
0
100
200
300
400
Bit width
MegaByte
max memory
(b) Memory requirement
Fig. 1: Time and memory requirements of SAT based verification of
multipliers.
scale quantum (NISQ) computers [5] enables one to formulate
problems taking advantage of such systems. In this respect,
the verification problem is designed as a quantum operator and
a quantum version of SAT solver (qSAT) is formulated using
Grover’s search algorithm [6] to find solutions with a quadratic
speed-up over classical searching algorithms.
In this paper we have introduced an ESOP based method
for clause generation and corresponding quantum miter circuit
interpretation that incurs reduced gate and depth overhead.
We have also shown that our approach is linear in terms of
number of gates present in the circuits considered for verifi-
cation. Finally, we present the qSAT architecture for finding
solution to the constructed miter circuits. Further, usage of
different reference circuits for verification and corresponding
resource requirements are also analyzed and presented in the
form of case studies. Experiments are conducted to exhibit
the advantage of the proposed qSAT approach for hardware
verification using open-source Qiskit [7] platform and IBM
quantum computer. The main contributions of the present work
can be summarized as follows:
•Developing the comprehensive architecture of the qSAT
solver by leveraging Grover’s search algorithm.
•Optimizing the search space by utilizing ESOP-based
clause generation and miter circuit implementation.
•Assessing the qSAT solver based on gate overhead, so-
lution probability, and operational fidelity across selected
benchmarks with specific faults.
The remainder of the paper is structured as follows: Section
II presents the background on quantum circuit models and
the architecture of existing SAT solvers. Section III details
arXiv:2409.03917v1 [quant-ph] 5 Sep 2024

|a⟩X•X X •X|a⟩
|b⟩• • |b⟩
|c⟩ |c⊕ F(a⇒b)⟩
Fig. 2: Quantum circuit interpretation of a Boolean function,
F(a, b) = a⇒b.
the proposed ESOP-based clause generation, miter formation,
and the qSAT solver architecture, including a case study on
multiplier and 1-bit full-adder operations. In Section IV, we
demonstrate the efficiency of the proposed qSAT solver in
terms of resource overhead, solution accuracy probability, and
operational reliability. Finally, concluding remarks are provided
in Section V.
II. BAC KGRO UND
A. Quantum Circuit
A quantum circuit consists of multiple qubits, on which a
series of gate operations is applied [8]. A circuit consisting of n
qubits may contain one or more quantum gates that can operate
on mqubits where m⩽n. The gate operations are represented
by unitary square matrices and qubit states are described as unit
vectors representing basis states |0⟩or |1⟩or as linear sum,
|ψ⟩=α|0⟩+β|1⟩, where αand βare complex coefficients
and |α|2+|β|2= 1. Upon measurement, the state |ψ⟩may
collapse to one of the basis states, |0⟩or |1⟩, with probabilities
|α|2and |β|2respectively.
Quantum circuits are often described using a set of specific
gates. Fig. 2 shows a 3-qubit quantum circuit implementing the
Boolean function, F:a⇒busing NOT (X), CNOT (CX) and
Toffoli (C2X) gates. Multiple control Toffoli gates, i.e. CnX,
for n⩾3may also use for quantum circuit realization with
their control inputs of positive and negative polarity that are
denoted by •and ◦, respectively, For execution on a real device
like IBM quantum computer, the realized quantum circuit needs
to be redescribed using single- and two-qubit primitive gates,
e.g. Hadamard (H), Phase (P), Xand CX gates supported by
the device.
B. SAT Solvers
For Boolean Satisfiability (SAT) problem, the solution is
to determine an interpretation of the variables, also termed
as literals, that satisfy the described problem (SAT), if any
such interpretation exists; otherwise, the problem becomes
unsatisfiable (UNSAT) [9]. Conjunctive normal form (CNF)
is used for representation of problem instances, which is a
conjunction of clauses where the clauses are defined as the
disjunction of literals. For example, (a∨b)∧(a∨c)represents
a SAT instance with two clauses, (a∨b)and (a∨c)where
a= 1, and b=c= 1 are satisfying literal assignments.
For hardware verification, SAT-based equivalence checking
is performed between a circuit-under-assessment (GI) and a
reference model (GR). First, a miter circuit is assembled using
both the circuits as shown in Fig. 3 to simplify the equivalence
checking into a SAT problem and is then solved by using a SAT
GI
GR
OI
OR
•
•
•
•
X•
k
ϕ
Fig. 3: Miter circuit for hardware verification of Boolean circuits.
solver, e.g. Z3 [1]. If the circuits are not equivalent, the solver
returns SAT and a set of counter-examples (CEXs) that consists
of the value of literals that satisfy the problem. The solver
returns UNSAT when the circuits are functionally equivalent.
III. PROP OSE D QUA NT UM SAT SO LVE R
A. ESOP-Based Clause Generation
In SAT-based verification of synthesized classical circuits,
individual gates are often translated into clauses applying
schemes like the one presented by Tsytin [10]. Such translations
also introduce auxiliary variables that together with the product
clause terms are expensive for obtaining equivalent unitary
realizations. For example, an auxiliary variable prepresenting
2-input Boolean OR operation of the form q∨ron variables q
and r, i.e. F:p⇔(q∨r)leads to the following conjunctive
normal form (CNF) clauses:
p⇔(q∨r)=(p∨ ¬q)∧(p∨ ¬r)∧(¬p∨q∨r).(1)
While disjunctions like Wk
i=1 xihas optimal realization in
exclusive sum-of-products (ESOP) form as 1⊕Vk
i=1(¬xi)
for k⩾2due to [11], a direct interpretation of the CNF
corresponds to (1) in the quantum circuit model will still incur
large resource overheads (i.e., number of qubits, gates and
circuit depth) as presented below:
|p⟩•|p⟩
|q⟩•|q⟩
|r⟩•|r⟩
|0⟩X•|p∨ ¬q⟩
|0⟩X•|p∨ ¬r⟩
|0⟩X•|¬p∨q∨r⟩
|0⟩ |F :p⇔(q∨r)⟩
(2)
Logic expressions like F:p⇔ G can have different ESOP
forms:
p⇔ G =((¬p∧ ¬G)⊕(p∧ G),
1⊕p⊕ G.(3)
This allows one to redefine expression of this form: p⇔(q∨r)
as either ¬p∧¬(q∨r)⊕p∧(q∨r)or as p⊕(¬q∧¬r), instead
of CNF representation (1), with the corresponding quantum
circuit interpretations as follows:

x1xk
a1a2
···
a3
⇔ GR
⇔ GI
⇔a1⊕a2
F:GI⊕ GR
:X
(a)
kVF
|X⟩/GIGR|X⟩
|a1⟩•L|a1⟩
|a2⟩•|a2⟩
|a3⟩• • |a3⟩
|0⟩•|a1⇔ GI⟩
|0⟩•|a2⇔ GR⟩
|0⟩•|a3⇔pI⊕pR⟩
|y⟩ |y⊕ F⟩
(b)
kUF
|X⟩/GIGRGRGI|X⟩
|a1⟩•L L •|a1⟩
|a2⟩• • |a2⟩
|a3⟩••• |a3⟩
|0⟩•|0⟩
|0⟩•|0⟩
|0⟩•|0⟩
|y⟩ |y⊕ F⟩
(c)
Fig. 4: An illustration of a quantum miter circuit realization; (a) classical miter circuit Ffor doing equivalence checking of Boolean circuits GI
and GR; (b) quantum circuit interpretation of Fadditionally realizing operations inferred on auxiliary variables a1,a2and a3; (c) uncomputing
the inferences on a1,a2and a3applying respective operations in reverse order.
p⇔(q∨r)
|p⟩•
|q⟩W≡
|r⟩
|y⟩
•
≡
|0⟩X•|q∨r⟩
•|p⟩
|q⟩
|r⟩
|y⊕p⇔(q∨r)⟩
(4)
Thus, considering Gas a k-input function of types: OR
(Wk
i=1 xi), AND (Vk
i=1 xi), and XOR (Lk
i=1 xi) lead to the
following ESOP forms:
p⇔
k
_
i=1
xi=p⊕
k
^
i=1 ¬xi, (5)
p⇔
k
^
i=1
xi= 1 ⊕p⊕
k
^
i=1
xi, (6)
p⇔
k
M
i=1
xi= 1 ⊕p⊕
k
M
i=1
xi. (7)
Similarly, for the negation (¬) of G, corresponding ESOP
forms can be obtained from (3) by replacing Gwith either
¬G or 1⊕ G, respectively, e.g. an ESOP form for the NOR
(¬Wk
i=1 xi) operation will be then:
p⇔ ¬k
_
i=1
xi= 1 ⊕p⊕
k
^
i=1 ¬xi. (8)
For an arbitrary k-input single-target function, G(x1, . . . , xk)
an optimal ESOP form can be obtained employing techniques
like [12] and then using (3) the corresponding ESOP forms
for the auxiliary variable prealizing Gor ¬G can be derived.
Thus, quantum circuit interpretation of these ESOP-based SAT
clauses for each auxiliary variable requires no more than one
additional qubit and the implementation can be claimed optimal
provided inexpensive ESOP form of Gis employed.
B. Quantum Miter Circuit Realization
In order to verify an implemented Boolean circuit GI, against
its corresponding golden reference, GR, SAT clauses are de-
duced by introducing auxiliary variables a1and a2representing
respective functions in the form of a1⇔ GIand a2⇔ GR.
Then operational disparity between GIand GRare asserted
by inferring a XOR operation on variables a1and a2, using
another auxiliary variable a3, i.e. a3⇔a1⊕a2. Fig. 4 shows
the quantum circuit realizations of such miter operation for
evaluating F:GI⊕ GR.
The version of quantum miter implementation additionally
providing outcome of operations inferred on auxiliary variables,
i.e. VF(see Fig. 4b) is economical in terms of number of gates
required. This also seems to be useful for asserting the outcome,
F:GI⊕ GRon answer qubit |y⟩in the following way:
VF|X, A⟩|E⟩|y⟩=|X, A⟩ |E′⟩ |y⊕ GI⊕ GR⟩(9)
where |X⟩=|x1. . . xk⟩and |A⟩=|a1. . . al⟩represent
the states of input and auxiliary variables, |E⟩=|0. . . 0⟩
indicates the initial state of the ancilla used in computing the
inferred operations of the form ai⇔ G, and |E′⟩denotes the
corresponding final ancilla state.
The alternative quantum miter circuit that uncomputes these
inferred operations, ai⇔ G on auxiliary variables, ai, i.e.
UF(see Fig. 4c) is essential in situations where it becomes
necessary to associate only the miter outcome, F:GI⊕ GR
with the state of input and auxiliary variables as follows:
UF|X, A⟩=eiπ(GI⊕GR)|X, A⟩(10)
where |X⟩=|x1. . . xk⟩and |A⟩=|a1. . . al⟩denotes the state
of input and auxiliary variables.
While both the versions of quantum miter circuit, VFand
UF, differ in terms of required gate operations, the number of
required qubits remains identical for both and can be estimated
in the following way:
#qubits =|X|+ 2|A|+ 1 (11)

x1x3
a2
a3
a4
⇔ ¬∧
⇔ ∧
⇔ ⊕
F:GI⊕ GR
a1
x2
⇔ ¬∧
GR
GI
(a)
|x1⟩∧¬∧ |x1⟩
|x2⟩ |x2⟩
|x3⟩¬∧ |x3⟩
|a1⟩•|a1⟩
|a2⟩•L|a2⟩
|a3⟩•|a3⟩
|a4⟩• • |a4⟩
|0⟩•|a1⇔ ∧⟩
|0⟩•|a2⇔ ¬∧⟩
|0⟩•|a3⇔ ¬∧⟩
|0⟩•|a4⇔ ⊕⟩
|y⟩ |y⊕ F⟩
(b)
Fig. 5: (a) A miter network for verifying the implementation of a
3-input NAND operation using a pair of 2-input AND and NAND
operations; (b) quantum circuit interpretation of the miter network.
where |X|and |A|denote the number of input and auxiliary
variables present in the miter network. For example, Fig. 5
shows the implementation of a 12-qubit (= 3 + 2 ×4 + 1)
quantum miter circuit, VFfor the verification of a 3-input
NAND operation realized using a pair of 2-input AND and
NAND operations.
In order to verify a multi-output Boolean circuit, G1...m
I
with the corresponding golden reference, G1...m
Rwhere m
(⩾2) denotes the number of outputs, the miter circuit requires
an additional OR operation on auxiliary variables ai, i.e.
O ⇔ Wm
i=1 aithat are used to realize the XOR of the form
ai⇔bi⊕ci, where biand cirepresent the i-th equivalent
output, i.e. bi⇔ Gi
Iand ci⇔ Gi
R. A VFtype quantum circuit
interpretation of such miter, F:Wm
i=1 Gi
I⊕ Gi
Rcan be then:
k
|X⟩/G1
I. . . Gm
IG1
R. . . Gm
R|X⟩
|b1⟩•. . . . . . L|b1⟩
|c1⟩. . . •. . . |c1⟩
. . . . . . . . . . . . . . .
|bm⟩. . . •. . . L|bm⟩
|cm⟩. . . . . . •|cm⟩
|a1⟩. . . . . . •W|a1⟩
. . . . . . . . . . . .
|am⟩. . . . . . •|am⟩
|O⟩ . . . . . . • • |O⟩
|0⟩. . . . . . •|b1⇔ G1⟩
. . . . . . .
.
..
.
.. . . .
.
..
.
..
.
.■. . .
|0⟩. . . . . . •|O ⇔ Wm
i=1 ai⟩
|y⟩. . . . . . |y⊕ F⟩
(12)
A miter Fmay have more than one counter-example (CEX)
of the following form:
CEX =k
^
i=1
xi=vi∧l
^
j=1
aj=vj(13)
where xi∈Xand aj∈Aindicate input and auxiliary
variables respectively, and vi, vj∈ {0,1}are their respective
GI ∈ {1, . . . , π/4√2n}
n
|X, A⟩:|0⟩/Hn
UF
UD
VF
CEX
l
|E⟩:|0⟩/|E′⟩
|y⟩:|−⟩ |0⟩SAT/UNSAT
z }| {
1
Fig. 6: Outline of the qSAT Algorithm.
binary values. In order to exclude msuch CEX from the miter
outcome, Fone can consider the following augmented ESOP
form:
b
F=F ⊕
m
M
i=1
CEXi(14)
where CEXiindicates the i-th counter-example. The quantum
circuit interpretation of such augmented miter, b
Fcan be
obtained by realizing the miter, Fin either of VFor UF
form followed by placing multiple-controlled-Xoperation, or
Ck+lXin short, with the qubits representing input (X) and
auxiliary (A) variables as the control and the same answer
qubit, ythat is used for realizing outcome of F(see Fig. 4) as
the target in the following way:
Ck+lX|X, A⟩|y⟩=|X, A⟩ |y⊕X∧A⟩(15)
where the polarity of control qubits, xi∈Xor ai∈Ais
similar to the logic states, vi∈ {0,1}of the corresponding
satisfying assignment, and for optimal realization of such CnX
gate some of the reported compilation techniques ( e.g., [13]–
[15]) can be exploited. A Grover’s search based approach is
outlined next to find one of these CEXs as miter solution.
C. qSAT Architecture
In order to find a counter-example (CEX) for the constructed
quantum miter circuit, initially Grover’s search algorithm [6] is
exploited. The UFversion of the quantum miter circuit is used
as the oracle to conduct the phase inversion operation. This is
followed by the application of Grover’s diffusion (UD) operator
to amplify the probability of all possible CEXs. After placing
the qubits representing the input and auxiliary variables denoted
by Xand A, respectively in superposition, i.e. H⊗n|X, A⟩
where:
n=|X|+|A|, (16)
the oracle, UFand the diffuser, UDare applied in sequence for
a maximum of O(√2n)times. With the amplitude of CEXs are
being amplified, the quantum miter circuit is executed one more
time before applying quantum measurement operation to ensure
SAT/UNSAT miter outcome. For this final miter evaluation, VF
version can be used for optimal realization without affecting
the desired outcome. Fig. 6 shows the outline of the qSAT
algorithm where label Eindicates the additional qubits that
are used as ancilla such that |E|=|A|=ldue to (11) and
their final states denoted by |E′⟩are ignored from the measured
outcome. In a noise-free or fault-tolerant quantum processing

x1x3
a2
a3
a4
⇔ ∧
⇔ ¬
⇔ ∨
GR:MUX
a1
x2
⇔ ∧
(a)
x1x3
a1⇔ITE
b
GR:MUX
x2
(b)
Fig. 7: (a) A reference multiplexer clause network realization using
4auxiliary variables; (b) corresponding realization based on single
auxiliary variable.
environment, the additional miter (VF) execution in the qSAT
algorithm eliminates the need of classical verification of the
measured CEX.
A prior knowledge about the number of CEXs, (say, m) can
reduce the number of executions of Grover’s iteration (GI), i.e.
UFand UDin qSAT algorithm by setting GI =π/4p2n/m
(see Fig. 6). While mremains unknown in most of the cases and
can only be obtained by employing techniques like quantum
counting [16] in order to achieve the quadratic speed up over
classical exponential runtime, O(2n). In present scenario we
consider π/4p2n/m + 1 executions of the miter for obtaining
a verified CEX.
In order to exclude one or more CEXs from the evaluation
outcome, the miter, UFused in the qSAT algorithm (see Fig. 6)
must be replaced by the corresponding augmented miter, Ub
F
constructed based on Eqn. (14). This reduces the number of
remaining CEXs, m′(< m) which results in increased Grover’s
iteration. The miter, VFused for final verification of CEXs
should be kept unaltered.
Finally, the number of Grover’s iteration π/4p2n/m in-
creases rapidly with n(⩾10) that according to (16), can
be further reduced by minimizing the number of considered
auxiliary (A) variables while keeping the number of input (X)
variables unchanged. A possible solution towards this in the
form of a case study is presented next.
D. qSAT Optimization: Case Study
For multiplexer and 1-bit full-adder realizations of different
reference model, GRare analyzed in terms of the number of
required Grover’s iterations besides qubits, gates, and depths.
Multiplexer: The following description of a 2-input mul-
tiplexer:
MUX(x1, x2, x3)=(¬x1∧x2)∨(x1∧x3)(17)
can have the ESOP form:
ITE(x1, x2, x3) = x2⊕(x1∧x2)⊕(x1∧x3)(18)
where the logic states of x1decides either of the logic sate
of x2and x3as final output, i.e. If x1is high Then output
x1x3
a2
a3
⇔ ∧
⇔ ⊕
⇔ ⊕
GR,S :SUM
a1
x2
a5⇔ ∨
GR,C :CARRY
a4⇔ ∧
(a)
x1x3
a2⇔MAJ
b
GR,C :CARRY
x2
a1⇔ ⊕
b
GR,S :SUM
(b)
Fig. 8: (a) A reference 1-bit full-adder clause network with 5auxiliary
variables; (b) corresponding 2auxiliary variables based realization.
x3Else x2. Fig. 8 shows the corresponding multiplexer clause
networks based on (17) and (18). The usage of (17) in ESOP
based clause generation for GRrequires 4auxiliary variables
and respective quantum circuit interpretation requires additional
8(= 2×4, due to (11)) qubits, whereas using a single auxiliary
variable the same, denoted by b
GR(see Fig. 7b) can be achieved
using only 2additional qubits when (18) is exploited. This
besides providing inexpensive miter (UF/VF) and diffuser (UD)
realizations in terms of qubits, gates and depths, the number of
Grover’s iterations get reduced by a factor of √2−3when b
GR
is used as reference model in miter construction.
1-Bit Full-Adder: The functionality of a full-adder is often
represented in the following way:
SUM = (x1⊕x2)⊕x3and (19)
CARRY = ((x1⊕x2)∧x3)∨(x1∧x2), (20)
where x1,x2and x3are the inputs used in obtaining the
two outputs, SUM and CARRY. Clause realization for GR
based on (19) and (20) requires 5auxiliary variables as shown
in Fig. 8a and corresponding quantum circuit interpretation
demands 10 additional qubits due to (11). Considering the
CARRY as majority (MAJ) operation and SUM as 3-input XOR
operation, we can have the following ESOP form of the full-
adder:
SUM =x1⊕x2⊕x3and (21)
MAJ = (x1∧x2)⊕(x1∧x3)⊕(x2∧x3), (22)
that requires only 2auxiliary variables as shown in Fig. 8b and
leads to quantum circuit realization using 4additional qubits.
Thus for quantum miter realization the use of reference model
(b
GR) based on (21) and (22) also bring downs the number of
Grover’s iterations by a factor of √2−3.
IV. EXP ERI MEN TAL EVAL UATI ON
For assessing the effectiveness of the proposed qSAT based
verification approach, the open-source Qiskit [7] platform to-
gether with IBM quantum computer are used for construction
of quantum miter circuits, evaluation of quantum resource
requirements of qSAT solver and analyzing clause executions.

TABLE I: Boolean functions considered for qSAT experiments.
Name Description Faults #CE X
AND (x1∧x2)∧x3¬∨ 2
NAND (x1∧x2)¬∧ x3∨2
OR (x1∨x2)∨x3⊕1
NOR (x1∨x2)¬∨ x3¬⊕ 3
XOR (x1⊕x2)⊕x3¬⊕ 8
XNOR (x1⊕x2)¬⊕ x3∧6
MUX (¬x1∧x2)∨(x1∧x3)¬∧ 6
CARRY (x1⊕x2)∧x3∨(x1∧x2)¬∨ 4
FA (x1⊕1x2)⊕x3,¬⊕1,¬∨28
(x1⊕1x2)∧x3∨(x1∧2x2)
A. Considered Boolean Functions
For equivalence checking, Boolean functions with the fol-
lowing realizations using: (i) inverter (¬) and 2-input logic
gates, and (ii) 3-input logic gates including multiplexer (ITE)
and carry (MAJ) operations are considered as reference models
and are denoted by GRand b
GR, respectively. The corresponding
faulty versions, i.e. GF, are then obtained by replacing one
or more 2-input gates from the GRtype reference networks.
Table I shows the list of Boolean functions considered for the
experiments, along with their logic descriptions in terms of 2-
input gates (GR), inserted faults replacing the logic operation
highlighted in red color to obtain faulty realization (GF) and
number of counter-example (CEX) that results in evaluating
the corresponding miter of the form GF⊕ GRusing Z3 SMT
solver [1]. Based on two different reference models GRand
b
GR, the ESOP based clauses are generated for the respective
miters: GF⊕ GRand GF⊕b
GR.
B. Resources Assessment for qSAT Solving
For the construction of qSAT network, initially quantum
circuit interpretation of the miters, GF⊕GRand GF⊕b
GRare ob-
tained. Then based on the number of input variables (|X|), aux-
iliary variables (|A|) and counter-examples (#CEX ), Grover’s
iteration (GI) is derived in the following way:
GI =1
2s2|X|+|A|
#CE X .(23)
The obtained qSAT network is compiled using Qiskit
transpiler setting {CX, X, P, H }as basis gates and
optimization level = 3. For optimal realization, all CnX
type gates of size n+ 1 qubits (n⩾2) from the qSAT
network are compiled either in v-chain or v-chain-dirty mode
depending on the availability of remaining n−2qubits in the
network and their current state. Table II shows an analysis of
quantum resources required by the qSAT network for both
versions of the quantum miters, GF⊕GRand GF⊕b
GR. Since
for all the Boolean functions the number of inputs remain
unchanged, i.e. |X|= 3, the usage of reference models of
the form b
GRresults in less number of auxiliary variables and
Grover’s iterations. This leads to inexpensive qSAT networks
in terms of qubits (#q), single- and two-qubit gates (#Uand
#CX , respectively), and depth (#D) compared to the qSAT
networks obtained considering GRas the reference model.
AND
NAND
OR
NOR
XOR
XNOR
MUX
CARRY
0
0.25
0.5
0.75
1
Probability of SAT
M:GF⊕ GR
c
M:GF⊕b
GR
|M−c
M|
Fig. 9: qSAT accuracy in providing SAT for miters, GF⊕ GRand
GF⊕
b
GR.
C. Evaluation of qSAT Outcome
For evaluation of qSAT networks we consider Qiskit Aer
simulator as an ideal environment. The probability of SAT
outcome for each miter, M∈ {GF⊕GR,GF⊕b
GR}, is computed
in the following way:
PM(SAT ) = 1
#run
n
X
i=1
P(CE Xi)(24)
where #run indicates the number of solver executions for
Mand P(CE Xi)denotes the probability of obtaining the
corresponding i-th counter example. Fig. 9 shows a comparison
of execution results for all the miter circuits of types, GF⊕GR
and GF⊕b
GR. It can be observed that for miter, GF⊕b
GR, qSAT
solver provides similar results, i.e. P(SAT )⩾75% utilizing
comparatively less quantum resources than the miter, GF⊕GR.
Due to experiencing longer simulator run-time, the results for
FA are not considered in the present analysis.
D. Analysis of Reference Model Fidelity
To assess the fidelity of both the versions of reference
models, GRand b
GR, the following CNF forms:
U=ϕ∧(ϕ⇔ GR)(25)
b
U=ϕ∧(ϕ⇔b
GR)(26)
are considered for quantum circuit interpretation. Initially,
putting input (X) and auxiliary (A) qubits in superposition
applying Hadamard (H) gates, the CNFs, Uand b
Uare exe-
cuted in isolation on a IBM quantum computer, ibm brisbane
with parameters: basis gates ={ECR, RZ, SX, X }and
routing method =‘sabre’, and their probability of expected
outcomes, computed using approach similar to (24), are pre-
sented in Fig. 10. The b
GRtype reference model shows higher
operational fidelity for almost all Boolean functions.
V. CONCLUSION
In this paper we introduce an improved quantum version
of the Boolean Satisfiability solver known as qSAT. Initially

TABLE II: Analysis of quantum resources for qSAT solving of quantum miters constructed using GRand
b
GRtype reference models.
qSAT(GF⊕ GR)qSAT(GF⊕b
GR)Improv.(%)
Name #q|A|GI #CX #U#D#q|A|GI #C X #U#D#q#C X #U#D
AND 14 5 6 969 1669 1542 12 4 4 418 534 787 14.29 56.86 68.00 48.96
NAND 14 5 6 969 1630 1530 12 4 4 418 531 787 14.29 56.86 67.42 48.56
OR 14 5 8 1197 2061 2063 12 4 6 628 808 1137 14.29 47.54 60.80 44.89
NOR 14 5 5 777 1349 1330 12 4 3 340 443 618 14.29 56.24 67.16 53.53
XOR(SUM) 14 5 3 413 624 765 12 4 2 239 247 385 14.29 42.13 60.42 49.67
XNOR 14 5 3 441 680 845 12 4 2 229 251 387 14.29 48.07 63.09 54.20
MUX 22 9 13 3433 5608 5651 16 6 5 1011 1692 1649 27.27 70.55 69.83 70.82
CARRY 22 9 16 4245 7114 7123 16 6 6 1284 2088 2067 27.27 69.75 70.65 70.98
FA 30 13 45 16413 26781 26741 24 10 16 4941 7776 7742 20.00 69.90 70.96 71.05
AND
NAND
OR
NOR
XOR
XNOR
MUX
CARRY
0
5·10−2
0.1
0.15
0.2
Probability of Expected Outcome
U:ϕ∧(ϕ⇔ GR)
b
U:ϕ∧(ϕ⇔b
GR)
|U−b
U|
Fig. 10: Fidelity of reference models, GRand
b
GRon a IBM quantum
computer.
the clauses are generated using ESOP based method, then the
miter circuit is proposed. The proposed method results in circuit
generation with fewer qubits, which is also linear in terms
of number of gates present in the circuit. Finally, the qSAT
architecture is proposed which exploits the benefit of Grovers
search algorithm. Experimental results reveal that our proposed
qSAT architecture require less quantum resources in terms of
gates and depth. Fidelity analysis is also performed on the
reference models. To the best of our knowledge this is a first
attempt towards design of a complete qSAT solver.
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