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Effects of heating strategies and ballistic transport on the transient thermal conduction in 3D FinFETs

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Efficiently capturing the three-dimensional spatiotemporal distributions of temperature is of great significance for alleviating hotspot issues in 3D FinFETs. However, most previous thermal simulations mainly focused on the steady-state problem with continuous heating. Few studies are conducted for the transient thermal conduction in 3D FinFETs with non-continuous heating, which is actually closer to the reality. To investigate the effects of heating strategies on the transient micro/nano scale thermal conduction in 3D FinFETs, three heating strategies are considered, including `Continuous', `Intermittent' and `Alternating' heating. A comparison is made between the phonon BTE solutions and the data predicted by the macroscopic diffusion equation, where the effect of boundary scattering on phonon transport is added into the effective thermal conductivity. Numerical results show that it is not easy to accurately capture the heat conduction in 3D FinFETs by the macroscopic diffusion equation, especially near the hotspot areas where ballistic phonon transport dominates and the temperature diffusion is no longer valid. Different heating strategies have great influence on the peak temperature rise and transient thermal dissipation process. Compared to `Intermittent' or `Continuous' heating, the temperature variance of `Alternating' heating is smaller.
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Eects of heating strategies and ballistic transport on the transient thermal conduction in
3D FinFETs
Chuang Zhanga, Ziyang Xinb, Qin Louc, Hong Lianga,
aDepartment of Physics, School of Sciences, Hangzhou Dianzi University, Hangzhou 310018, China
bSchool of Energy and Power Engineering, Huazhong University of Science and Technology, Wuhan, 430074, China
cSchool of Energy and Power Engineering, University of Shanghai for Science and Technology, Shanghai 200093, China
Abstract
Eciently capturing the three-dimensional spatiotemporal distributions of temperature is of great significance for alleviating hotspot
issues in 3D FinFETs. However, most previous thermal simulations mainly focused on the steady-state problem with continuous
heating. Few studies are conducted for the transient thermal conduction in 3D FinFETs with non-continuous heating, which is
actually closer to the reality. To investigate the eects of heating strategies on the transient micro/nano scale thermal conduction in
3D FinFETs, three heating strategies are considered, including ‘Continuous’, ‘Intermittent’ and ‘Alternating’ heating. A comparison
is made between the phonon BTE solutions and the data predicted by the macroscopic diusion equation, where the eect of
boundary scattering on phonon transport is added into the eective thermal conductivity. Numerical results show that it is not
easy to accurately capture the heat conduction in 3D FinFETs by the macroscopic diusion equation, especially near the hotspot
areas where ballistic phonon transport dominates and the temperature diusion is no longer valid. Dierent heating strategies have
great influence on the peak temperature rise and transient thermal dissipation process. Compared to ‘Intermittent’ or ‘Continuous’
heating, the temperature variance of Alternating’ heating is smaller.
Keywords: Micro/nano scale heat conduction, Fin field-eect transistors, Hotspot issues, Boltzmann transport equation, Discrete
unified gas kinetic scheme
1. INTRODUCTION
Advanced process technologies represented by Fin field-
eect transistors (FinFETs) continue to promote the develop-
ment of the semiconductor and microelectronics industries [1,
2, 3, 4]. However, when the number density, heat generation
power and heat flux density of transistors increases sharply,
the hotspot problem becomes increasingly serious, threatening
the safe operation of electronic devices [5, 6, 7]. As a main-
stream structure in logic chips or semiconductor devices, single
three-dimensional FinFET unit has geometric dimensions rang-
ing from tens of nanometers to hundreds of nanometers. This
size scale is comparable to the phonon mean free path of room
temperature silicon, so that the classic Fourier law of heat con-
duction no longer holds [8, 9, 10, 11]. Therefore, it is very im-
portant to understand the micro/nano scale heat transfer physics
and eciently predict the three-dimensional temporal and spa-
tial distributions of temperature in order to alleviate the hotspot
problem in microelectronics [12, 13, 14, 15, 16].
A mainstream engineering treatment method is to adopt a 3D
heat diusion equation with an eective thermal conductivity
which takes into account the size eect [14, 15, 17, 12, 18, 19,
Corresponding author
Email addresses: zhangc520@hdu.edu.cn (Chuang Zhang),
xinziyang@hust.edu.cn (Ziyang Xin), louqin560916@163.com (Qin
Lou), lianghongstefanie@163.com (Hong Liang)
20]. This method is widely used in many industrial softwares
such as TCAD, ANSYS and COMOSL. These softwares con-
tain huge material databases, so that the users can select the
appropriate thermal conductivity coecient based on the mate-
rial components, size, temperature, doping concentration, etc.
This also indicates that its numerical accuracy significantly de-
pends on the engineers’ experience. The disadvantage is that
it still assumes a linear relationship between the heat flux and
temperature gradient. To solve this drawback, many macro-
scopic moment equations [21, 22, 23, 24, 9] have been devel-
oped by introducing time delay terms, memory eects, heat flux
nonlinearity or nonlocal terms, that is, introducing high-order
derivatives or tensors of temperature and heat flux with respect
to time and space. These non-Fourier heat conduction models
can capture non-equilibrium or non-diusive eects to some
extent. However, a small parameter expansion assumption is
usually adopted during derivation process, so that it is dicult
for most of them to accurately characterize ballistic transport,
especially in complex 3D geometries.
Another accessible method is to numerically solve the meso-
scopic phonon Boltzmann transport equation (BTE) [25, 12, 26,
27]. Adisusilo, et al used the Monte Carlo method to simulate
the thermal properties of a 3D bulk FinFET with gate length
22 nm and fin thickness 8 nm. Numerical results show that
the peak temperature predicted by classical Fourier’s law is 100
K lower than that of Monte Carlo method. Hu, et al [28] and
Zhang, et al [19] used the synthetic iterative scheme to capture
Preprint submitted to ELSEVIER January 14, 2025
arXiv:2408.08120v2 [cond-mat.mes-hall] 13 Jan 2025
non-equilibrium thermal conduction in 3D bulk FinFET. Nu-
merical results show that the peak temperature rise in FinFET
predicted by the phonon BTE deviates from those predicted by
the macroscopic diusion equation even if an eective thermal
conductivity is used [19].
The phonon BTE is usually regarded as the core bridge
in connecting microscopic or macroscopic methods in many
multi-scale thermal simulation [29]. For instance, the IMEC
research team [30, 15, 14] used the modular method to evaluate
the thermal performance of the back-end of line. They calcu-
lated the thermal physical parameters of electrons and phonons
using the first principles as the input parameters of BTE, and
then used the Monte Carlo method to numerically solve the
BTE and extracted the eective thermal conductivity of materi-
als such as nanoscale interconnects and through-holes. Finally,
the macroscopic diusion equation is solved to extract the ef-
fective thermal resistance of each layer of back-end of line in
a reasonable calculation time. The Intel research team [12, 18]
numerically solves the phonon BTE to obtain the eective ther-
mal conductivity of the entire silicon fin or nanowires, where
the heat source term is obtained from electron-phonon cou-
pling. After that, a larger thermal simulations at the cell or
circuit level is conducted to assess the eects of self-heating on
interconnects and circuits by numerically solving the macro-
scopic equation.
In the above studies of heat dissipation in FinFETs [31,
32, 18, 15, 33], a continuous heating source is usually used
and steady-state temperature field is analyzed. However, the
electronic equipments do not always work and the transient
thermal evolution process is much more noteworthy in real-
ity [34, 12, 35]. In this paper, the eects of heating strate-
gies on the transient thermal conduction in FinFET are inves-
tigated based on the phonon BTE. Three heating strategies are
accounted and the associated steady or unsteady thermal dissi-
pations processes are simulated, analyzed and discussed. The
rest of this article is organized as follows. Theoretical models
and methods are introduced briefly in Sec. 2. Results and dis-
cussions for the heat dissipation in FinFETs are conducted in
Sec. 3. Finally, conclusion and outlook are made in Sec. 4.
2. MODELS
The phonon BTE under the single-mode relaxation time ap-
proximation (RTA) is used to describe the phonon transport in
FinFETs [36, 25, 37, 37, 38, 26, 27, 18, 39],
f
t+vgs· xf=feq f
τ+1
4π˙
S,(1)
where f=f(x,s,t) is the phonon distribution function of en-
ergy density, which depends on spatial position x, unit direc-
tional vector sand time t.feq is the associated equilibrium
distribution function, vgis the phonon group velocity, τis the
relaxation time and ˙
S=˙
S(x,t) is the external heat source. Tak-
ing an integral of Eq. (1) over the solid angle space dleading
to the first law of thermodynamics with energy Uand heat flux
q,
U
t+x·q=Zfeq f
τd + ˙
S=˙
S,(2)
U=Zf d = CT,q=Zvgsf d .(3)
where Cis the specific heat and Tis the temperature. The
phonon scattering kernel satisfies energy conservation,
Zfeq f
τd = 0.(4)
Silicon and silicon dioxide are two main semiconductor mate-
rials in FinFETs, and their thermal properties at room temper-
ature 300 K can be obtained from previous references [40, 41,
42], as listed in Table. 1.
Table 1: Thermal properties of room temperature silicon (Si) and silicon diox-
ide (SiO2) [40, 41, 42].
C(J·m3·K1)vg(m·s1)λ(nm)
Si 1.5E6 3.0E3 100.0
SiO21.75E6 5.9E3 0.4
Discrete unified gas kinetic scheme (DUGKS) [36, 43] is
used to solve the phonon BTE accounted for the interfacial
thermal resistance [44, 45, 46, 17]. Detailed introductions
and numerical settings can be found in Appendix A and Ap-
pendix B. Note that the numerical discrete solution of the
seven-dimensional phonon BTE requires extremely high com-
puting resources and cost. Hence, the isotropic wave vector
and frequency-independence assumption is used in the present
paper to achieve a good balance between computational e-
ciency and accuracy. All numerical simulations are conducted
by a home-made C/C++ program [43, 35].
3. RESULTS AND DISCUSSIONS
Motivated by previous thermal simulations of 3D Fin-
FET [33, 47, 18, 32, 19] based on the phonon BTE, we only
investigates the three-dimensional transient phonon conduction
problem in single or several FinFETs in this paper. Schematics
of 3D bulk or SOI FinFETs are shown in Fig. 1, both of which
are composed of silicon fin, silicon dioxide insulation layer and
silicon substrate with several contact interfaces. The system
sizes in the x,y,zdirection of a single FinFET are 28nm, 56 nm
and 82 nm, respectively. Front, back, left and right surfaces are
all symmetric boundaries. The whole diagram is geometrically
symmetric in the xand ydirections with respect to the purple
dot dash lines. Bottom surfaces are the heat sink with fixed en-
vironment temperature and the other surfaces are all diusely
reflecting adiabatic boundaries. The heat source is located in
the fin area, whose system size in the x,y,zdirection are 8, 10
and 32 nm, respectively. The entire structure size is approxi-
mately a 7 nm technology node transistor.
Three heating strategies are mainly considered, where ‘Con-
tinuous’ represents that the two external heat sources always
2
Heat source
SOI FinFETBulk FinFET
z
x
y
8
32
40
10
28
Heat source
Size: nm Si SiO2
56
20 18
10
Heat source
10
Heat source
tp2tp
Heating strategy
0.5tp
Continuous
Intermittent
Alternating
Figure 1: Three-dimensional global graph of four bulk or silicon-on-insulator
(SOI) FinFETs. For the red and blue heat source areas in 3D FinFETs, the fol-
lowing three heating strategies are used, including ‘Continuous’, ‘Intermittent’,
‘Alternating’, where tpis a heating period.
heat the system. It indicates a steady heat source, which is used
in most previous papers. ‘Intermittent’ represents that the two
external heat sources work together and both of them heat the
system in a half time. It is a bit like the heating method in
pump-probe experiments, where the heat source heats the sys-
tem for a while and does not heat it for a while. ‘Alternating’
represents that the two external heat sources work alternatively
and each one heats the system in a half time, where tpis a heat-
ing period. It is much like the N and P type transistors in chips
are periodically arranged on the substrate and interlace to work
when the AC voltage is loaded. For typical chips in electronic
devices (e.g., laptop), the working frequency is about 4 GHz
so that we set tp=0.25 ns. The maximum heating power
is 5.0×1016 W·m3. The temperature dependence of phonon
thermophysical parameters [43, 19] is not accounted, therefore,
the predicted temperature rise is basically linear to the input
power density based on dimensionless analysis of the phonon
BTE [36].
A lot of previous experimental or theoretical work has
proven the failure of classical Fourier’s law at the micro/nano
scale [10, 48, 49, 11], so we focus on comparing the BTE re-
sults with the macroscopic diusion equation with empirically
modified eective thermal conductivity coecients [14, 15, 17,
12, 18, 19, 20], namely, eective Fourier’s law (EFL). Detailed
introductions and numerical discretizations can be found in Ap-
pendix C.
Firstly, steady-state temperature fields in bulk or SOI FinFET
are simulated and compared in Fig. 2 with ‘continuous heat-
ing’. It can be found that the deviations of temperature fields
in the whole domain between the BTE and EFL are smaller in
SOI FinFET that those in bulk FinFET. The underlying physi-
cal mechanisms can be explained from the perspective of mate-
(a) (b) (c)
(d) (e) (f)
Figure 2: The first two column are the steady temperature contour of a half of
FinFET under ‘Continuous’ heating. The last column is the schematic of heat
dissipation path from the heat source to heat sink in the XZ plane. (a,b,c) Bulk
FinFET. (d,e,f) SOI FinFET. (a,d) BTE. (b,e) EFL.
rial composition and phonon transport properties. Schematics
of heat dissipation paths in bulk FinFET and SOI FinFET are
shown in Fig. 2(c) and (f), respectively, where there is ther-
mal resistance in the channels between two nodes. In SOI Fin-
FET (Fig. 2(f)), phonons must pass through two Si/SiO2inter-
faces and the silicon dioxide region when they need to trans-
port thermal energy from the heat source region to the heat sink
region. On one hand, the small phonon mean free path in sil-
icon dioxide leads to a diusive transport, where the EFL is
valid. On the other hand, two Si/SiO2interfaces significantly
increases the thermal resistance and decreases the heat dissipa-
tion eciency. As shown in Fig. 2(d,e), the temperature gradi-
ent is basically along the zdirection and the temperature vari-
ance presents a linear distribution in the silicon dioxide and bot-
tom silicon substrate areas. On the contrary, phonons can trans-
fer energy directly from the heat source region to the bottom
heat sink only through the silicon material in the bulk FinFET
after absorbing a large amount of energy from the heat source,
namely, heat dissipation path 1 236 in Fig. 2(c). In this
process, ballistic transport dominates the heat conduction. Al-
though a lower eective thermal conductivity is introduced in
the EFL, the linear assumption between the heat flux and tem-
perature gradient still leads to some deviations compared to the
results of phonon BTE. If we consider the nonlinear, nonlocal,
time delay or memory eects in the macroscopic equation, the
deviation between the macroscopic simulations and the phonon
BTE may be smaller.
In addition, the temperature fields in bulk FinFET predicted
by phonon BTE in the bottom silicon substrate areas (Fig. 2a)
are completely dierent from those predicted by EFL (Fig. 2b).
Actually it is a competition result of two heat dissipation chan-
nels with dierent heat transfer eciency and various phonon
transport behaviors, which can be explained according to the
3
0 800 1600 2400
300
300.5
301
301.5
302
(a) Bulk FinFET
0 2500 5000 7500
300
300.5
301
301.5
302
302.5
303
303.5
304
(b) SOI FinFET
Figure 3: Transient evolutions of the maximum temperature in the 3D hotspot
system under three heating strategies.
heat dissipation channel 2 45 and 2 35 in Fig. 2(c). In
heat dissipation channel 2 45, on one hand, two interfacial
thermal resistance exists in the thermal transport process from
2 to 4 and from 4 to 5. One the other hand, the phonon mean
free path of silicon dioxide is much smaller than 8 nm. In heat
dissipation channel 2 35, the transfer of thermal energy
only happens in the silicon materials without interfacial ther-
mal resistance and ballistic phonon transport dominates heat
conduction. Compared tp channel 2 35, there is larger ther-
mal resistance and lower phonon transport eciency in channel
245. Hence, it can be found that the temperature contour
line in bottom silicon areas is even perpendicular to the bottom
surface. When using the EFL, ballistic phonon transport in heat
dissipation channel 2 35 is replaced by the temperature dif-
fusion with an eective thermal conductivity. It is well known
that one of the drawbacks of the diusion equation is that it has
an infinite heat propagation speed [22], namely, the eect of a
temperature fluctuation or change at any spatial point can in-
stantly aect the entire region. Hence, it can be found that the
(a) t=0.05tp(b) t=0.25tp(c) t=0.5tp
(d) t=0.55tp(e) t=0.75tp(f) t=1.00tp
Figure 4: Transient temperature contour of a half of bulk FinFET predicted by
BTE under ‘Intermittent’ heating when the system reaches the periodic steady
state.
temperature contour line mainly parallel to the bottom surface.
Secondly, the evolution of transient peak temperature over
time in bulk or SOI FinFET under three heating strategies is
shown in Fig. 3. The temperature predicted by EFL rises more
slowly than BTE at the initial stage, and it also takes longer to
reach the periodic steady state. When the system reaches the pe-
riodic steady state, the transient temperature predicted by EFL
is also inconsistent with the BTE results. For example, the ‘In-
termittent’ heating has a higher peak temperature rise than that
of Alternating’ heating in the heating stage and has a lower
peak temperature in the second half of the heating period in
the BTE solutions. However, in the EFL prediction results, the
maximum temperature of the Alternating’ heating is lower than
that of the ‘Intermittent’ heating in the second half of the heat-
ing period. Compared to ‘Intermittent’ heating, the temperature
variance of Alternating’ heating is smaller.
Thirdly, the transient heat dissipation process in bulk or
SOI FinFET under ‘Intermittent’ or Alternating’ heating is de-
scribed. The temperature contour predicted by BTE at dierent
moments is plotted when the system reaches the periodic steady
state in Figs. 4 to 7, where t=0.25tprepresents that the current
moment is a quarter of a heating period. The periodic steady
state represents that the temporal and spatial distributions of
the temperature field in the current heating period is the same
as those in the next heating period, with a relative deviation of
less than 106.
In bulk FinFET under ‘Intermittent’ heating, when the exter-
nal heat source begins to heat the system, e.g., t=0.05tp, the
temperature near the heat source areas begins to rise continu-
ously, and the high thermal energy in the fin region is rapidly
4
(a) t=0.05tp(b) t=0.25tp(c) t=0.5tp
(d) t=0.55tp(e) t=0.75tp(f) t=1.00tp
Figure 5: Transient temperature contour of a half of SOI FinFET predicted by
BTE under ‘Intermittent’ heating when the system reaches the periodic steady
state.
transferred from hotspot area to other geometric regions by
phonon ballistic transport. At the contact interface between the
silicon fin and the silicon dioxide insulation layer, the tempera-
ture in the silicon region is higher than that of the silicon diox-
ide region at the same zheight. However, when t=0.25tpor
t=0.5tp, the temperature in the silicon region is lower than that
of the silicon dioxide region at the same zheight. This is be-
cause the mean free path or thermal diusivity rate of silicon is
much higher than that of silicon dioxide, which leads to a higher
heat dissipation eciency. The thermal energy in silicon diox-
ide is mainly transferred from silicon to silicon dioxide through
the interface, and then transferred to the bottom heat sink. As
shown in Fig. 2(c), the heat dissipation eciency of channel
236 is much higher than that of 2 456. Although
the thermal energy is transferred from silicon to silicon dioxide
through the interface at the beginning t=0.05tp, the energy in
silicon dioxide is not eciently transferred to the bottom heat
sink due to its small mean free path, small thermal diusivity
and large interfacial thermal resistance. It is similar to a ther-
mal reservoir. Over time, the silicon dioxide region actually
got hotter, even higher than that of silicon at the same zheight.
When the heat source is removed t>0.5tp, the peak tempera-
ture decreases significantly due to the large mean free path of
silicon.
In SOI FinFET under ‘Intermittent’ heating, it is well known
that the silicon dioxide insulation layer is mainly introduced to
improve electrical performance in the actual chip design [1, 50],
but inevitably, it increases the temperature of silicon fin area
due to low thermal conductivity. From Fig. 5, it can be observed
that the temperature of the silicon fin region changes dramati-
cally with time in a heating period, which actually generates a
(a) t=0.05tp(b) t=0.25tp(c) t=0.5tp
(d) t=0.55tp(e) t=0.75tp(f) t=1.00tp
Figure 6: Temperature contour of bulk FinFET at dierent moments predicted
by BTE under ‘Alternating’ heating when the system reaches the periodic
steady state.
large thermal shock to the materials. Oppositely, the tempera-
ture contour profiles in the silicon dioxide insulation layer and
silicon substrate region are basically flat, showing a linear dis-
tribution. In other words, the silicon dioxide insulation layer
reduces the thermal shock on the bottom substrate material al-
though it raised the overall temperature in the fin area.
For Alternating’ heating, two external heat source heat the
system in turn so that the thermal conduction characteristics in
the ydirection are no longer symmetrical. Temperature contour
in bulk or SOI FinFET at dierent moments under Alternat-
ing’ heating when the system reaches the periodic steady state
is plotted in Figs. 6 and 7. When t0.5tp, one heat source
starts to provide thermal energy so that the hotspot tempera-
ture increases, while the other is removed so that the hotspot
temperature decreases gradually. Therefore, compared to the
‘Intermittent’ heating in Figs. 4 and 5, we can see that there
is always a high temperature hotspot in the silicon fin region.
This actually reflects that the overall temperature in the silicon
fin region under Alternating’ heating fluctuates less over time
than that of under Alternating’ heating, which is also verified
in Fig. 3. Less temperature fluctuations represents smaller ther-
mal shock on materials, which could delay the material life to
some extent.
4. CONCLUSION
Steady/unsteady heat dissipation in nanoscale bulk or SOI
transistors under dierent heating strategies is investigated by
the phonon BTE. Results show that it is not easy to accurately
capture the heat conduction in transistors by the EFL although
the eect of boundary scattering on phonon transport is added
into the eective thermal conductivity. There are still some de-
viations between the results of phonon BTE and EFL, espe-
5
(a) t=0.05tp(b) t=0.25tp(c) t=0.5tp
(d) t=0.55tp(e) t=0.75tp(f) t=1.00tp
Figure 7: Temperature contour of SOI FinFET at dierent moments predicted
by BTE under ‘Alternating’ heating when the system reaches the periodic
steady state.
cially near the hotspot areas where ballistic phonon transport
dominates and the temperature diusion is no longer valid. Al-
though the silicon dioxide increases the peak temperature sig-
nificantly, it makes the temperature profiles in the silicon diox-
ide insulation layer and silicon substrate region flat, which re-
duces the dramatic temperature fluctuations. Dierent heating
strategies have great influence on the peak temperature rise and
transient thermal dissipation process. Compared to ‘Intermit-
tent’ or ‘Continuous’ heating, the temperature variance of Al-
ternating’ heating is smaller, which indicates that this heating
strategy also reduces the dramatic temperature fluctuations.
Acknowledgment
Q.L. acknowledges the support of the National Natural Sci-
ence Foundation of China (52376068). C.Z. acknowledges the
members of online WeChat Group: Device Simulation Happy
Exchange Group, for extensive discussions. The authors ac-
knowledge Beijng PARATERA Tech CO.,Ltd. for providing
HPC resources that have contributed to the research results re-
ported within this paper.
Appendix A. Discrete unified gas kinetic scheme
The interfacial thermal resistance Re f f between two dissimi-
lar solid materials is [45, 44]
Re f f =δT
q,(A.1)
where δTand qare the temperature drop between the two sides
of the interface and the heat flux across the interface, respec-
tively. In order to deal with the interfacial thermal resistance
between silicon and silicon dioxide materials, the diuse mis-
match model is used [44, 45, 46, 17], which assumes that all
phonons loses previous memories and completely follows the
diuse transmitting or reflecting rule after interacting with the
interface. Transmittance and reflectance on each side of the in-
terface satisfy
r12 +t12 =1 (A.2)
due to energy conservation, where t12 (or t21) represents the
transmittance from medium 1 (or medium 2) to medium 2 (or
medium 1) across the interface, and r12 (or r21) represents the
reflectance in the medium 1 (or medium 2) reflected back from
the interface. Note that the net heat flux across the interface
should be zero at the thermal equilibrium state due to the prin-
ciple of detailed balance so that
t12C1v1=t21C2v2,(A.3)
where C1and v1(or C2and v2) are the specific heat and group
velocity of medium 1 (or medium 2).
( )
, , 0.5
fn
f x v t t+
( )
0.5 , ,
fn
f x v t v t−
A controlled volume
Cell interface
(a)
1
f
12 1
tf
21 2
tf
21 2
rf
2
f
12
n
Medium 1 Medium 2
(b)
x
interface
11
,xT
22
,xT
,
RR
xT
,
LL
xT
T
11
dT
qdx

22
dT
qdx

(c)
Figure A.8: (a) Reconstruction of phonon distribution function at the cell in-
terface for a given discretized controlled volume. (b) Transmittance and re-
flectance of phonon distribution function on each side of the interface between
medium 1 and medium 2. (c) Schematic of the spatial distributions of temper-
ature near the interface between medium 1 and 2.
6
Discrete unified gas kinetic scheme (DUGKS) is used to
solve the transient frequency-independent phonon BTE. More
specific numerical solution process and boundary treatments
can be found in previous papers [36, 51]. Here we make a brief
introduction of DUGKS. Under the discretized six-dimensional
phase space, the phonon BTE is
fn+1
i,kfn
i,k
t+t
ViX
jN(i)vgsk·ni j fn+1/2
i j,kSij
=t
2Hn+1
i,k+Hn
i,k,(A.4)
where i,k,i j,nare the indexes of cell center, solid angle, cell
interface and time step at the finite-volume discrete level, re-
spectively. H=(feq f) +˙
S/(4π). In order to update the
phonon distribution function from fn
i,kto fn+1
i,k, the key is the re-
construction of the distribution function at the cell interface at
the half time step fn+1/2
i j,k. When a phonon is transferred from
the inner region of a control volume to the interface after half
a time step, it will suer a large number of phonon scattering
processes if the time step is much longer than the phonon relax-
ation time or this length is much larger than mean free path, as
shown in Fig. A.8(a). To respect this physical law, the phonon
BTE is solved again along the direction of group velocity and
trapezoidal quadrature is used for the time integration of the
scattering terms,
f(xf,v,tn+0.5t)f(x1,v,tn)
=t
4H(xf,tn+0.5t)+H(x1,tn)(A.5)
=¯
f(xf,v,tn+0.5t)=¯
f+(x1,v,tn),(A.6)
where xfis the center of cell interface, x1=xf0.5vt,
¯
f=ft
4H,¯
f+=f+t
4H. Equations (A.4) and (A.5) are
the key evolution process of DUGKS [36], that is, solving the
discrete BTE at the cell center in a complete time step, while
coupling phonon advection and scattering together in the re-
construction of the interfacial distribution function at the half
time step, through which it allows the time step or cell size to
be much larger than the relaxation time and phonon mean free
path in the (near) diusive regime. The phonon distribution
function incident into the cell interface is
f(xf)=4τ
4τ+ t ¯
f(xf)+˙
S/(4π)+t
4τfeq(xf)!,(A.7)
from which it can be found that we have to firstly calculate the
equilibrium state at the cell interface feq(xf) if we want to re-
construct the distribution function f(xf) based on ¯
f(xf).
Here we focus on how to reconstruct the transmission and re-
flection distribution function at the interface between two dis-
similar solid materials. As shown in Fig. A.8(b), the phonon
transmission and reflection at the interface are related to the
phonon distribution on both sides. Diuse mismatch model
assumes that the phonon distribution at the interface pointing
from interface to medium 1 (or medium 2) follows the equilib-
rium distribution with temperature Tp
1(or Tp
2). Then we have
Zv1·n12>0
r12 f1v1·n12d + Zv2·n12 <0
t21 f2v2·n12d
=Zv1·n12<0
feq(Tp
1)v1·n12d(A.8)
Zv1·n12>0
t12 f1v1·n12d + Zv2·n12 <0
r21 f2v2·n12d
=Zv2·n12>0
feq(Tp
2)v2·n12d(A.9)
Zv1·n12>0
f1d + Zv1·n12<0
feq(Tp
1)d = Zfeq(T1)d,(A.10)
Zv2·n12<0
f2d + Zv2·n12>0
feq(Tp
2)d = Zfeq(T2)d,(A.11)
f1=4τ1
4τ1+ t ¯
f1+˙
S/(4π)+t
4τ1
feq(T1)!,v1·n12 >0
(A.12)
f2=4τ2
4τ2+ t ¯
f2+˙
S/(4π)+t
4τ2
feq(T2)!,v2·n12 <0
(A.13)
where n12 is the unit normal vector pointing from media 1 to
media 2, T1and T2are the local equivalent equilibrium temper-
atures on each side of the interface. τ1(or τ2) and v1(or v2) are
the phonon properties in medium 1 (or medium 2). The first two
equations (A.8,A.9) come from the physical assumptions of dif-
fuse mismatch model and the conservation of heat flux across
the interface, for example, in Eq. (A.8), all phonons in medium
1 emitted from the interface, including the phonons in medium
1 reflecting back from the interface and the phonons in medium
2 transmitting across the interface, follow the equilibrium dis-
tribution with temperature Tp
1.T1(A.10) and T2(A.11) are
calculated by taking the moment of distribution function over
the whole momentum space. Combined above six equations,
T1,T2,Tp
1and Tp
2can be obtained by Newton method.
Appendix B. Numerical discretizations and independence
test
To solve the transient phonon BTE, the temporal space, solid
angle space and spatial space are both discretized into a lot
of small pieces. Time step is t=0.125 ps and Cartesian
grids with uniform cell size x=1 nm is used. Solid angle
s=(cos θ, sin θcos φ, sin θsin φ)is discretized into Nθ×Nφ=
48 ×48 pieces, where cos θ[1,1] is discretized by Nθ-
point Gauss-Legendre quadrature and φ[0, π] (due to sym-
metry) is discretized by the Gauss-Legendre quadrature with
Nφ/2 points. All numerical results are obtained by a three-
dimensional C/C++ program. MPI parallelization computation
with 48 CPU cores based on the decomposition of solid angle
space is implemented and the discrete solid angles correspond-
ing to the specular reflection are ensured in the same CPU core.
Take the heat conduction in 3D bulk FinFET (Fig. 1) as an
example, we conduct an independent verification of the num-
ber of discrete solid angles. Steady temperature contour or heat
7
(a) 3D, temperature (b) 3D YZ slice, temperature
(c) 3D YZ slice, heat flux (d) 3D YZ slice, heat flux
Figure B.9: (a) steady 3D temperature contour, (c,d,e) quasi-2D temperature
contour, heat flux along the yand zdirection in the YZ slice in the bulk FinFET
(Fig. 1) with dierent number of discrete solid angles, where 482discretized
solid angles are used for colored background with white solid line, 242dis-
cretized solid angles are used for black dashed line, 962discretized solid angles
are used for purple long dashed line.
flux contour under ‘Continuous’ heating source with dierent
number of discrete solid angle is shown in Fig. B.9. Numerical
results show that 242discrete solid angles are not enough to ac-
curately capture the non-diusive heat conduction, and there is
serious numerical jitter. Temperature fields predicted by BTE
with 482or 962discretized solid angles are almost the same
in quasi-2D simulations. Considering the huge computational
amount of 3D simulation, we only use 482discrete points in
order to take into account both accuracy and computational ef-
ficiency.
Appendix C. Macroscopic heat diusion equation
The macroscopic heat diusion equation is
CT
t−∇·κe f f (x)T=˙
S,(C.1)
where eective thermal conductivity κef f in the present simula-
tion is a scalar rather than a tensor for a given spatial position
x. Finite volume method is invoked and above diusion equa-
tion in integral form over a control volume ifrom time tnto
tn+1=tn+ tcan be written as follows,
Ci
Tn+1
iTn
i
t1
2X
jN(i)
Si jni j ·κe f f (xi j )Tn+1
i j +κe f f (xi j)Tn
i j
=
˙
Sn
i+˙
Sn+1
i
2,(C.2)
Ci
Tn
i
t1
2X
jN(i)
Si jni j ·κe f f (xi j )(Tn
i j)
=
˙
Sn
i+˙
Sn+1
i
2+X
jN(i)
Si jni j ·κe f f (xi j )Tn
i j,(C.3)
where trapezoidal quadrature is used for the time integration of
the diusion and heat source terms, Tn=Tn+1Tn,Viis the
volume of the cell i,N(i) is the sets of face neighbor cells of cell
i,i j is the interface between the cell iand cell j,Si j is the area
of the interface i j,κe f f (xi j ) is the eective thermal conductivity
at the cell interface xi j , and ni j is the normal of the interface
i j directing from the cell ito the cell j. Above discretizations
theoretically have second-order spatial and temporal accuracy.
The time step is set as t=0.05tp=0.125 ps and Cartesian
grids with uniform cell size x=1 nm is used. Conjugate gra-
dient method is used to solve this heat diusion equation (C.3).
To solve Eq. (C.3), one of the key input parameter is the ef-
fective thermal conductivity at the interface between medium
1 and 2. Let’s take the quasi-1D heat conduction as an ex-
ample and briefly introduce how to deal with interface ther-
mal resistance eciently for macroscopic diusion equation.
Considering two discretized uniform cells adjacent to the in-
terface between medium 1 and 2 with cell size x, as shown
in Fig. A.8(c), there are dierent temperature distributions near
the interface. The positions and temperatures of cell center are
(x1,T1) and (x2,T2), respectively. The positions and tempera-
tures of the left and right limits of the interface are (xL,TL) and
(xR,TR), respectively, where x/2=xLx1=x2xR. The heat
flux at the left or right limit of the interface can be calculated
based on the EFL,
q1=κ1
dT
dx κ1
TLT1
xLx1
,(C.4)
q2=κ2
dT
dx κ2
TRT2
xRx2
.(C.5)
The heat flux across the interface can be calculated according
to the definition of interface thermal resistance,
qf=TLTR
Re f f
,(C.6)
where Re f f =(42(t12 +t21 ))/(t12C1v1)[52]. Note that the
heat flux at the left or right limit of the interface and the heat
flux across the interface should be equal, i.e.,
q1=q2=qf.(C.7)
Combined above four equations, we can obtain an approxi-
8
mated thermal conductivity κfat the interface,
qf=κf
T1T2
x1x2
,(C.8)
κf=1
0.51+0.52+Re f f /x.(C.9)
The eective thermal conductivity in the macroscopic diu-
sion equation (C.1) is
κe f f (x)=1
3Cv2
gτe f f ,(C.10)
τ1
e f f =vg +τ1
boundary ,(C.11)
where the boundary scattering rate is τ1
boundary =vg/Le f f ,Le f f
is smallest characteristic length which depends on the spatial
position x. Specific values of Lef f in dierent spatial regions
in this paper are list below. In bulk or SOI FinFET, we set
Le f f =8 nm in the fin area and Le f f =10 nm in the bottom
silicon substrate areas. In the silicon dioxide, the bulk thermal
conductivity 1.4 W·m1·K1is always used.
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