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Evaluation of Leakage Currents in Memristor Crossbar Arrays
Since the emergence of memristors (or memristive devices), how to integrate them into arrays has been widely investigated. After years of research, memristor crossbar arrays have been proposed and realized with potential applications in nonvolatile memory, logic and neuromorphic computing. Despite the promising prospect of memristor crossbar arrays, one of the main obstacles for their development is the so-called sneak-path currents causing cross-talk interferences between adjacent memory cells and thus may result in misinterpretation which greatly influences the operation of memristor crossbar arrays. Solving the sneak-path current issue, the power consumption of the array will immensely decrease, and the reliability and stability will simultaneously increase. In order to suppress the sneak-path current, various solutions have been provided. So far, some reviews have considered some of these solutions and established a sophisticated classification, including 1D1M, 1T1M, 1S1M (D: Diode, M: memristor, T: Transistor, S: Selector), self-selective and self-rectifying memristors. Recently, a mass of works have been additionally reported. This review thus attempts to provide a survey on these new findings, by highlighting the latest research progresses realized for relieving the sneak-path issue. Here, we first present the concept of the sneak-path current issue and solutions proposed to solve it. Consequently, we select some typical and promising devices, and present their structures and properties in detail. Then, the latest research activities focusing on the single-device structures are introduced taking account to the mechanisms underlying these devices. Finally, we summarize properties and perspectives of these solutions.
Memristors are novel electrical devices used for a variety of applications, including memory, logic circuits, and neuromorphic systems. Memristive technologies are attractive due to their nonvolatility, scalability, and compatibility with CMOS. Numerous physical experiments have shown the existence of a threshold voltage in some physical memristors. Additionally, as shown in this brief, some applications require voltage-controlled memristors to operate properly. In this brief, a Voltage ThrEshold Adaptive Memristor (VTEAM) model is proposed to describe the behavior of voltage-controlled memristors. The VTEAM model extends the previously proposed ThrEshold Adaptive Memristor (TEAM) model, which describes current-controlled memristors. The VTEAM model has similar advantages as the TEAM model, i.e., it is simple, general, and flexible, and can characterize different voltage-controlled memristors. The VTEAM model is accurate (below 1.5% in terms of the relative root-mean-square error) and computationally efficient as compared with existing memristor models and experimental results describing different memristive technologies.
Memristors are novel devices, useful as memory at all hierarchies. These devices can also behave as logic circuits. In this paper, the IMPLY logic gate, a memristor-based logic circuit, is described. In this memristive logic family, each memristor is used as an input, output, computational logic element, and latch in different stages of the computing process. The logical state is determined by the resistance of the memristor. This logic family can be integrated within a memristor-based crossbar, commonly used for memory. In this paper, a methodology for designing this logic family is proposed. The design methodology is based on a general design flow, suitable for all deterministic memristive logic families, and includes some additional design constraints to support the IMPLY logic family. An IMPLY 8-bit full adder based on this design methodology is presented as a case study.
An architecture for nano-electronic computation based on crossbars of hysteretic resistors is presented. We show how such crossbars can implement inverting and non-inverting latches and sum-of-product logic functions, and give examples of a NAND gate, exclusive-OR gate, and half adder. Multiple hysteretic resistor crossbars may be combined to implement complex computational systems. The designs have been evaluated using SPICE (a general-purpose circuit simulation program), demonstrating the feasibility of implementation given a suitable nano-electronic substrate.
A new two-terminal circuit element-called the memristorcharacterized by a relationship between the charge q(t)equiv int_{-infty}^{t} i(tau) d tau and the flux-linkage varphi(t)equiv int_{- infty}^{t} v(tau) d tau is introduced as the fourth basic circuit element. An electromagnetic field interpretation of this relationship in terms of a quasi-static expansion of Maxwell's equations is presented. Many circuit-theoretic properties of memistors are derived. It is shown that this element exhibits some peculiar behavior different from that exhibited by resistors, inductors, or capacitors. These properties lead to a number of unique applications which cannot be realized with RLC networks alone. Although a physical memristor device without internal power supply has not yet been discovered, operational laboratory models have been built with the help of active circuits. Experimental results are presented to demonstrate the properties and potential applications of memristors.
Verilog-A for memristor models
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Memristor simulation with LTSPICE - a practical example!
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Verilog-A for memristor models
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