Conference Paper

Companding switched capacitor filters

Dept. of Electr. Eng., Columbia Univ., New York, NY
DOI: 10.1109/ISCAS.1998.704507 Conference: Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on, Volume: 1
Source: IEEE Xplore


In this paper, two possible switched capacitor implementations of
companding filters are discussed. The governing difference equations, an
estimate of the increase in the dynamic range for a given power
consumption and possible topologies are given

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    • "A companding system consists of a gain element at the input to compress the signal, a gain element at the output to expand the signal and, finally, a mechanism to update the state variables of the system [2]. In [3], the companding switched-capacitor (SC) integrator was introduced, which can be used to implement a companding SC filter. It is estimated that companding by a factor of 4 would save 12dB in dynamic range of the filter resulting in a 4 times improvement in power consumption as compared to a conventional filter. "
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    ABSTRACT: To handle the 12dB peak-to-average-power ratio (PAPR) of OFDM signals in a 802.11a/g WLAN receiver baseband, an instantaneously companding system consisting of a 5-order low pass SC filter and a 10-bit pipeline ADC is presented. The filter cut-off and clock frequencies are 10MHz and 100MHz respectively and the ADC sampling frequency is 25MS/s. The filter provides the compressed output directly to the ADC and the signal expansion is done in the digital domain, which eliminates the need of an analog expansion amplifier. For a 12dB increase in dynamic range, it is estimated that the filter consumes 3.7 times less power than a conventional filter while the dynamic range required from the ADC is reduced by 12dB due to companding by a factor of 4. The filter and the ADC are designed to be implemented in a 1.2V, IBM 0.13μm CMOS process and the total power consumption is 75mW.
    Full-text · Conference Paper · Jul 2010
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    • "Successful designs have been made using companding in log domain circuits to achieve very high dynamic range filters [5] but circuits in the log domain are mainly intended for very low power, e.g., biomedical applications. Companding in the discrete time domain [4] using Switched Capacitor (SC) circuits [6], on the other hand, offers several advantages. The compression and expansion functions are carried out using an array of switched capacitors. "
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    ABSTRACT: The IEEE WLAN 802.11a/g standard requires short time interval (5.6 mus) for automatic gain control (AGC) convergence during reception of the preamble in each data packet. Due to this stringent settling time requirement, most of the AGC is implemented after the baseband filter, which leads to high power consumption in the baseband filter. In this paper, we present syllabic companding using switched capacitor (SC) ciruits as a solution to achieve gain control in the baseband filter without sacrificing any of the AGC settling time. A 5<sup>th</sup> order syllabic companding, Chebyshev type, SC filter with a cut-off frequency of 10 MHz is implemented in IBM's 1.2 V, 130 nm CMOS technology. The filter consumes a total power of 45 mW. It is estimated that companding by a factor of 4 achieves 12 dB improvement in dynamic range and a reduction in power consumption by a factor of 4.3 with respect to conventional filters.
    Full-text · Conference Paper · Sep 2009
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    • "During phase φ2, the charge from the sampling capacitor CS1 is transferred to the integrating capacitor CI . Fig. 3(b) shows the Lossy DI along with state variable update circuitry used to double and half the output voltage depending on whether g increases or decreases by a factor of 2 respectively [5]. An array of capacitors is used at the input and the output for gain scaling. "
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    ABSTRACT: In this paper, system level design techniques for companding baseband switched capacitor (SC) filters for WLAN applications are presented. With companding, no AGC is required in front of the filter. A filter prototype is designed for 802.11g receiver and simulation results show that, with careful design of the opamps, a total harmonic distortion of less than 0.5% can be achieved. A new type of companding ADCs along with the algorithm to achieve companding in ADCs is proposed. It is shown that companding by a factor of 4 reduces the power consumption of the SC filter by a factor close to 4 times for a given dynamic range whereas it directly results in 12 dB reduction in the dynamic range requirement of the following ADC.
    Full-text · Conference Paper · Jan 2007
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