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6 References# Companding switched capacitor filters

**Abstract**

In this paper, two possible switched capacitor implementations of
companding filters are discussed. The governing difference equations, an
estimate of the increase in the dynamic range for a given power
consumption and possible topologies are given

- CitationsCitations8
- ReferencesReferences6

- "A companding system consists of a gain element at the input to compress the signal, a gain element at the output to expand the signal and, finally, a mechanism to update the state variables of the system [2]. In [3], the companding switched-capacitor (SC) integrator was introduced, which can be used to implement a companding SC filter. It is estimated that companding by a factor of 4 would save 12dB in dynamic range of the filter resulting in a 4 times improvement in power consumption as compared to a conventional filter. "

[Show abstract] [Hide abstract]**ABSTRACT:**To handle the 12dB peak-to-average-power ratio (PAPR) of OFDM signals in a 802.11a/g WLAN receiver baseband, an instantaneously companding system consisting of a 5-order low pass SC filter and a 10-bit pipeline ADC is presented. The filter cut-off and clock frequencies are 10MHz and 100MHz respectively and the ADC sampling frequency is 25MS/s. The filter provides the compressed output directly to the ADC and the signal expansion is done in the digital domain, which eliminates the need of an analog expansion amplifier. For a 12dB increase in dynamic range, it is estimated that the filter consumes 3.7 times less power than a conventional filter while the dynamic range required from the ADC is reduced by 12dB due to companding by a factor of 4. The filter and the ADC are designed to be implemented in a 1.2V, IBM 0.13μm CMOS process and the total power consumption is 75mW.- "3(a). The figure shows an example of one of the intermediate stages of the filter implemented using a companding discrete SC integrator similar to the one presented in [6]. For simplicity, we assume that all sampling capacitors have a value Cs and the integration capacitor has a value CI . "

[Show abstract] [Hide abstract]**ABSTRACT:**The IEEE WLAN 802.11a/g standard requires short time interval (5.6 mus) for automatic gain control (AGC) convergence during reception of the preamble in each data packet. Due to this stringent settling time requirement, most of the AGC is implemented after the baseband filter, which leads to high power consumption in the baseband filter. In this paper, we present syllabic companding using switched capacitor (SC) ciruits as a solution to achieve gain control in the baseband filter without sacrificing any of the AGC settling time. A 5<sup>th</sup> order syllabic companding, Chebyshev type, SC filter with a cut-off frequency of 10 MHz is implemented in IBM's 1.2 V, 130 nm CMOS technology. The filter consumes a total power of 45 mW. It is estimated that companding by a factor of 4 achieves 12 dB improvement in dynamic range and a reduction in power consumption by a factor of 4.3 with respect to conventional filters.- "Since, using companding ADC with SC filter excludes the use of output expansion amplifier, and the control circuitry including the comparators consume only a fraction of the power consumption of the opamps, companding results in power reduction by at least 2 times and it can be close to 4. Additional power savings are achieved in the ADC, whose dynamic range requirement is reduced by 12 dB, without incurring any major penalty since the expansion is done in the digital domain. Besides, as estimated in [5] companding SC filter occupies lesser chip area as compared to a conventional linear filter designed for the same dynamic range. "

[Show abstract] [Hide abstract]**ABSTRACT:**In this paper, system level design techniques for companding baseband switched capacitor (SC) filters for WLAN applications are presented. With companding, no AGC is required in front of the filter. A filter prototype is designed for 802.11g receiver and simulation results show that, with careful design of the opamps, a total harmonic distortion of less than 0.5% can be achieved. A new type of companding ADCs along with the algorithm to achieve companding in ADCs is proposed. It is shown that companding by a factor of 4 reduces the power consumption of the SC filter by a factor close to 4 times for a given dynamic range whereas it directly results in 12 dB reduction in the dynamic range requirement of the following ADC.

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