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GaAs-Based Compact THz Filtering Power Divider With Low Insertion Loss And High Isolation
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This work presents a 12-element 360° azimuth plane scanning planar circular antenna array for compact THz wireless devices. Proposed array comprises of 12 bow-tie Yagi-Uda directional antennas, operating within 0.235–0.322 THz band where each antenna achieves a maximum radiation beam for an angle of around 30°, arranged in a circular fashion to cover 360°. Individual antennas are stamped on a silicon dioxide (SiO2) dielectric substrate having compact dimensions of 1.35 mm × 1 mm × 0.06 mm and employ gold material of thickness 5 µm as a conducting material in the top and bottom planes. Maximum peak gain of each antenna is found to be 10.4 dBi at 0.322 THz within the operating band. Three parasitic elements are employed as directors to enhance the directional properties. Initially, a single element bow-tie Yagi-Uda antenna design is presented and then followed by a 6-element and 12-element circular antenna array design. Exhibiting compact dimensions, higher directivity, better performance and simple design lead to a suitable module for smart THz wireless scanning devices in the range of IEEE 802.15.3d (0.252–0.325 THz) standard and H-band (0.22–0.32 THz).
In this letter, an ultra‐miniaturized filtering power divider (FPD) chip based on integrated passive device (IPD) technology using a complex isolation network is proposed. Three lumped L represents inductor, C represents capacitor (LC) tanks and two electromagnetic hybrid coupling units are used to realize the third‐order quasi‐elliptical filtering response with high‐frequency selectivity and wide stopband, which are designed and realized by using the IPD process to achieve ultra‐miniaturized size. In addition, the complex impedance is utilized to form the isolation network, so good in‐band isolation can be easily achieved. Moreover, the working principle and design method of this proposed FPD is well illustrated, a prototype with 3‐dB fractional bandwidth of 19.3% at 2.6 GHz (f0) is in final designed and fabricated. The isolation is higher than 16 dB within the passband, and upper‐stopband attenuation higher than 20 dB is extended to 40 GHz (15.4f0). It occupies only 2.76 mm × 2.0 mm, that 0.023λ0 × 0.017λ0, where λ0 is the free‐space wavelength at f0.
In this article, a tunable lowpass filter (LPF) with a hexagonal stepped impedance resonator and multi open stubs is designed. The − 3 dB cut-off frequency for the proposed LPF is 2.2 GHz. Insertion loss (IL) and return loss (RL) in the passband zone are 0.3 dB and 15 dB, respectively. The frequency response slope (roll-off rate) for the proposed LPF is very sharp and equal to 142.4 dB/GHz. The tuning range of − 3 dB cut-off frequency for the presented LPF is very wide and equal to 2.7 GHz [from 0.5 to 3.2 GHz (84.3%)]. To achieve the desired structure and harmonics suppression, a conventional power divider was designed initially, then the transmission lines (with length of λ/4) were replaced with two LPFs. The isolation, IL, and input RL for the proposed modified Wilkinson power divider are better than 20.1 dB, 3.1 dB and 21.2 dB, respectively, at operating frequency of 1.8 GHz (GSM band). The proposed modified Wilkinson power divider eliminates the 2nd–11th harmonics with high levels of attenuation. The feature selective validation method depicts that the simulation and measurement results for the proposed LPF are in good agreement with each other.
This work presents an on-chip Wilkinson power divider using silicon-based integrated passive device (IPD) technology that operates from 70 to 110 GHz, thereby covering the entire
W
-band (75–110 GHz). Based on a simple impedance transformation different from the conventional Wilkinson power divider topology, the proposed silicon IPD power divider with a core size of 0.417 mm
2
can demonstrate power loss of less than 1.1 dB along with input–output return loss better than 14 dB throughout the entire band.
A new on-chip dual-band Wilkinson power divider (WPD), developed on a GaAs-based integrated passive device (IPD) process, is designed at 28/60 GHz for millimeter-wave (mmW) applications. Composite right/left-handed lines in microstrip form are employed to achieve the dual-band property. Thanks to the low-loss feature of the GaAs-based IPD process, the proposed mmW WPD ensures comparable performance when compared to its counterparts at microwave frequencies. Besides, the proposed design, one of the few on-chip dual-band WPDs designed in mmW bands, yields better performance in terms of input matching and power loss when compared with the previous work.
This paper presents our comprehensive study on a THz imaging system using linear sparse periodic array (SPA) at 220 GHz. A 8 Tx and 8 Rx SPA is designed and simulated, considering the issues of theoretical resolution, practical field of view (FOV) and ghost images and suggesting the guidelines on designing such a THz SPA imaging system. In order to verify the proposed THz SPA imaging system experimentally, we have investigated a scheme that the Tx and Rx elements are located on two scanning tracks separated by a distance and devised a simplified experimental setup using only 1 Tx and 1 Rx channels. The further simulation that takes account of effects resulting from track separation and beam properties correlates to the final measurement quite well. This experimental approach provides a low-cost solution to a practical implementation of THz SPA imaging system.
This paper presents a new type of a low-loss miniaturized coplanar-waveguide (CPW) transmission line (TL) by employing distributed loading, capacitors and inductors, in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The capacitors are realized by vertical parallel plates made of vias, and a group of open stubs inserted to the signal line, whereas the inductors are realized by high impedance lines. Then, the proposed CPW-TL is employed to design a miniaturized millimeter wave ultra-wideband low-loss Wilkinson power divider/combiner (WPD/C). The proposed distributed loading results in reducing each WPD/C arm length by more than 50% without changing its characteristic impedance and insertion loss (IL). The design is fabricated in 0.18-μm CMOS technology and tested. The measured results show a wideband performance from dc to 67 GHz with 1-dB IL and isolation greater than 15 dB from 36 to 67 GHz. In addition, the fabricated WPD/C achieves an excellent amplitude imbalance and phase imbalance of less than 0.16 dB and 0.45°, respectively. The core chip size is 336 x 165 μm², which is almost 32.8% compact compared to the recently proposed WPD in the same technology.
The 5-GHz quadrature couplers implemented in GaAs and silicon-based integrated passive device (IPD) technologies are presented. Although GaAs technology is superior to silicon-based technology in terms of substrate resistivity and back-side vias, the quadrature coupler using a silicon IPD process achieved better insertion loss due to thick metal traces and comparable substrate resistivity. While the coupler using the GaAs process employed 4-μm-thick metal traces, the coupler using silicon IPD technology employed 10.8-μm-thick traces realized with via connections between a top metal of 5.3-μm thickness and a bottom metal of 5.5-μm thickness. The couplers using the silicon and GaAs IPD process technologies showed 0.15 and 0.27 dB of insertion loss, respectively. Also, the silicon IPD design uses a slightly different topology which splits a coupled inductor into two coupled inductors with shunt capacitors to achieve a broader distributed bandwidth.
A reduced-size, low-cost, low insertion loss power divider operating over a very broad bandwidth from 57-86GHz is designed, manufactured, tested, and presented in this paper. The proposed design is fabricated in a glass-substrate IPD (integrated passive device) technology and has a chip area of 0.435×0.36 mm2. A size-reduction of 33% compared to a conventional microstrip Wilkinson power divider has been achieved by using high-impedance modified coplanar waveguide (M-CPW) transmission lines, which are loaded at their ends with microstrip open-circuited stubs. The measured results showed an insertion loss of less than 0.5 dB over a frequency range of 50-67 GHz; the EM simulation results showed an insertion of less than 1.4 dB loss over a frequency range of 50-90 GHz. The proposed design is well suited for low-cost system-in-package (SiP) radio front-ends for multiband 60/70/80-GHz high data rate wireless communications systems.
This paper presents micromachined on-chip RF passive bandpass filters at 1-8 GHz based on utilizing a three-pole LC low-pass filter and two dc-blocking capacitors, which is accomplished with a GaAs monolithic-microwave-integrated-circuit process. The microwave design model of the bandpass filters that take into account conductor losses is given and verified. Using this model, the RF bandpass filter with a tunable center frequency and a desirable bandwidth can be realized. Due to only a planar spiral inductor required in the design, the layout size of the filter is less than 700μm × 400μm. Furthermore, in order to minimize the effect of substrate losses caused by the inductor on the bandpass filter, metal shores (MSs) and patterned ground shields (PGSs) are located and inserted between the inductor and the GaAs substrate, respectively, and a cavity on the backside of the inductor substrate is processed by the via-hole etching technique. Measurement results demonstrate that RF bandpass filters without MS and PGS show agreement with the design performance and those with MS and PGS have resulted in the improvement of about 24% insertion loss and a slight effect on the center frequency.