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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 5, MAY 2023 2247
Linearity Performance of Derivative
Superposition in GaN HEMTs: A
Device-to-Circuit Perspective
Rafael Perez Martinez , Graduate Student Member, IEEE,
David J. Munzer , Graduate Student Member, IEEE, Bhawani Shankar, Member, IEEE,
Boris Murmann , Fellow, IEEE, and Srabanti Chowdhury , Senior Member, IEEE
Abstract—A significant disconnect exists between the
linearity metrics used by device and circuit engineers,
degrading the maximum achievable performance in gallium
nitride (GaN) technology. A detailed linearity analysis is
performed using both device and circuit metrics on GaN
devices that employ derivative superposition (DS) to evalu-
ate the amplifier performance under modulated conditions
of four different device variants. The limitations of con-
ventional linearity metrics used at the device level, such
as the output third-order intercept point (OIP3) and output
1-dB compression point (OP1 dB), are examined and com-
pared with communication standard-based metrics, such
as the adjacent channel power ratio (ACPR) and error vector
magnitude (EVM) to provide best practices for quantifying
power amplifier (PA) linearity. It is found that employing
more devices in the context of DS primarily improves the
input-bias range of the device and not the peak ampli-
fier performance under modulation. Ultimately, this work
provides device engineers with a circuit-level perspective
on linearity to help design transistors with enhanced RF
performance for practical real-world deployment.
Index Terms—Adjacent channel power ratio (ACPR),
derivative superposition (DS), error vector magnitude
(EVM), gallium nitride (GaN) high electron mobility tran-
sistor (HEMT), linearity, output 1-dB compression point
(OP1dB), output third-order intercept point (OIP3), power
amplifier (PA).
I. INTRODUCTION
MODERN wireless links, such as 5G and beyond-5G,
have stringent effective isotropic radiated power (EIRP)
Manuscript received 1 February 2023; revised 13 March 2023;
accepted 15 March 2023. Date of publication 28 March 2023; date of
current version 24 April 2023. This work was supported by Keysight
Technologies through the Stanford SystemX Alliance and the Stanford
Graduate Fellowship (SGF). The review of this article was arranged by
Editor M. Meneghini. (Corresponding author: Rafael Perez Martinez.)
Rafael Perez Martinez, Bhawani Shankar, Boris Murmann, and
Srabanti Chowdhury are with the Department of Electrical Engineering,
Stanford University, Stanford, CA 94305 USA (e-mail: rafapm@
stanford.edu; bhawani@stanford.edu; murmann@stanford.edu;
srabanti@stanford.edu).
David J. Munzer is with the School of Electrical and Computer
Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA
(e-mail: dmunzer3@gatech.edu).
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TED.2023.3259383.
Digital Object Identifier 10.1109/TED.2023.3259383
requirements due to the high path loss present at mm-Wave
frequencies. Conventional III–V semiconductors such as gal-
lium arsenide (GaAs) along with silicon (Si) have been the
default solution for power amplifier (PA) applications in the
sub-6-GHz domain. However, these technologies are limited in
terms of output power (Pout) and power-added efficiency (PAE)
at mm-Wave frequencies. Gallium nitride (GaN) high electron
mobility transistors (HEMTs) have become a particularly
attractive choice for PA applications compared with Si and
conventional III–V semiconductors, as they can operate at
higher supply voltages, frequencies, and temperatures [1]. This
is due to the inherent material properties of GaN, such as
large bandgap (3.4 eV), outstanding peak saturation velocity
(2.5⇥107cm/s), and high critical electric field (3 MV/cm),
which translate to improved operating voltage, power density,
efficiency, reliability, and, ultimately, a high Johnson figure-
of-merit (FoM). Nonetheless, the peak performance achievable
from GaN is far from reach due to numerous issues, such
as soft compression, dc-RF dispersion, and self-heating. This
limits Pout, PAE, and linearity under modulation, all of which
are critical performance metrics in PAs [2], [3]. As this
technology matures, GaN will become a major player in future
5G-and-beyond and defense applications.
To better understand the impact of transistor linearity on
overall system performance, it is important to consider the
system-level constraints and then find viable solutions at the
device level. For example, 5G employs spectrally efficient
modulation schemes, such as orthogonal frequency-division
multiplexing (OFDM), higher-order quadrature amplitude
modulations (QAMs), and carrier aggregations to maximize
channel throughput. The resulting modulation schemes exhibit
large dynamic ranges leading to high peak-to-average power
ratio (PAPR) requirements. Furthermore, high-PAPR signals
impose stringent linearity requirements in the form of adja-
cent channel power ratio (ACPR) and error vector magni-
tude (EVM) to preserve high signal fidelity. Both of these
requirements force the PAs to operate below their peak Pout
level, significantly lowering the average output power (Pout,avg)
and average amplifier efficiency (PAEavg) compared with peak
continuous wave (CW) performance [4]. The power back-
off (PBO) is even higher for GaN HEMTs to compensate
0018-9383 © 2023 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.
2248 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 5, MAY 2023
for additional amplitude-to-amplitude (AM–AM) and phase-
to-amplitude (AM–PM) distortion from device nonlinearities,
such as soft compression, due to electron-trapping effects,
i.e., when the gain compresses much earlier than predicted
at a low rate before reaching the hard compression point
from the device’s Pout limitations [3]. It is important to note
that this is an ongoing challenge across all semiconductor
technologies that have yet to be solved. For example, the
PA survey from [5] showed the modulation performance for
Si PAs from 20 to 50 GHz. The peak CW performance
was compared with different modulation schemes, resulting
in a >2⇥difference in PAE and >15-dB difference in Pout
under backed-off conditions.
Most of the recent efforts from the device community
have primarily focused on linearizing the transconductance
(gm1) profile by employing third-order transconductance (gm3)
cancellation via the derivative superposition (DS) of multi-
transistor devices of varying threshold voltages at the device
level (i.e., embedded within a single device footprint), since
any reduction in gm3will directly translate to an improve-
ment in the output third-order intercept point (OIP3)[6],
[7], [8], [9]. As such, OIP3has become, in some instances,
the sole evaluation metric to benchmark GaN HEMT device
linearity performance. On the other hand, circuit designers
exploit device nonlinearities by using a variety of techniques,
such as feedback, multigated transistors (MGTR), harmonic
terminations, and complementary capacitance compensation
to improve linearity by considering primarily AM–AM and
AM–PM distortion, since these metrics directly correlate with
communication standard-based metrics, such as ACPR and
EVM, and are straightforward to simulate [10], [11], [12],
[13], [14].
To advance GaN technology and resolve the aforementioned
issues, there needs to be clear communication between the
device and circuit communities, as there has historically been
a disconnect between them. This implies that the existing
GaN devices and their corresponding circuit implementations
are underutilized. With proper communication, the HEMT
devices can be optimized for each circuit designer’s specific
applications to fully exploit the performance potential of the
GaN platform. Previous works, such as [15], [16], and [17],
begin this communication by quantifying GaN HEMTs using
linearity metrics besides OIP3under both CW stimulus and
modulated conditions. In this article, we extend the work
in [17] by analyzing the device performance of DS in GaN
HEMTs under both CW and modulated conditions to provide a
clearer picture of this problem and help bridge the gap between
these two domains. The primary focus of this work will be
on large-signal PA linearity, while receiver/low-noise amplifier
linearity will be addressed at a later time.
This article is organized as follows. Section II describes
OIP3and how this metric is used to benchmark linearity
performance when using DS. In Section III, the issues with
conventional linearity metrics are described with respect to
GaN HEMT devices. To further highlight the limitations of
conventional metrics, the linearity performance of DS under
CW conditions is analyzed in Section IV. In Section V, alter-
native communication standard-based metrics are introduced,
Fig. 1. ID,gm1–gm3for (a) nonideal and (b) ideal GaN device. The
nonideal device shows a nonzero value for gm3at the bias point, while
the ideal device with a “flat gm1” shows a zero value for gm3.
followed by modulation simulation results of these metrics in
the context of DS in Section VI. Finally, Section VII concludes
this article.
II. OIP3AND DS
OIP3is the most conventionally used metric to quantify the
linearity performance of a device due to its measurement ease,
as it is not a direct measurement, but a linear extrapolation.
This metric is measured and calculated using a “two-tone”
test, where two signals of equal amplitude and with a different
frequency f1and f2are spaced out by a quantity 1ffrom
the fundamental frequency of interest ( fo). It is also assumed
that the input signals are small enough that the output signal’s
energy is primarily concentrated in the lowest-order harmon-
ics. This implies that the amplitude of the third harmonic is
much higher than the fifth harmonic. The same can be said for
the array of amplitudes of even harmonics. Such assumptions
are referred to as “weakly nonlinear behavior” or “low-
distortion conditions” [18]. Under low-distortion conditions,
OIP3can be defined as the extrapolated power level (referred
from the output) at which the fundamental curve ( f1or f2) and
third-order intermodulation distortion (IM3) curve (2 f1f2or
2f2f1) intersect. Typically, the third-order intermodulation
products are of greater concern, since they are closer to the
fundamental tones, while the second-order intermodulation
products can be filtered out using a bandpass filter.
Assuming a third-order Taylor series of the nonlinear drain
current ID(VGS)relationship, OIP3is calculated in [19] as
follows:
OIP3(dBm) =10 log10⇣2
3
g3
m1
gm3RL⌘+30 (1)
where gm1is the transconductance [the first derivative of
ID(VGS)], gm3is the third derivative of ID(VGS), and RL
is the load resistance. As seen in (1), OIP3has a strong
dependence on gm3.Fig. 1(a) shows ID,gm1, the second
derivative of ID(VGS )(gm2), and gm3for a nonideal GaN
device. At the particular bias point shown in Fig. 1(a),IDis
nonlinear, and gm1shows a “bell-shaped” behavior, since ID
tapers off, as the gate–source voltage VGS is increased. As a
result, gm3has a nonzero value, degrading OIP3. On the other
hand, assuming no other sources of distortion exist and an
ideal GaN device with a perfectly “flat” gm1as the one shown
PEREZ MARTINEZ et al.: LINEARITY PERFORMANCE OF DS IN GaN HEMTs: A DEVICE-TO-CIRCUIT PERSPECTIVE 2249
in Fig. 1(b), the higher-order derivatives of gm1(i.e., gm2and
gm3) become negligible, and (1) yields an “infinite” OIP3.
As such, this result has become the main driving force in
the device community to improve linearity, as any reduction
in gm3will translate directly to an improvement in OIP3.
At the circuit level, a proposed technique to effectively
cancel out gm3over a particular range is by employing DS
of multiple transistors [14]. Fig. 2(a) shows the gm3curves
for two transistors: M1and M2, where M1is referred to
as the main transistor and M2as the auxiliary transistor.
Notice that the gm3curve of M1presents a positive peak
followed by a negative peak. The goal is to effectively cancel
out the negative peak, which can be done by adding an
additional transistor M2. By biasing and sizing M2properly,
the gm3curve of this additional transistor can be shifted to the
right, canceling out the negative peak of the main transistor.
The effective gm3curve presents a value close to zero over
a cancellation window, which can be used to operate the
device in. The cancellation window can be extended by using
several auxiliary transistors. In practice, three or four auxiliary
transistors are used, as any additional devices will provide a
diminishing return in linearity enhancement.
At the device level, a similar approach can be taken to
perform DS [6], [7], [8], [9]. In this approach, the threshold
voltage (Vth) device parameter instead of the physical bias
voltage is varied between the main and auxiliary devices.
Some of these techniques, such as the ones demonstrated in [6]
and [9], incorporate fins within the device with varying widths
to change Vth, but others, such as [7], employ a gate recess
etch. If various transistors with varying threshold voltages are
placed in parallel, they will be turned on sequentially for
increasing VGS. As a result, the superposition of the drain
current will yield an intrinsically linear device, as seen in
Fig. 2(b). One of the main drawbacks of device-level DS
is that it cannot be adjusted for process variations, unlike
circuit-level DS where the gate bias of each transistor can
be modified as necessary.
III. ISSUES WITH CONVENTIONAL LINEARITY METRICS
While there are several metrics used to quantify linearity,
many do not provide sufficient insight due to the varying
process-dependent transistor nonidealities. Although conven-
tional linearity metrics, such as OIP3and OP1 dB, provide
valuable information for Si and traditional III–V devices, they
need to be reevaluated for GaN-based devices. Therefore,
it is important to lay out the proper linearity metrics of GaN
HEMTs at the device level to maximize the performance at
the circuit and system levels. In the subsections below, we will
describe in greater detail the advantages and limitations of both
OIP3and OP1 dB.
A. Intercept Point Nonidealities
Given that intercept point specifications (e.g., the
second-order intercept point OIP2and OIP3) are only
valid under low-distortion conditions, they suffer from many
issues when a device behaves in a strongly nonlinear way,
which is the case for PAs. In the context of this work,
Fig. 2. (a) Qualitative circuit-level DS using two devices with different
gate biases [14]. (b) Qualitative device-level DS by integrating devices
with varying Vth [6].
Fig. 3. Fundamental, third-, fifth-, and seventh-order intermodula-
tion products for the DS of two devices with WG=2⇥75 µm and
LG=150 nm biased at VDS =20 V, 5.58% IDSS,f=10 GHz, and
f=10 MHz.
strongly nonlinear behavior refers to the switching of a
transistor between the saturation region (ON-state) and the
cutoff region (OFF-state), similar to a device biased in Class
AB. For OIP3, the accuracy of the harmonic intercept point
is based on the assumption that the IM3curve is a straight
line with a slope of 3, meaning that is mathematically
extrapolated instead of directly measured. When the device
behaves in a strongly nonlinear way, the slope of the IM3
curve will deviate significantly at high power levels, since
higher-order intermodulation terms become dominant [20].
A quantitative example can be observed in Fig. 3, where
the fundamental and different intermodulation distortion
curves (i.e., third, fifth, and seventh) for the DS of two
devices with WG=2⇥75 µm and LG=150 nm biased at
VDS =20 V and 5.58% of the saturation current IDSS are
shown as a function of the input power (Pin). At low power
levels (blue-shaded region), IM3is relatively low, and it is
the dominant source of distortion. However, at medium to
high power levels (gray-shaded region), the slope of the IM3
curve changes drastically, as higher-order intermodulation
2250 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 5, MAY 2023
Fig. 4. Gain versus PBO showing key output compression points
(OP1 dB and OP3 dB ) for an ideal linear device (blue) and a nonlinear
device (red) with soft compression.
terms become more pronounced. Therefore, obtaining a high
OIP3through DS or other small-signal techniques at the
device or circuit level will typically only be effective under
low-distortion conditions, i.e., where the assumptions of
OIP3are valid. For high power levels or strongly nonlinear
device behavior, which is the case in PA operation, any
uncanceled higher-order intermodulation terms will increase
IM3, invalidating the whole point of having a high OIP3[17],
[21], [22]. In Section VI, we will further analyze such
scenarios by considering communication standard-based
metrics, such as ACPR and EVM.
B. Compression Points and Soft Compression
Unlike OIP3, OP1 dB is a large-signal metric that is more
relevant for PAs. This metric is defined as the power level
at which the large-signal gain differs from the small-signal
gain by 1 dB. In the case of gain expansion, OP1 dB is
calculated from the peak gain and not the small-signal gain.
Although OP1 dB has been the preferred metric in Si and other
semiconductor technologies, it is not particularly useful in
GaN HEMTs. In typical high-power Si or GaAs RF devices,
saturation happens roughly 1–2 dB past the OP1 dB point.
However, this is usually not the case in GaN HEMTs, as the
gain gradually decays at backed-off power levels due to soft
compression, resulting in lower-than-expected OP1dB values,
creating a large performance gap between OP1 dB and Psat.
The normalized gain characteristics as a function of PBO for
an ideal and nonideal transistor are shown in Fig. 4. In this
work, the 0-dB back-off point was taken at each device’s
maximum PAE. It can be observed that the nonlinear device
in the red curve of Fig. 4suffers from soft compression, and
that there is a big performance gap between OP1 dB and Psat
for a GaN device. As such, it is more practical to use the
3-dB compression point (OP3 dB) in GaN HEMTs (i.e., when
the gain deviates by 3 dB from the small-signal gain or peak
gain), because this value is closer to Psat [23] and takes into
account soft compression nonidealities.
IV. SIMULATING DS
A device-level implementation of DS is performed to
explore the limitations of OIP3enhancement, as it is one of
the commonly used procedures by device engineers to improve
linearity. This is done by evaluating different linearity metrics
using a 150-nm gate length (LG=150 nm) GaN HEMT from
Fig. 5. Four different device variants with a total WG=300 µm. The
second, third, and fourth variants are employing DS.
Wolfspeed [24]. All of the linearity evaluations are done via
simulation using the Wolfspeed HEMT model in PathWave
advanced design system (ADS) [25], [26], [27]. The model
has been evaluated by the foundry across different frequencies,
bias conditions, and geometries to verify model accuracy for
the devices used in this work. Most importantly, large-signal
load pull, source pull, and gain compression were also verified
to ensure accurate large-signal simulations. In addition, the
simulations in this work adhered to the foundry’s usage guide-
lines, which specify a range of VDS values from 10 to 28 V
and current densities between 10 and 300 mA/mm.
DS was evaluated by fixing the total WGto 300 µm and
using two, three, and four devices, respectively (i.e., DS for
two devices can be done by having WG=2⇥75 µm for
both devices, for three devices WG=2⇥75 µm, and so
on). A single device with WG=4⇥75 µm was also used to
benchmark linearity performance. The four device variants can
be observed in Fig. 5. The reasoning behind fixing the total
WGis to assimilate the geometry constraints happening at the
device level and, at the same time, create a fair comparison
in terms of current density and Pout among all four different
device variants. In addition, all of the devices used in the
four variants have a gate–drain–gate spacing (GDG) of 22 µm
and a gate–source–gate spacing (GSG) of 48 µm. From a
dc standpoint, all device variants have a breakdown voltage
(BV) greater than 84 V. The single device variant (WG=
4⇥75 µm) has a peak unity current ( fT) and peak unity power
gain frequencies ( fmax) of 50.0 and 92.8 GHz, respectively.
The transconductance (gm1) and gate–source capacitance (Cgs)
curves as a function gate–source voltage (VGS) for the 4- ⇥
75-µm device were simulated and shown in Fig. 6(a) and (b),
respectively.
All four device variants were biased at VDS =20 V.
The gate–source voltages of the auxiliary devices were set
to VGS2 =VGS1 +1VGS,VGS3 =VGS1 +2·1VGS, and
VGS3 =VGS1 +3·1VGS, where 1VGS ⇡0.3 V. These
biasing conditions were chosen to cancel out the gm3peak
of each device and extend the cancellation window. Unless
stated otherwise, the device geometries of the device variants
and VDS bias will be fixed for the remaining simulations.
A. Simulated CW Results
The four device variants were compared by quantifying
their linearity performance (i.e., simulating OIP3, OP1 dB, and
PEREZ MARTINEZ et al.: LINEARITY PERFORMANCE OF DS IN GaN HEMTs: A DEVICE-TO-CIRCUIT PERSPECTIVE 2251
Fig. 6. Simulated gm1and Cgs for a 150-nm gate length device with a
WG=4⇥75 µm biased at VDS =20 V and extracted at f=10 GHz.
Fig. 7. Simulated (a) OIP3(f= 10 MHz) and (b) OP1 dB and OP3 dB
as a function of ID/IDSS at f=10 GHz.
OP3 dB) as a function of bias current. All four variants were
biased with current densities between 10 and 300 mA/mm
(ID/IDSS ⇡0.025–0.35) at a VDS =20 V, as these biasing
conditions are within the model’s usage guidelines. In addition,
the simulations were done at a frequency of 10 GHz under
each device’s optimal load-pull impedance that minimized gain
compression while providing high gain and PAE. To only
consider the contribution of the fundamental, all of the other
harmonic terminations (i.e., second, third, fourth, and fifth
harmonics) were shorted accordingly.
The simulated OIP3(1f=10 MHz), OP1 dB, and OP3 dB
are shown in Fig. 7(a) and (b) as a function of the ratio of
drain current to the saturation current (ID/IDSS ). For the first
variant, the first OIP3peak observed in Fig. 7(a) corresponds
to the zero crossing of gm3or the so-called “sweet spot.”
For the second, third, and fourth device variants, OIP3keeps
on increasing, as more auxiliary devices are used. However,
a higher ID/IDSS value is needed to turn on any additional
devices in order to obtain this OIP3performance advantage.
The peak OIP3for all four device variants (i.e., the sweet
spots) is marked with a star symbol in Fig. 7(a), as these
biasing conditions will be later used to evaluate linearity
performance under modulation.
In terms of large-signal CW linearity performance, OP1 dB
and OP3 dB are high at low ID/IDSS for all four variants due
to gain peaking from Class B and deep Class AB operation.
Past this point, the value for these two metrics improves,
as ID/IDSS increases due to an increasing gm1. For the first
variant, OP1 dB and OP3 dB decrease once gm1starts collapsing.
For the second, third, and fourth device variants, OP1dB and
OP3 dB stay constant for a wide range of ID/IDSS values, since
the input-bias range improves when using DS. However, these
linearity metrics are lower compared with the single device
variant, since the peak gm1value decreases (i.e., a trade-off
between the input-bias range and peak gm1is observed).
By comparing OIP3and OP1 dB/OP3 dB in Fig. 7, it is
observed that there is not a direct correlation between these
metrics when it comes to quantifying linearity. For example,
when the second and third variants have a peak OIP3(i.e., the
location of the start symbol), there exist other variants with
lower OIP3but higher OP1dB or OP3dB at a fixed ID/IDSS .
This implies that a high OIP3will not guarantee improved
large-signal linearity performance, especially for metrics that
are measured when the device behaves in a nonlinear fashion
(e.g., under compression).
V. A LTERNATIVE LINEARITY METRICS
Obtaining good linearity performance in PAs is of interest,
as this RF block determines the achievable data throughput and
Pout,avg and PAEavg in the transmitter (TX). To obtain further
insight into achieving high linearity from a PA, we revisit the
definition of an ideal linear transistor and the desired electrical
characteristics of such a device. In the context of this work,
we define an ideal linear transistor as a device that ampli-
fies input signals in a linear fashion; i.e., the superposition
principle is not violated, and no additional frequency content
is generated during the amplification process [19]. From a
circuit-level perspective, a linear transistor is a device that has
a linear output power response. This can be best visualized
by looking at the gain versus Pout and phase versus Pout char-
acteristics (i.e., the AM–AM and AM–PM distortion curves)
of the device. The key distinction of an ideal linear transistor
from a nonlinear device is that no early gain compression,
gain expansion, or output phase deviations are observed before
reaching the device’s output power limitations. This implies
that the performance gap between metrics, such as output
1-dB and 3-dB compression points OP1 dB/OP3 dB and Psat,
is minimal, as shown in the blue curve of Fig. 4.
At the circuit and system level, it has become standard prac-
tice at low GHz frequencies to compensate for PA nonlinearity
by using digital predistortion (DPD) techniques [28]. However,
such techniques are not only challenging but also impractical
at mm-Wave frequencies from a cost, speed/latency, complex-
ity, and performance perspective. Therefore, it is desirable to
have inherent hardware linearity that complies with the com-
munication standards through device innovations in conjunc-
tion with circuit techniques. Given the need to improve device
linearity, it is important to quantify transistor performance
using metrics that accurately predict system-level performance,
as conventional device linearity metrics, such as OIP3, do not
directly correlate with the large-signal/modulation-based per-
formance. These conventional metrics can still be used as
a guideline, but they should be paired up with other circuit
and system linearity metrics, such as AM–AM/AM–PM and
ACPR/EVM, respectively, since these metrics provide a better
indicator of system-level performance.
2252 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 5, MAY 2023
Fig. 8. Conceptual (a) AM–AM distortion curve and (b) AM–PM
distortion curve with their respective IQ constellation diagram showing
ideal constellation points and their influence due to gain compression
and phase mismatch.
A. AM–AM and AM–PM Distortion
The main sources of distortion in GaN HEMTs are
attributed to the nonlinear transconductance gm1and
voltage-dependent capacitances (i.e., gate–source capacitance
Cgs and the miller effect of the gate–drain capacitance Cgd).
From a device perspective, an increase in the average gm1
variation will translate to AM–AM distortion, which can be
represented as gain compression or expansion, and an increase
in the average Cgs variation will translate to phase variation.
This can be better visualized by looking at the IQ constellation
diagram and seeing how far the constellation points are from
their ideal location. The constellations will move outward or
inward due to AM–AM distortion, as shown in Fig. 8(a),
or they will rotate from the ideal constellation point due to
AM–PM distortion, as shown in Fig. 8(b).
B. ACPR and EVM
Linearity requirements at the system level quantify the
deviation in the transmitted signal quality with respect to
the ideal modulated input. In the TX, the PA is the block
that determines the overall system performance. Therefore, the
PA contributes the most to any variations in the transmitted
signal due to its strong nonlinearities. As such, the Third
Generation Partnership Project (3GPP) has set EVM and
ACPR specifications that assess the signal quality for various
modulation schemes [29].
In order to have a better understanding of these metrics and
their relevance in PA operation, it is important to define them
properly. EVM is defined mathematically by taking the root
mean square of the error vectors over the active subcarriers for
all the symbols in the modulation scheme. It is a measure of
the error in the modulation signal constellation and typically
is expressed as a percentage with respect to the power of the
ideal signal. Similarly, ACPR can be defined as the ratio of the
unwanted power in the adjacent channels to the rms power of
the transmitted signal in the main (reference) channel. Since
PAs are operated at high power levels to improve amplifier
efficiency, the output power in the main channel tends to leak
into adjacent channels, causing adjacent channel interference.
This metric is used to characterize spectral regrowth under
such scenarios.
VI. SIMULATED MODULATION RESULTS
The modulation performance for all four device variants was
simulated in PathWave ADS using virtual test bench (VTB)
to generate a 5G new radio (NR) uplink CP-OFDM 64-QAM
modulation scheme. For this particular modulation scheme, the
maximum allowable EVM is 8%, and the maximum allowable
ACPR is 30 dBc (i.e., the limit for NR devices) [29].
The modulated signal was then used to characterize signal
distortion by using methodologies, such as compact test signal
and distortion EVM, to speed up the simulation time while,
at the same time, maintaining good accuracy [30]. This
was done for a 10-GHz center frequency ( fc) and 10-MHz
modulation bandwidth (BW) for varying Pin until the devices
reached compression. In addition, the modulated simulations
were performed under the device’s optimal load pull at current
densities between 10 and 300 mA/mm, which correspond to
ID/IDSS ⇡0.025–0.35.
The RF performance trade-offs among all four device vari-
ants were assessed by comparing AM–AM/AM–PM distor-
tion, Pout,avg, PAEavg, ACPR, and EVM as a function of PBO.
In particular, we focused on the peak OIP3for all four device
variants (i.e., the sweet spots) as marked by the star symbols
in Fig. 7. The results are shown in Fig. 9(a)–(d).
When evaluating performance metrics, such as EVM and
ACPR, as a function of PBO, DS has a linearity advan-
tage at PBO values <19 dB, as more auxiliary devices
are used as seen from the EVM and ACPR curves in
Fig. 9(a) and (b). This region is of particular interest, as there
are even more stringent linearity requirements in the form
of ACPR for an NR base station (i.e., downlink), where the
ACPR requirement is set to 45 dBc as opposed to 30 dBc
for NR devices (i.e., uplink). For the uplink, EVM becomes
the limiting performance metric, as more PBO is needed to
meet the desired specification as opposed to ACPR, where the
specification is reached with less PBO. As such, the PA under
modulation conditions is backed-off until the maximum EVM
specification of 8% is obtained, which is set by the 64-QAM
modulation scheme. For lower PBO (<11 dB), the EVM
and ACPR values for the third and fourth device variants are
rising more rapidly, and they end up reaching the maximum
EVM target of 8% much sooner in comparison with the first
and second device variants.
The PAEavg is shown in Fig. 9(c) for all four variants.
As expected, the efficiency decreases, as more devices are
employed when using DS. This is because a higher current
density is needed to fully turn on all of the devices, leading to
a decrease in amplifier efficiency due to increased dc power
consumption. Pout,avg is also shown in Fig. 9(c). It can be
seen that the curves are overlapping (i.e., all variants have
approximately equal Pout,avg) due to the choice of a fixed
WG=300 µm for all four variants.
The AM–AM and AM–PM distortion curves with normal-
ized gain and phase for all four device variants are shown in
Fig. 9(d). From the AM–AM distortion curve, it can be seen
PEREZ MARTINEZ et al.: LINEARITY PERFORMANCE OF DS IN GaN HEMTs: A DEVICE-TO-CIRCUIT PERSPECTIVE 2253
Fig. 9. (a) EVM, (b) ACPR, (d) Pout,avg /PAEavg,(c) ACPR, and
(d) normalized AM–AM/AM–PM distortion curves as a function of PBO
for each variant’s peak OIP3under a CP-OFDM 64-QAM modulation
scheme for an fc=10 GHz, and BW =10 MHz.
that the performance gap between OP1 dB/OP3 dB and Psat for
the first device variant is the smallest, followed by the second
device variant and the third device variant, and finally by the
fourth device variant. This is because the first variant shows
gain expansion due to being biased in deep Class AB, while
the other three variants show gain compression, as they are
biased at higher ID/IDSS . However, we cannot conclude which
device has the best linearity performance near the maximum
EVM target from this information alone without considering
AM–PM distortion. The AM–PM distortion performance is
dependent on the class of operation and is also correlated
with the AM–AM curves, explaining the slope of the AM–PM
curves for the four different variants [31]. With the presence
of gain expansion in the first variant, there is a negative phase
shift in AM–PM distortion due to the miller effect of the
gate–drain capacitance (Cgd). The total input capacitance Cin
is given by Cin =Cgs +(1AV)Cgd, where AVis the voltage
gain. When there is gain expansion, AVincreases, leading to
a negative phase shift, and vice versa when gain compression
is present. Ultimately, the second variant has the least gain
and phase variation, followed by the first, third, and fourth
variants. This behavior explains why each variant reaches the
maximum EVM specification at different PBO values.
Since EVM is the limiting factor (i.e., the maximum
allowable EVM is reached first compared with the maximum
allowable ACPR), Pout,avg, PAEavg, and ACPR were extracted
for a fixed EVM =8%, which is the maximum tolerable EVM
for a 64-QAM modulation scheme. Table Isummarizes the
key RF performance metrics extracted at a fixed EVM =8% as
TABLE I
KEY RF PERFORMANCE METRICS FOR A FIXED EVM =8%
Fig. 10. (a) PBO, (b) Pout,avg,(c) ACPR, and (d) PAEavg as a function of
ID/IDSS for a fixed EVM =8%under a CP-OFDM 64-QAM modulation
scheme for an fc=10 GHz, and BW =10 MHz.
well as the peak OIP3for each variant. These results show that
a device with high OIP3does not translate to good modulation
performance, as the third and fourth device variants ended
up having the worst RF performance in terms of Pout,avg and
PAEavg. Moreover, these results show that even though the
single device variant offered a much lower OIP3without the
use of DS, it achieved comparable Pout,avg and higher PAEavg
performance than the second device variant. The fourth variant
showed slightly lower ACPR compared with the other variants,
since the device variant is backed off more compared with the
other three variants.
While a single bias point is not enough to make the
conclusions provided above, Pout,avg, PAEavg, ACPR, and PBO
were extracted as a function of ID/IDSS for a fixed EVM
of 8% in Fig. 10. The previously simulated bias points (i.e.,
the peak OIP3for all four device variants) are marked by
the star symbols for each respective metric. At low ID/IDSS
(<0.05), the PBO for the second, third, and fourth device
variants is <20 dB. As such, PAEavg and Pout,avg are close
to zero. The performance for these two metrics improves,
as more devices turn on (ID/IDSS increases). This also implies
that the fewer devices are used during DS, and the less
2254 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 70, NO. 5, MAY 2023
ID/IDSS is needed to obtain the desired RF performance under
modulation. From this set of data, we can clearly see that
DS primarily improves the input-bias range of the device,
and hence, these performance metrics are more constant as
a function of ID/IDSS . In terms of peak amplifier performance
under modulation, there is not a clear advantage when employ-
ing DS. In general, it is more important to improve amplifier
performance under large-signal modulated conditions, as they
are a better representation of system level as opposed to
low-distortion conditions, where metrics, such as OIP3, are
measured.
VII. CONCLUSION
This work provides a detailed discussion describing the
limitations of using conventional linearity metrics (i.e., OIP3
and OP1 dB) to quantify DS in GaN HEMTs. A device-
to-circuit approach was taken to explain the discrepancies
between the weakly nonlinear metrics and the desired large-
signal communication-based linearity metrics. Four different
variants (with three of them employing DS) were compared
by simulating both device and circuit metrics to evaluate their
performance. We demonstrate that OIP3does not accurately
predict system-level linearity performance under modulation,
and as such, other metrics, such as AM–AM/AM–PM dis-
tortion, ACPR, and EVM, should be used to obtain a better
insight into the device’s performance. We conclude this work
by analyzing the trade-offs among linearity, efficiency, and Pout
under PBO conditions for the four different device variants.
Ultimately, this work provided a circuit and system-level
perspective on linearity for PAs used in modern wireless
links to help the device community make a better qualify the
linearity of GaN HEMTs.
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