Available via license: CC BY 4.0
Content may be subject to copyright.
Citation: Li, Y.; Wang, R.; Zhong, L.;
Mao, L.; Sun, C.; Li, X.; Hu, S.
Analysis and Design of a
HighFrequency Isolated
DualTransformer DCDC Resonant
Converter. Electronics 2023,12, 103.
https://doi.org/10.3390/
electronics12010103
Academic Editor: Ahmed
AbuSiada
Received: 30 November 2022
Revised: 17 December 2022
Accepted: 22 December 2022
Published: 27 December 2022
Copyright: © 2022 by the authors.
Licensee MDPI, Basel, Switzerland.
This article is an open access article
distributed under the terms and
conditions of the Creative Commons
Attribution (CC BY) license (https://
creativecommons.org/licenses/by/
4.0/).
electronics
Article
Analysis and Design of a HighFrequency Isolated
DualTransformer DCDC Resonant Converter
Yinan Li 1,2, Rui Wang 1,2 , Liping Zhong 2, Limin Mao 2, Chuan Sun 3, Xiaodong Li 4and Song Hu 2,4,*
1School of Mechanical Engineering, Yancheng Institute of Technology, Yancheng 224051, China
2School of Electrical Engineering and Automation, Changshu Institute of Technology, Suzhou 215000, China
3Department of Electronic and Information Engineering, The Hong Kong Polytechnic University,
Hong Kong 999077, China
4Faculty of Innovation Engineering, Macau University of Science and Technology, Macau 999078, China
*Correspondence: husong@cslg.edu.cn
Abstract:
This paper presents the operation, analysis, design, simulation, and experimental results for
a proposed DualTransformer DCDC Resonant Converter (DTRC). A threearm bridge is employed
on the input side and an Htype bridge is employed on the output side of the DTRC, and the two
bridges are connected with two highfrequency (HF) transformers. By optimizing the ratio
k
of
the two HF transformers, the proposed DTRC has a lower boundary power for losing zerovoltage
switching (ZVS). That means the DTRC has a wider ZVS operation range and lower switching loss
when compared with a traditional softswitching pulse width modulation (PWM) resonant converter.
The operation principle, power transfer, ZVS characteristics, and design procedures are analyzed in
detail. Both simulation and experimental results prove the feasibility and superiority of the proposed
DualTransformer DCDC Resonant Converter.
Keywords:
dualtransformer topology; resonant DCDC converter; zerovoltage switching (ZVS);
backﬂow power minimization
1. Introduction
An isolated DCDC power converter is an essential part of the power systems applied
in many ﬁelds, such as electric vehicles, energy storage systems, and distribution sys
tems [
1
]. For these applications, an isolated DCDC power converter can meet the require
ments of galvanic isolation and power conversion [
2
,
3
]. Among various isolated DCDC
power converter topologies, highfrequency (HF) softswitching pulsewidthmodulation
(PWM) DCDC converters have become a universal solution due to their advantages such
as low conduction loss, high power density, and high efﬁciency [4,5].
As bidirectional softswitching PWM DCDC converters, dual active bridge (DAB)
converters are the most appealing due to their symmetrical topology, relatively simple
structure, and inherent features. Many modulation schemes have been proposed for DAB
converters, such as singlephaseshift modulation (SPS) and multiphaseshift modulation
(MPS). With more degrees of freedom and independent control variables of these modula
tion methods, control strategies for different optimization goals have been reported [
6
,
7
],
such as minimum reactive current and power [
8
,
9
], minimum conduction loss [
10
], and a
full power operation range for soft switching [
11
]. Nevertheless, the power calculation of
these optimization methods is complex, and the operational mode is variable. Depending
on the fundamental optimal methodbased universal mode [
12
], a duty cycle modulation is
proposed in [
13
]. Although the calculation becomes less complex, the softswitching range
is limited when the converter operation gain is nonoptimal. Simpliﬁed control strategies
conﬂict with a wide zerovoltage switching (ZVS) range for traditional DCDC resonant
converters. Thus, a modiﬁed topology of the conventional DAB is proposed in [
14
] to
widen the ZVS range. However, the adopted hybrid control method is also complex.
Electronics 2023,12, 103. https://doi.org/10.3390/electronics12010103 https://www.mdpi.com/journal/electronics
Electronics 2023,12, 103 2 of 19
Apparently, these topologies and control strategies are complicated and cannot solve
problems effectively. Another softswitching PWM resonant topology,
LLC
resonant con
verters, have received more attention due to ZVS being achievable for switches and zero
current switching (ZCS) being realizable for diodes. For an
LLC
resonant converter, the
softswitching operation of all the switches and rectiﬁer diodes can be achieved when
designed in a proper working area [
15
–
17
]. Nevertheless, the circulation current will be
enormous if the switching frequency operates far from the resonant frequency, narrowing
the voltage regulation range and inﬂuencing performance. In [
18
,
19
], the related
LLC
converters are modiﬁed to enhance the efﬁciency over a wide load range, but the topology
and control methods are very complex. A backﬂow power analysis method was proposed
in [
20
] to increase the efﬁciency of
LLC
resonant converter. Based on the analysis of the
internal relationship between the converter variables, the method can reduce the backﬂow
power by optimizing the resonant parameters. However, the method neglects the inﬂuence
of the magnetizing current during the deadtime. This results in the switches not meeting
ZVS in the designed region. In [
21
], a combination control scheme of pulse frequency mod
ulation (PFM) and SPS was proposed to ensure operation over a wide range. Furthermore,
the paper also proposed a burstmode control to maintain performance under lightload
conditions. Nevertheless, the regulation capability of the hybrid control weakens at light
load, and the proposed control method is complex in the reverse mode of an
LLC
resonant
converter. Therefore, an
LLC
resonant converter with an auxiliary capacitor was proposed
to improve the regulation capability in [
22
]. However, the inﬂuence of the coupling was
ignored. In [
23
], a dual halfbridge
LLC
resonant converter was proposed to increase the ef
ﬁciency. By making two resonant tanks work in different modes, ZVS for primary switches
and ZCS for secondary diodes are achieved over the full power range. Nevertheless, the
paper does not take into account the problem of the balance and equalization between two
resonant tanks.
The concept of dualtransformer DCDC converters has spread over the years
[24–28]
.
In [
24
], a ﬁxedfrequency dualtransformer
LLC
converter was studied. The converter
can suppress the peak current and widen the ZVS operating range. However, there
is always a high circulation current in the system, which causes high conduction loss.
In [
25
], the dualtransformer structure can ensure soft switching under a wide range of
loads. Nevertheless, the active switches cannot achieve their ZVS at light load when
operating in buck mode. For this, an improved topology and optimized modulation
method [
26
] were provided to make sure the converter operates stably in buckboost mode.
However, the power density becomes very low due to the complicated secondary side
circuit. Further, the ZVS conditions were not improved either. A dualtransformer converter
with discontinuous conduction mode operation is reported in [
27
] to reduce the ﬁlter size
and improve performance. Additionally, in [
28
], a control law was proposed to simplify
the topology structure and to reduce the degrees of freedom. Although most switches can
achieve a wide ZVS range, the ZVS range of switches on the primary side is limited in
reverse mode, and conduction loss is increased.
This paper proposes a new dualtransformer topology to improve the performance.
The voltage stress on the transformers is greatly decreased by disassembling an HF trans
former into two HF transformers. The current stress and backﬂow power on the secondary
side are naturally minimized due to the topology structure. By optimizing the ratio
k
of
two HF transformers, the proposed DTRC has a lower boundary output power of losing
ZVS. Therefore, the ZVS operation range of the converter is widened, resulting in reduced
switching loss and increased efﬁciency. Compared to a traditional softswitching PWM
resonant converter, the performance of the proposed converter is much better. The outline
of the paper is as follows. Section 2presents the topology and the operating principle of the
proposed converter. Section 3describes the steadystate analysis and the ZVS switching
constraints to obtain the power transfer characteristics. In Section 4, the selection and
design of the parameters with detailed procedures are given. Finally, simulation and
experimental results from actual tests on a prototype converter are provided in Section 5.
Electronics 2023,12, 103 3 of 19
2. Topology Details and Operation of the DTRC
The proposed DualTransformer DCDC Resonant Converter (DTRC) consists of a
threearmbridge circuit and an Hbridge circuit, as shown in Figure 1. On the primary
side, it has four active switches
MA∼MD
, and each switch has a body diode (
dA∼dD
) and
a parasitic capacitor (
CMA ∼CMD
). In addition, the threearm bridge can be seen as two
identical halfbridge circuits. Four diodes
d1∼d4
form the Hbridge circuit on the secondary
side. The threearm bridge and Htype bridge are connected by two HF transformers,
T1
and
T2
. On the primary side of
T1
and
T2
, two identical halfbridge circuits are connected in
parallel. The neutral voltage point is shared by two halfbridge circuits and two capacitors,
C1
and
C2
. The resonant tank (
Lr
and
Cr
) is connected in series on the secondary side of
T1
and
T2
. The currents of two halfbridge circuits reﬂected on the secondary side are equal to
the resonant current
ir
due to the series connection on the secondary side. The turns ratio
of T1is n1: 1, while T2is n2: 1.
CH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
n2:1
m
n
LrCr
ir
+

veq
VHRL
+

VL
Figure 1. The topology of the DualTransformer DCDC Resonant Converter.
The steadystate operation waveforms of the DTRC are shown in Figure 2. Fixed
switchingfrequency gating signals with 50% duty cycle are given to switches
MA∼MD
.
Switches
MA
,
MB
, and
MC
,
MD
are complementarily conducted, i.e., switching signals
on the same bridge arm are 180
°
out of phase. The midpoint voltages
vxz
and
vyz
are
generated by the parallel connection. Their amplitudes are equal to
VH
/2. Phaseshifted
gating signals are given to arm
MC
,
MD
, causing a phaseshifted angle
α
between the
voltages
vxz
and
vyz
. The output voltage
VL
can be regulated by changing the phaseshift
angle
α
. Due to four diodes forming the circuit, rectiﬁcation is realized naturally on the
secondary side of the DTRC. Thus, the resonant current
ir
is in phase with the voltage
vmn
.
The voltage
vmn
generated on the secondary side lags behind the midpoint voltage
vxz
by
phaseshift angle
γ
, which is deﬁned as the time delay from the rising edge of
MA
to the
zerocrossing point of ir.
As shown in Figure 2, there are six operation intervals in one switching cycle. The
equivalent circuits for these intervals are shown in Figure 3. For convenience, several
assumptions are made: (1) All the active and passive components and HF transformers
are ideal. (2) The deadgap effect and effects of all parasitic capacitors (
CMA ∼CMD
) are
neglected. (3) Residual capacitors (
CH
,
C1
,
C2
,
CL
) are large enough to maintain the voltages.
Electronics 2023,12, 103 4 of 19
MAMB
MCMD
vxz
vyz
vmn
ir
t0t1t2t3t4t5t6
α
γ
VH/2
VH/2
VH/2
VH/2
VL
VL
Figure 2. The steadystate operation waveforms of the DTRC.
Interval 1 (t0–t1)
(Figure 3a): Before
t0
, switches
MB
and
MD
were conducted. At
t
=
t0
,
MB
is turned off and
MA
is turned on. The current ﬂows through
dA
. The resonant
current
ir
is negative and increases gradually. On the secondary side, the resonant cur
rent ﬂows through diodes
d2
and
d3
; therefore, the voltages
vxz
= +
VH
/2,
vyz
=
−VH
/2,
vmn =−VL. This interval ends when MDis turned off and MCis turned on.
Interval 2 (t1–t2)
(Figure 3b): In this interval,
MD
is turned off and
MC
is turned on.
The resonant current
ir
is constantly negative and gradually increasing. Meanwhile, it ﬂows
through diodes
d2
and
d3
. Therefore the voltage
vmn
=
−VL
. The currents ﬂow through
dA
and
dC
on the primary side. The midpoint voltages
vxz
= +
VH
/2,
vyz
= +
VH
/2. This
interval ends when irreaches 0.
Interval 3 (t2–t3)
(Figure 3c): Compared with Interval 2, the resonant current changes
the polarity in this interval. It increases from 0 to positive and ﬂows through diodes
d1
and
d4
. The switch currents become positive and ﬂow through
MA
and
MC
, so the voltages
vxz
= +
VH
/2,
vyz
= +
VH
/2,
vmn
= +
VL
. This interval ends when
MA
is turned off and
MB
is
turned on.
Interval 4 (t3–t4)
(Figure 3d): This interval begins when
MA
is turned off and
MB
is
turned on forcibly. The current is shifted from
MC
to
dB
, which enables the zerovoltage
turnon of
MB
. There is no change on the secondary side except for a gradual decrease in
the resonant current. The voltages
vxz
=
−VH
/2,
vyz
= +
VH
/2,
vmn
= +
VL
. This interval
lasts until MCis turned off and MDis turned on.
Electronics 2023,12, 103 5 of 19
Interval 5 (t4–t5)
(Figure 3e): The new interval begins when the gating signal of
MC
is removed.
MD
is turned on with ZVS. There is still no change on the primary side. The
voltages
vxz
=
−VH
/2,
vyz
=
−VH
/2,
vmn
= +
VL
. At the end of this interval,
t
=
t5
, and the
resonant current reaches 0.
Interval 6 (t5–t6)
(Figure 3f): Although the resonant current reached 0 at the end of the
last interval,
MB
and
MD
remain turned on. On the secondary side, the resonant current
decreases and ﬂows through
d2
and
d3
. The diodes
d1
and
d4
are turned off with ZCS. The
voltages
vxz
=
−VH
/2,
vyz
=
−VH
/2,
vmn
=
−VL
. This interval ends when
MB
is turned off
and MAis turned on. This completes the operation of the DTRC in one switching cycle.
VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq
VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq
VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq VHCH
MA
MB
MC
MD
dA
dB
dC
dD
d1
d2
d3
d4
CMA
CMB
CMC
CMD
C1
C2
T1
T2
n1:1
CL
ir1
ir2
iL
+

vmn
x
y
z
+

n2:1
m
n
LC
ir
+

veq
(a) Interval 1 (t0t1) (b) Interval 2 (t1t2)
(c) Interval 3 (t2t3) (d) Interval 4 (t3t4)
(e) Interval 5 (t4t5) (f) Interval 6 (t5t6)
RLVLRLVL
RLVLRLVL
RLVLRLVL
Figure 3. The equivalent circuits during different intervals of DTRC.
3. SteadyState Analysis and the ZVS Regions of the DTRC
3.1. SteadyState Analysis
To simplify the calculation, the fundamental harmonics approximation (FHA) ap
proach is used due to the nearly sinusoidal waveforms of voltages/currents in the DTRC.
Further, parameters on the primary side of HF transformers are transferred to the secondary
side for ease of analysis. It is assumed that all of the active and passive components and
HF transformers are ideal, and the deadgap effect is ignored, too. To make analysis more
convenient, all parameters are normalized using the following base values:
VB=VH
n1
;ZB=RL;IB=VB
ZB
;ωB=ωr=1
√LrCr
(1)
where
RL
=
V2
L/Pr
is the fullload resistance on the secondary side, and
Pr
is the rated
power. The turns ratios of two HF transformers are
n1
: 1 and
n2
: 1, respectively, and the
parameter kis deﬁned as k=n2/n1. The voltage gain Mof the DTRC is deﬁned as:
Electronics 2023,12, 103 6 of 19
M=n1VL
VH
(2)
The normalized values of reactance can be shown as:
XLr,pu =QF,XCr,pu =−Q
F(3)
where
F=ωs/ωr
,
Q=ωrLr/RL
are the normalized switching frequency and quality
factor, respectively.
The FHA equivalent circuit of the DTRC is given in Figure 4. For the resonant tank
attached on the secondary side, it is more convenient that the midpoint voltages
vxz
and
vyz
reﬂect onto the secondary side. The normalized expressions of the reﬂected voltage
sources v0
xz,pu and v0
yz,pu are given by:
v0
xz,pu (ωst) = 1
n1
vxz,pu (ωst) = 2
πsin(ωst)
v0
yz,pu (ωst) = 1
n2
vyz,pu (ωst) = 2
kπsin(ωst−α)
(4)
Deﬁning veq,pu as the equivalent voltage source of v0
xz,pu and v0
yz,pu , it is expressed as:
veq,pu (ωst) = 2
πr2
kcos α+ ( 1
k)2+1 sin(ωst−arctan(
1
ksin α
1+1
kcos α
)) (5)
The normalized voltage source vmn,pu is obtained as:
vmn,pu (ωst) = 4M
πsin(ωst−γ)(6)
According to Figure 4, the normalized resonant current ir,pu is written as:
ir,pu(ωst) = veq,pu(ωst)−vmn,pu (ωst)
j(QF −Q
F)(7)
LrCr
xz
v
n
1
1
yz
v
n
2
1
mn
v
LrCr
mn
v
eq
v
Figure 4. The FHA equivalent circuit of the DTRC.
After simplifying the equation, the resonant current is:
ir,pu(ωst) = Ir,pu ·cos(ωst+∠ir,pu )(8)
where the peak value of the resonant current
Ir,pu
and the phase angle
∠ir,pu
are shown as
follows:
Ir,pu =2
π(QF −Q
F)r4M2−4M1
kcos(γ−α)−4Mcos γ+2
kcos α+ ( 1
k)2+1
∠ir,pu =arctan(2Msin γ−1
ksin α
1+1
kcos α−2Mcos γ
)
(9)
Electronics 2023,12, 103 7 of 19
Thus, the normalized output power can be expressed as:
PL,pu =4M
π2(QF −Q
F)(sin γ+1
ksin(γ−α)) (10)
Due to the diodes’ rectiﬁcation on the secondary side, the resonant current
ir
is in
phase with the voltage vmn. Thus, the resonant current irequals zero at t2:
ir,pu(ωst2) = ir,pu (γ) = 0 (11)
which means the phase angle of iris equal to γ+π
2:
∠ir,pu
=γ+π
2(12)
Then, the relationship between α,γand Mcan be expressed as:
2M=cos γ+1
kcos(γ−α)(13)
Combining (10) with (13), the normalized output power can be calculated as (14). It is
clear that the value of the output power is controlled only by the phaseshifted angle α.
PL,pu =4M
π2(QF −Q
F)r(1
k)2+2
kcos α−4M2+1 (14)
3.2. ZVS Region
The essential condition of ZVS operation for each switch is that the switch current
ought to be negative when the switch is turned on. To achieve ZVS, the resonant current
should be negative for
MA
and
MC
while positive for
MB
and
MD
at the turnon moment.
Thus, the ZVS constraints for the switches
MA∼MD
of the DTRC are simpliﬁed as follows:
ZVS of
MA
and
MC
requires
ir
< 0, while that of
MB
and
MD
requires
ir
> 0. The constraints
can be expressed as follows:
ir(t0)<0
ir(t1)<0
ir(t3)>0
ir(t4)>0
⇒ir(t0) = −ir(t3)<0
ir(t1) = −ir(t4)<0(15)
Then, the ZVS conditions for the switches of the DTRC are summarized in Table 1.
Table 1. The ZVS conditions for the switches.
Switches ZVS Conditions
MA,MB2Mcos γ−1
kcos α−1<0
MC,MD2Mcos(γ−α)−cos α−1
k<0
The ZVS operation regions for the trajectory of the output power transfer are shown
in Figure 5. The red line represents the ZVS operation boundary of
MA
,
MB
, and the cyan
line is the boundary of
MC
,
MD
. The region where switches
MA∼MD
will lose ZVS are
marked in the ﬁgure. The black line represents the trajectory of the power transfer. The
blue intersection of three lines indicates the zero power, i.e.,
PL
= 0. It can be seen that the
power point is moving away from the ZVS boundary of
MA
,
MB
with the increasing power
level, which means the switches
MA
and
MB
always work in ZVS operation. Meanwhile,
part of the black line is in the area where
MC
and
MD
lose ZVS. That means
MC
and
MD
will lose ZVS at partial loads.
Electronics 2023,12, 103 8 of 19
α
γ
MC,MD ZVS
boundary
MA,MB ZVS
boundary
MC,MD lose
ZVS
MA,MB lose
ZVS
Power Increasing
Figure 5. The ZVS operation regions for the trajectory of the power transfer.
4. Design Procedures
4.1. Selection of k
From the steadystate and ZVS region analysis, it is found that the proposed DTRC
operates as the conventional softswitching PWM resonant converter when
k
= 1. In order
to compare the performances of the DTRC and the PWM converter, the total loss of two
converters is analyzed next.
The total loss of the resonant converter is mainly divided into two aspects: the con
duction loss and the switching loss. Combining (9) with (13), the normalized root mean
square (RMS) value of resonant current Ir,rms,pu can be expressed as:
Ir,rms,pu =2
√2π(QF −Q
F)r(1
k)2+2
kcos α−4M2+1 (16)
From (14) and (16), the relationship between the output power and the RMS value of
the resonant current is shown as (17):
Ir,rms,pu =√2π·PL,pu
4M(17)
It can be seen that the RMS value of resonant currents through the DTRC and the
PWM converter will be the same if they have the same output power
PL
; so the different
values of
k
do not affect the RMS value of resonant current. Therefore, there is no apparent
difference in conduction loss between the DTRC and the PWM converter.
Consequently, the switching loss becomes the principal portion of the total loss for two
converters. Due to the diodes’ circuit on the secondary side, the operation of the converter
must meet the requirement of expression (13), i.e., the diodes’ rectiﬁcation. According
to Figure 5, it is possible to lose ZVS of the switches
MC
and
MD
at light load for two
converters. Thus, the boundary output power of losing ZVS for each converter can be
predicted by the following conditions:
2Mcos(γ−α)−cos α−1
k=0
2M=cos γ+1
kcos(γ−α)(18)
Then, the boundary output power of losing ZVS for the proposed DTRC is expressed
as:
Electronics 2023,12, 103 9 of 19
PL,ZVS,pu =4M
π2(QF −Q
F)r1−(2M−1
k)2(19)
When
k
= 1, the DTRC works as the PWM converter. Let
k
be equal to 1 in expression
(19), the boundary output power of losing ZVS for the traditional PWM converter can be
simpliﬁed as:
Pt,ZVS,pu =8M
π2(QF −Q
F)pM−M2(20)
Once the voltage gain
M
is determined, the boundary output power of losing ZVS for
the traditional PWM converter is speciﬁc while uncertain for the DTRC due to
k
. Thus, the
performance of the DTRC is decided by
k
. Set
D
as the ratio of the boundary output power
of losing ZVS between the DTRC and the traditional PWM converter as follows:
D=2√M−M2
q1−(2M−1
k)2
(21)
Taking
M
= 0.5 as an example, the relationship between
D
and different
k
is shown in
Figure 6. According to (21),
D
> 1 means the boundary output power of losing ZVS for the
DTRC is lower than that for the PWM converter. That means the DTRC has a wider ZVS
operation range when
D
> 1. As shown in Figure 5, the ZVS constraint of switches
MC
is
the same as
MD
for the DTRC and the traditional PWM resonant converter. Even at 50%
load, it is possible for
MC
and
MD
to lose their ZVS. The values of
D
represent the multiple
of the boundary output power of the PWM converter. For example, if the ZVS boundary
power of the PWM converter is 100 W when D = 2, the boundary power of the DTRC
will only be 50 W. According to expression (21), the value of
D
will be large enough at
k
= 0.5, which means the DTRC can hardly lose ZVS. In order to validate the above analysis,
M
= 0.5,
k
= 0.5 are selected to compare the switching loss (ZVS operation) of the DTRC
and traditional softswitching PWM converter.
D
k
(0.51, 3.61)
k=0.5
Figure 6. The ratio of the boundary output power for losing ZVS at different values of k.
Figure 7shows the variation ranges of
PL,pu
and
α
when
M
and
k
change. Once
M
and
k
are determined, the normalized output power
PL,pu
will only be regulated by the phase
angle
α
according to (14). Figure 7demonstrates that the DTRC has a broader operating
range and more extensive power range when
M
= 0.5,
k
= 0.5. It also can be found that the
Electronics 2023,12, 103 10 of 19
peak output power when
M
= 0.5,
k
= 0.5 is always greater than others. Therefore, in this
case, the output power of DTRC can be easily regulated.
M=0.2,k=0.9
M=0.5,k=0.5
M=0.6,k=1
M=0.8,k=1.2
M=1,k=0.7
PL,pu
α
Figure 7. The variation ranges of PL,pu and αat different values of Mand k.
4.2. Design Example
To validate the theoretical analysis of the DTRC, a converter is designed as follows:
the rated output power
Pr
= 200 W, input voltage
VH
= 150 V, output voltage
VL
= 80 V,
switching frequency
fs
= 100 kHz, and values of
M
= 0.5,
k
= 0.5 are chosen. The selection
value of the normalized switching frequency
F
should be greater than one but close to one
to regulate ZVS operation of the converter and to reduce the circulation of the switches on
the primary side. The appropriate
Q
value is selected to reduce the resonant current and
voltage peak and to improve the power factor. In this paper, Q= 1 and F= 1.4 are chosen.
For the proposed DTRC,
VH
= 150 V,
VL
= 80 V,
Pr
= 200 W,
fs
= 100 kHz,
M
= 0.5, and
k= 0.5. Thus, the turns ratio of T1can be calculated by M, and it is shown as follows:
M=n1VL
VH
=0.5 (22)
which turns out to be:
n1=MVH
VL
=0.9375 (23)
Thus, the turns ratio of T2can be written as:
n2=kn1=0.46875 (24)
The base value of the voltage
VB=VH
n1
=160V(25)
the load resistance
RB=RL=V2
L
Pr
=32Ω(26)
and the current
IB=VB
RB
=5A(27)
Therefore, the base value of the output power will be:
PB=V2
B
RB
=800W(28)
Electronics 2023,12, 103 11 of 19
The values of the resonant tank are calculated as:
F=ωs
ωr
=2πfs
√LrCr
=1.4
Q=ωrLr
RL
=1
(29)
The values of the resonant tank are solved as:
Lr=71.3µH
Cr=69.63nF.(30)
5. Simulation and Experimental Results
5.1. Simulation Results
The ZVS region and the power lines of
k
and
α
are shown in Figure 8. The switches
MA
and
MB
consistently achieve ZVS no matter what the value of
k
is, as shown in Figure 5.
The shaded area represents that
MC
and
MD
lose ZVS. The red dashed lines are the power
lines of 200 W, 150 W, 100 W, and 50 W, respectively. According to Figure 8, the purple line
k
= 1 has four intersections with four power lines, and the intersections are all located in
the shaded area. That means switches
MA
and
MB
achieve ZVS, while
MC
and
MD
lose
ZVS during the four power conditions when
M
= 0.5. For the traditional softswitching
PWM converter, i.e.,
k
= 1, switches
MC
and
MD
lose ZVS at light load or even half load.
The conclusion conforms to how a traditional softswitching PWM converter performs. For
the proposed DTRC, four intersections are located out of the shaded area at
k
= 0.5. That
means all the switches work in ZVS operation under different loads.
00.5 11.5 22.5 3
0
0.5
1
1.5
2
2.5
k
k
α
k=1
k=0.5
MC,MD
ZVS boundary
MC,MD
lose
ZVS
ZVS
PL=200W
PL=150W
PL=100W
PL=50W
Figure 8. The ZVS region and the power lines of kand α.
To show the relationship more clearly, the comparison between the traditional PWM
converter (k= 1) and the DTRC (k= 0.5) is shown in Figure 9. Figure 9a shows the ZVS
region and the power lines when
k
= 1 at
M
= 0.5. Switches
MA
,
MB
continuously meet ZVS
when
k
takes different values. The blue line is the ZVS boundary of switches
MC
,
MD
. The
area where
MC
,
MD
lose ZVS is marked in the ﬁgure. The dashed lines in magenta are the
different power lines. As shown in Figure 9, the values of
α
and
γ
that allow the converter
to achieve the required power are restricted due to rectiﬁcation of the secondaryside
Htype bridge, i.e., the green line in the ﬁgure. In Figure 9a, four power lines, 200 W, 150 W,
100 W, and 50 W, have four intersections with the rectiﬁcation path. All of the intersections
Electronics 2023,12, 103 12 of 19
are located in the areas where
MA
,
MB
achieve ZVS while
MC
,
MD
lose ZVS when
k
= 1.
In Figure 9b, the intersections are located where
MA
,
MB
,
MC
, and
MD
all work in ZVS
operation when k= 0.5.
In this paper, PSIM software is used to perform the simulation. Simulations are done
for four cases: 200 W, 150 W, 100 W, and 50 W. The critical simulation waveforms of the mid
point voltages (
vxz
and
vyz
), the secondary side squarewave voltage (
vmn
), the resonant
current (
ir
), the output current (
iL
), and the currents through four active switches (
MA∼MD
)
and four diodes (d1∼d4) at k= 0.5 when M= 0.5 are shown in Figure 10, respectively. The
output voltage
VL
is regulated at 80 V. The output current
iL
realizes the rectiﬁcation, and
the diodes
d1∼d4
achieve ZCS on the secondary side. The switches on the primary side
all work in ZVS operation at the four power conditions. All waveforms are matched with
what is expected.
α
α
γ
γ
(a)
(b)
MC,MD lose
ZVS
MC,MD ZVS
boundary
PL=50W
PL=100W
PL=150W
PL=200W
PL=200W
PL=150W
PL=100W
PL=50W
Figure 9. The ZVS region and the power lines of αand γat M= 0.5: (a)k= 1; (b)k= 0.5.
The voltages
vxz
and
vyz
have a phase shift
α
, and their amplitudes are
VH
/2 = 150 V/2
= 75 V. The voltage
vmn
lags behind
vxz
a phaseshifted angle
γ
, and its amplitude is 80 V.
The resonant current
ir
is approximately sinusoidal. Further, Figure 10 demonstrates ZVS
Electronics 2023,12, 103 13 of 19
for
MA∼MD
since their bodyparallel diodes conduct before the switches start conducting.
For the converter, the current stress decreases with lower power, and the output current
iL
has almost no circulation during each cycle.
0
0.4
0.8
I(D 2 )
0
0.4
0.8
I(D 3 )
0.0624 0.06241 0.06242
Time (s)
0
0.4
0.8
I(D 4 )
0
1
2
I(D 2 )
0
1
2
I(D 3 )
0.06242 0.062425 0.06243 0.062435 0.06244
Time (s)
0
1
2
I(D 4 )
0
1
2
I(D 2 )
0
1
2
I(D 3 )
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
I(D 4 )
0
1
2
3
I(D 2 )
0
1
2
3
I(D 3 )
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
I(D 4 )
0
2
2
4
I(S 3)
0
2
2
4
I(S 4)
0.06242 0.062425 0.06243 0.062435 0.06244
Time (s)
0
1
2
I(D 1 )
0
4
4
I(S 3)
0
4
4
I(S 4)
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
I(D 1 )
0
2
2
I2nd
0
2
2
I(S 1)
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
I(S 2)
0
4
4
8
I(S 3)
0
4
4
8
I(S 4)
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
I(D 1 )
0
2
4
2
4
I2nd
0
2
4
2
4
I(S 1)
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
4
4
I(S 2)
(a)
(b)
(c)
0
1
2
I(S 3)
0
1
2
I(S 4)
0.0624 0.06241 0.06242
Time (s)
0
0.4
0.8
I(D 1 )
(d)
0
50
100
50
100
Vac Vbc
0
50
100
50
100
Vsnd
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
Io
0
50
100
50
100
Vac Vbc
0
50
100
50
100
Vsnd
0.06244 0.062445 0.06245 0.062455 0.06246
Time (s)
0
2.5
Io
0
2
2
I2nd
0
I(S 1)
0.06242 0.062425 0.06243 0.062435 0.06244
Time (s)
0
I(S 2)
0
100
100
Vac Vbc
0
100
100
Vsnd
0.06242 0.062425 0.06243 0.062435 0.06244
Time (s)
0
1
2
Io
0
1
1
I2nd
0
1
1
I(S 1)
0.0624 0.06241 0.06242
Time (s)
0
1
1
I(S 2)
0
100
100
Vac Vbc
0
100
100
Vsnd
0.0624 0.06241 0.06242
Time (s)
0
0.4
0.8
Io
vxz vyz
vmn
iL
ir
iMA
iMB
iMC
iMD
id1
id2
id3
id4
vxz vyz
vmn
iL
ir
iMA
iMB
iMC
iMD
id1
id2
id3
id4
vxz vyz
vmn
iL
ir
iMA
iMB
iMC
iMD
id1
id2
id3
id4
vxz vyz
vmn
iL
ir
iMA
iMB
iMC
iMD
id1
id2
id3
id4
Figure 10.
The key simulation waveforms of the DTRC at
k
= 0.5 when
M
= 0.5: (
a
) 200 W; (
b
) 150 W;
(c) 100 W; and (d) 50 W.
Electronics 2023,12, 103 14 of 19
5.2. Experiment Results
A 200 W, 150 V input, 80 V output, switching at 100 kHz, experimental dualtransformer
DCDC resonant converter was built in the laboratory based on the design parameters
obtained in Section 4. Some details are provided to verify the performance of the proposed
DTRC in the following. Figure 11 shows the experimental prototype divided into four
parts: the FPGA controller, the primary and secondary side bridge circuits, the HF trans
formers, and the
LC
resonant tank. The critical parameters of the experimental prototype
are summarized in Table 2. The control platform is an FPGA development board, in which
HF gating signals for the MOSFETs are generated. The resonant inductor
Lr
comprises two
transformer leakage inductors and an external inductor.
Table 2. Parameters of the prototype.
Parameter Value
Input voltage (VH) 150 V
Output voltage (VL) 80 V
Rated power (Pr) 200 W
Switching frequency (fs) 100 kHz
Turns ratio of the transformer T1(n1:1) 30:32
Turns ratio of the transformer T2(n2:1) 15:32
Resonant inductor (Lr) 71.3 µH
Resonant capacitor (Cr) 69.63 nF
Primaryside switches (MA∼MD) C3M0025065D (650 V/97 A)
Secondaryside diodes (d1∼d4) MBR40250G (250 V/40 A)
FPGA controller
Secondary side
bridge
Primary side
bridge
HF transformers and
LC resonant tank
Figure 11. The experimental prototype of the proposed converter.
Figure 12a–d illustrate the gating signals
vg,MA∼vg,MD
of the active switches
MA∼
MD
at different power levels from 100% load to 25% load, respectively. Power devices
MA
,
MB
and
MC
,
MD
work complementarily with a ﬁxed duty cycle of 0.5. Figure 13 provides
the measured results of midpoint voltages
vxz
,
vyz
and currents
ir1
,
ir2
on the primary
side. Figure 13a shows the fullload case. The primaryside fullbridge circuit is seen as
two halfbridge circuits. Two capacitors
C1
,
C2
share the midpoint, so the amplitudes of
two voltages
vxz
=
vyz
=
VH
/2 = 150 V/2 = 75 V. The current
ir1
is different from
ir2
due
to different transformer ratios of the two HF transformers
T1
,
T2
, and the RMS values of
resonant currents
ir1
,
ir2
are
Ir1,rms
= 2.84 A,
Ir2,rms
= 5.61 A. The theoretical RMS values are
Ir1,rms
= 2.96 A,
Ir2,rms
= 5.92 A. It can be seen that there is not much difference between the
theoretical and experimental results. Figure 13b–d provides the waveforms at 75%, 50%,
and 25% load. The amplitudes of the voltages remain.
Electronics 2023,12, 103 15 of 19
2μs 2μs
2μs 2μs
(a) (b)
(c) (d)
vg,MA
(10V/div)
vg,MB
(10V/div)
vg,MC
(10V/div)
vg,MD
(10V/div)
vg,MA
(10V/div)
vg,MB
(10V/div)
vg,MC
(10V/div)
vg,MD
(10V/div)
vg,MA
(10V/div)
vg,MB
(10V/div)
vg,MC
(10V/div)
vg,MD
(10V/div)
vg,MA
(10V/div)
vg,MB
(10V/div)
vg,MC
(10V/div)
vg,MD
(10V/div)
Figure 12.
Experimental gating signals
vg,MA∼vg,MD
at different power levels: (
a
) 200 W, (
b
) 150 W,
(c) 100 W, and (d) 50 W.
vxz(100V/div)
vyz(100V/div)
ir1(5A/div)
ir2(5A/div) 2μs
vxz(100V/div)
vyz(100V/div)
ir1(5A/div)
ir2(5A/div) 2μs
vxz(100V/div)
vyz(100V/div)
ir1(2A/div)
ir2(5A/div)
2μs
vxz(100V/div)
vyz(100V/div)
ir1(1A/div)
ir2(2A/div) 2μs
(a) (b)
(c) (d)
Figure 13.
Experimental midpoint voltages
vxz
,
vyz
and current results
ir1
,
ir2
at different power
levels: (a) 200 W, (b) 150 W, (c) 100 W, and (d) 50 W.
The RMS values of current
ir1
are 2.13 A, 1.38 A, and 0.73 A, and those of
ir2
are
4.28 A, 2.75 A, and 1.45 A, respectively, which also matches the theoretical values well.
Furthermore, it can be observed that the resonant currents are negative for
MA
and
MC
while positive for
MB
and
MD
at the turnon moment. That is to say, ZVS operation of
all the active switches is achieved at the four power conditions. Figure 14a–d show the
tested results of square voltage
vmn
, capacitor voltage
vCr
, and resonant current
ir
on the
secondary side when the output power ranges from 200 W to 50 W. The amplitudes of
Electronics 2023,12, 103 16 of 19
the secondary side voltage
vmn
are kept at 80 V under different load conditions. The RMS
values of resonant current
ir
at 100% to 25% rated power are 2.67 A, 2.03 A, 1.31 A, and
0.68 A, respectively. The results are almost the same as the theoretical results. The voltage
vmn
is in phase with the resonant current
ir
. The capacitor voltage
vCr
and resonant current
ir
are nearly sinusoidal, conﬁrming resonance operation. Figure 15a–d demonstrate the
gating signals and switch voltages of
MA
and
MB
under different loads. The gating signals
and switch voltages of
MC
and
MD
are not given due to having the same waveforms as
MA
and
MB
except for the phaseshift angle
α
. Load voltage is maintained at 80 V by increasing
the phase angle
α
when the loads are reduced. The operation performance with full ZVS
operation and circulation current minimization is realized. All experimental results match
the theory and simulation well. The efﬁciency of the DTRC at four power levels is shown
in Figure 16. The recorded efﬁciencies at 200 W, 150 W, 100 W, and 50 W are 94.02%, 95.36%,
96.16%, and 90.87%, respectively. Since ZVS operation is achieved and switching loss is
reduced, the overall efﬁciency of the DTRC exceeds 90%.
vmn(100V/div)
vCr(100V/div)
ir(2A/div) 2μs
vmn(100V/div)
vCr(50V/div)
ir(2A/div) 2μs
vmn(100V/div)
vCr(50V/div)
ir(1A/div) 2μs
vmn(100V/div)
vCr(50V/div)
ir(1A/div) 2μs
(a) (b)
(c) (d)
Figure 14.
Experimental square voltage
vmn
, capacitor voltage
vCr
, and resonant current
ir
at different
power levels: (a) 200 W, (b) 150 W, (c) 100 W, and (d) 50 W.
Electronics 2023,12, 103 17 of 19
2μs 2μs
2μs 2μs
(a) (b)
(c) (d)
vg,MA
(20V/div)
vd,MA(100V/div)
vg,MB
(20V/div)
vd,MB(100V/div)
vg,MA
(20V/div)
vd,MA(100V/div)
vg,MB
(20V/div)
vd,MB(100V/div)
vg,MA
(20V/div)
vd,MA(100V/div)
vg,MB
(20V/div)
vd,MB(100V/div)
vg,MA
(20V/div)
vd,MA(100V/div)
vg,MB
(20V/div)
vd,MB(100V/div)
Figure 15.
Experimental waveforms
vg,MA
,
vd,MA
,
vg,MB
, and
vd,MB
of
MA
and
MB
at different power
levels: (a) 200 W, (b) 150 W, (c) 100 W, and (d) 50 W.
100
90
80
70
60
50 50 100 150 200
Efficiency(%)
Output Power(W)
Figure 16. Measured efﬁciency under four load levels of DTRC.
The performance comparison between the proposed DTRC and some converters
mentioned in Section 1is given in Table 3. The degrees of freedom of [
14
] are more than
those of other converters, which causes control complexity. Moreover, the softswitching
conditions are not better than others’ because of the nonresonant structure. The topology of
the threephase twotank
LLC
converter [
18
] and the dualtransformer
LLC
converter [
24
]
both have two transformers, which is similar to the proposed DTRC. However, the cost is
higher due to more switches and inductors.
Electronics 2023,12, 103 18 of 19
Table 3. Comparison with other converters.
Topology Hybrid Dual
Active Bridge
Converter [14]
ThreePhase
TwoTanks LLC
Converter [18]
DualTransformer
LLC Converter [24]
Proposed Dual
Transformer
Resonant Converter
Voltage gain 0.25∼0.5 1∼2 1∼2 0.5∼1
Control variables 4 2 2 2
Number of MOSFETs 6 6 4 4
Number of diodes 0 4 4 4
Transformers 1 2 2 2
Modulation MPS PFM MPS SPS
Resonant components 0 4 2 2
Soft switching ZVS ZVS ZVS and ZCS ZVS and ZCS
Cost Medium High High Low
6. Conclusions
This paper proposes a new DualTransformer DCDC Resonant Converter that features
asymmetrical turns ratios of the HF transformers. By setting
k
as the ratio of two transform
ers, more freedom was provided to optimize the DTRC. Due to the features of the structure,
the converter can operate with low voltage stress and minimal backﬂow power without any
control strategy. Compared with the conventional softswitching PWM resonant converter,
the DTRC can widen the ZVS operation range and reduce the switching loss. Even at a very
light load, the DTRC can still keep all active switches working in ZVS operation. Naturally,
the backﬂow power on the output side is almost eliminated. Experimental measurements
validated the theoretical analysis and demonstrated the features of the proposed DTRC.
Author Contributions:
Conceptualization, S.H.; Methodology, Y.L. and S.H.; Software, R.W.; Valida
tion, C.S.; Formal analysis, Y.L.; Investigation, L.Z. and L.M.; Data curation, R.W.; Writing—original
draft, Y.L.; Writing—review and editing, S.H.; Visualization, C.S.; Supervision, X.L.; Funding acquisi
tion, S.H. All authors have read and agreed to the published version of the manuscript.
Funding:
This research was funded in part by the National Natural Science Foundation of China
under grant No. 62003057, in part by the FDCT under grant No. 0065/2019/A2, in part by the Natural
Science Foundation of Jiangsu Province under grant No. BK20191029, and in part by the Natural
Science Foundation of Jiangsu Higher Education Institutions of China under grant No. 19KJB470001.
Conﬂicts of Interest: The authors declare no conﬂict of interest.
References
1.
Wu, J.; Li, X.; Zhou, S.; Hu, S.; Chen, H. Constantcurrent, constantvoltage operation of a dualbridge resonant converter:
Modulation, design and experimental results. Appl. Sci. 2021,11, 12143. [CrossRef]
2.
Gunawardena, P.; Nayanasiri, D.; Hou, N.; Li, Y. A SoftSwitched CurrentFed DualInput Isolated DCDC Converter Topology.
IEEE Trans. Ind. Electron. 2022, 1–12.. [CrossRef]
3.
Hong, T.; Geng, Z.; Qi, K.; Zhao, X.; Ambrosio, J.; Gu, D. A wide range unidirectional isolated DCDC converter for fuel cell
electric vehicles. IEEE Trans. Ind. Electron. 2020,68, 5932–5943. [CrossRef]
4.
Hu, S.; Zhang, Y.F. and Li, X. A dualasymmetric PWM control strategy for full bridge DCDC converters. In Proceedings of the
2017 12th IEEE Conference on Industrial Electronics and Applications (ICIEA), Siem Reap, Cambodia, 18–20 June 2017; pp. 31–36.
5.
Hu, S.; Li, X. An unbalanced PWM control strategy for the fullbridge series resonant converter. In Proceedings of the 2019 14th
IEEE Conference on Industrial Electronics and Applications (ICIEA), Xi’an, China, 19–21 June 2019; pp. 2249–2253.
6.
Bu, Q.; Wen, H.; Shi, H.; Zhu, Y. A Comparative Review of HighFrequency Transient DC Bias Current Mitigation Strategies in
DualActiveBridge DCDC Converters Under PhaseShift Modulations. IEEE Trans. Ind. Appl. 2021,58, 2166–2182. [CrossRef]
7.
Hu, S.; Li, X.; Zheng, Q.F. A dualbridge DC–DC resonant converter using extended PWM and phaseshift control. IEEE Trans.
Ind. Appl. 2021,57, 4009–4020. [CrossRef]
8.
RodriguezRodriguez, J.R.; SalgadoHerrera, N.M.; TorresJimenez, J.; GonzalezCabrera, N.; GranadosLieberman, D.; Valtierra
Rodriguez, M. Smallsignal Model for Dualactivebridge Converter Considering Total Elimination of Reactive Current. J. Mod.
Power Syst. Clean Energy 2020,9, 450–458. [CrossRef]
9.
Shi, H.; Wen, H.; Hu, Y.; Jiang, L. Reactive power minimization in bidirectional DC–DC converters using a uniﬁedphasorbased
particle swarm optimization. IEEE Trans. Power Electron. 2018,33, 10990–11006. [CrossRef]
Electronics 2023,12, 103 19 of 19
10.
Guo, Z. Modulation scheme of dual active bridge converter for seamless transitions in multiworking modes compromising ZVS
and conduction loss. IEEE Trans. Ind. Electron. 2019,67, 7399–7409. [CrossRef]
11.
Carvalho, E.L.; Felipe, C.A.; Bellinaso, L.V.; de Oliveira Stein, C.M.; Cardoso, R.; Michels, L. AsymmetricalPWM DAB
converter with extended ZVS/ZCS range and reduced circulating current for ESS applications. IEEE Trans. Power Electron.
2021
,
36, 12990–13001. [CrossRef]
12.
Zhao, B.; Song, Q.; Liu, W.; Liu, G.; Zhao, Y. Universal highfrequencylink characterization and practical fundamentaloptimal
strategy for dualactivebridge DCDC converter under PWM plus phaseshift control. IEEE Trans. Power Electron.
2015
,
30, 6488–6494. [CrossRef]
13.
Choi, W.; Rho, K.M.; Cho, B.H. Fundamental duty modulation of dualactivebridge converter for widerange operation. IEEE
Trans. Power Electron. 2015,31, 4048–4064. [CrossRef]
14.
Mou, D.; Yuan, L.; Li, J.; Hou, N.; Li, J.; Li, Y.; Zhao, Z. Modeling and Analysis of Hybrid Dual Active Bridge Converter to
Optimize Efﬁciency over Whole Operating Range. IEEE J. Emerg. Sel. Top. Power Electron. 2022. [CrossRef]
15.
Xu, J.; Yang, J.; Xu, G.; Jiang, T.; Su, M.; Sun, Y.; Wang, H.; Zheng, M. PWM modulation and control strategy for LLCDCX
converter to achieve bidirectional power ﬂow in facing with resonant parameters variation. IEEE Access
2019
,7, 54693–54704.
[CrossRef]
16.
Zhang, J.; Liu, J.; Yang, J.; Zhao, N.; Wang, Y.; Zheng, T.Q. An LLCLC type bidirectional control strategy for an LLC resonant
converter in power electronic traction transformer. IEEE Trans. Ind. Electron. 2018,65, 8595–8604. [CrossRef]
17.
Shi, L.; Liu, B.; Duan, S. Burstmode and phaseshift hybrid control method of LLC converters for wide output range applications.
IEEE Trans. Ind. Electron. 2019,67, 1013–1023. [CrossRef]
18.
Salem, M.; Ramachandaramurthy, V.K.; Jusoh, A.; Padmanaban, S.; Kamarol, M.; Teh, J.; Ishak, D. Threephase series resonant
DCDC boost converter with double LLC resonant tanks and variable frequency control. IEEE Access
2020
,8, 22386–22399.
[CrossRef]
19.
Wei, Y.; Luo, Q.; Mantooth, A. Hybrid control strategy for LLC converter with reduced switching frequency range and circulating
current for holdup time operation. IEEE Trans. Power Electron. 2021,36, 8600–8606. [CrossRef]
20.
Shi, Z.; Tang, Y.; Guo, Y.; Li, X.; Sun, H. Optimal Design Method of LLC Halfbridge Resonant Converter Considering Backﬂow
Power Analysis. IEEE Trans. Ind. Electron. 2021,69, 3599–3608. [CrossRef]
21.
Lin, J.Y.; Yueh, H.Y.; Lin, Y.F.; Liu, P.H. VariableFrequency and PhaseShift with Synchronous Rectiﬁcation Advance OnTime
Hybrid Control of LLC Resonant Converter for Electric Vehicles Charger. IEEE J. Emerg. Sel. Top. Ind. Electron. 2022. [CrossRef]
22.
Yeon, C.O.; Kim, J.W.; Park, M.H.; Lee, I.O.; Moon, G.W. Improving the lightload regulation capability of LLC series resonant
converter using impedance analysis. IEEE Trans. Power Electron. 2016,32, 7056–7067. [CrossRef]
23.
Wei, Y.; Luo, Q.; Du, X.; Altin, N.; Nasiri, A.; Alonso, J.M. A dual halfbridge LLC resonant converter with magnetic control for
battery charger application. IEEE Trans. Power Electron. 2019,35, 2196–2207. [CrossRef]
24.
Khan, S.; Sha, D.; Jia, X.; Wang, S. Resonant LLC DC–DC converter employing ﬁxed switching frequency based on dual
transformer with wide inputvoltage range. IEEE Trans. Power Electron. 2020,36, 607–616. [CrossRef]
25.
Wu, H.; Chen, L.; Xing, Y.; Xiao, X.; Xu, P. Twotransformerbased fullbridge softswitching DC–DC converter with improved
characteristics. IET Power Electron. 2015,8, 2537–2545. [CrossRef]
26.
Wu, H.; Sun, K.; Liu, T.; Xing, Y. Isolated BuckBoost converters with ACTLR and dualtransformer structure for wide output
voltage range applications. IET Power Electron. 2019,12, 184–194. [CrossRef]
27.
Ning, G.; Chen, W.; Shu, L.; Qu, X. A hybrid ZVZCS dualtransformerbased fullbridge converter operating in DCM for MVDC
grids. IEEE Trans. Power Electron. 2016,32, 5162–5170. [CrossRef]
28.
Xu, G.; Sha, D.; Xu, Y.; Liao, X. Dualtransformerbased DAB converter with wide ZVS range for wide voltage conversion gain
application. IEEE Trans. Ind. Electron. 2017,65, 3306–3316. [CrossRef]
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