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An Overview of Different Approaches for Ternary Reversible Logic Circuits Synthesis Using Ternary Reversible Gates with Special Reference to Virtual Reality
Abstract
Quantum computing has been projected as an alternative to classical computing and promises to offer feasible solutions to problems that are considered intractable today. It has also been observed that information storage, processing, and communication can be improved to a great extent by the use of quantum mechanical effects like non-classical correlation and superposition of states. In a reversible circuit, we have a cascade of reversible gates each of which carry out some bijective mapping between inputs and outputs. They are also structurally different from conventional circuits in the sense that fanout and feedback connections are not permitted. In a binary quantum system expressed as a quantum circuit, the number of circuit lines represent the basic unit of information being processed (called quantum bits or qubits). Specifically, qutrit is the unit of information for a three-valued quantum system and is represented in one of the states such as , , and . As we know, qutrits are very much expensive resources in the synthesis process, and thus reducing the number of qutrits plays a major role during synthesis. The idea behind this work is to make the early researchers in this specific area to get a comprehensive understanding of ternary reversible logic synthesis. Hence, this work addresses the different ternary reversible logic synthesis approaches and thus allow the researchers to gain more knowledge about the process of ternary reversible logic synthesis in an efficient manner and also gives an insight of how quantum computing can be further explored in the broad area of augmented reality and virtual reality.
... Rani and Lyngton Thangkhiew [2] present an overview of different approaches for ternary reversible logic circuits synthesis using ternary reversible gates, with special reference to virtual reality applications. The study discusses various techniques for synthesizing ternary reversible logic circuits and evaluates their suitability for emerging technologies, such as virtual reality. ...
... Rani and Lyngton Thangkhiew [2] present an overview of different approaches for ternary reversible logic circuits synthesis using ternary reversible gates, with special reference to virtual reality applications. The study discusses various techniques for synthesizing ternary reversible logic circuits and evaluates their suitability for emerging technologies, such as virtual reality. ...
Background: The traditional binary logic gates operate on a binary system with inputs and outputs taking values of 0 and 1. In this paper, we explore the concept of logic gates using a ternary base, where inputs and outputs can take values of -1, 0, and 1. Objectives: Our study aims to demonstrate the implementation and functionality of basic logic gates such as OR gate, AND gate, NAND gate, NOT gate, buffer gate, NOR gate, XOR gate, and XNOR gate using a ternary base. We also extend our exploration to include 2-input and 3-input logic gates. Methods: We utilize mathematical modeling and logical analysis to design and analyze the behavior of ternary logic gates. Results: Through theoretical derivations and practical simulations, we showcase the operation and effectiveness of ternary logic gates, highlighting their advantages and potential applications. Conclusions: Ternary logic gates offer an alternative approach to traditional binary logic gates, providing flexibility in representing and processing information. Our research expands the understanding and utilization of ternary logic in digital systems.
... Rani and Lyngton Thangkhiew [2] present an overview of different approaches for ternary reversible logic circuits synthesis using ternary reversible gates, with special reference to virtual reality applications. The study discusses various techniques for synthesizing ternary reversible logic circuits and evaluates their suitability for emerging technologies, such as virtual reality. ...
Background: The traditional binary logic gates operate on a binary system with inputs and outputs taking values of 0 and 1. In this paper, we explore the concept of logic gates using a ternary base, where inputs and outputs can take values of -1, 0, and 1. Objectives: Our study aims to demonstrate the implementation and functionality of basic logic gates such as OR gate, AND gate, NAND gate, NOT gate, buffer gate, NOR gate, XOR gate, and XNOR gate using a ternary base. We also extend our exploration to include 2-input and 3-input logic gates. Methods: We utilize mathematical modeling and logical analysis to design and analyze the behavior of ternary logic gates. Results: Through theoretical derivations and practical simulations, we showcase the operation and effectiveness of ternary logic gates, highlighting their advantages and potential applications. Conclusions: Ternary logic gates offer an alternative approach to traditional binary logic gates, providing flexibility in representing and processing information. Our research expands the understanding and utilization of ternary logic in digital systems.
... Moreover, it exhibits a lower interconnection complexity [17] and a lower power consumption, and it is more error tolerant for quantum computations [18,19]. Even though ternary logic is one of the most successful types of multiple-valued logic and many important works in this field [19][20][21][22][23][24][25][26][27][28][29][30], a limitation is that conventional binary logic functions cannot be easily represented in ternary logic. In quaternary logic, two bits can be grouped into quaternary values to express binary logic functions [31]. ...
Information loss is generally related to power consumption. Therefore, reducing information loss is an interesting challenge in designing digital systems. Quaternary reversible circuits have received significant attention due to their low-power design applications and attractive advantages over binary reversible logic. Multiplexer and demultiplexer circuits are crucial parts of computing circuits in ALU, and their efficient design can significantly affect the processors’ performance. A new scalable realization of quaternary reversible 4×1 multiplexer and 1×4 demultiplexer, based on quaternary 1-qudit Shift, 2-qudit Controlled Feynman, and 2-qudit Muthukrishnan-Stroud gates, is presented in this paper. Moreover, the corresponding generalized quaternary reversible
n
×1 multiplexer and 1×
n
demultiplexer circuits are proposed. The comparison, with respect to the current literature, shows that the proposed circuits are more efficient in terms of quantum cost, the number of garbage outputs, and the number of constant inputs.
... Any combinational logic circuit can be implemented in a binary system using multiplexers and basic logic gates, which is also true for ternary logic [53]. Many quantum ternary circuits implementation for different types of computational units of quantum systems, including full adder, half adder, parallel adder/subtractor, subtractor, multiplier, decoder, encoder, demultiplexer, and multiplexer, can be found in the literature [20][21][22][23][24][25][26][27][28][29][30][31]57]. Decoder, multiplexer, and demultiplexer circuits are major sub-circuits needed for constructing ternary quantum oracles and ternary system designs such as communication systems, computer memory, and arithmetic logic unit [54]. ...
Designing conventional circuits present many challenges, including minimizing internal power dissipation. An approach to overcoming this problem is utilizing quantum technology, which has attracted significant attention as an alternative to Nanoscale CMOS technology. The reduction of energy dissipation makes quantum circuits an up-and-coming emerging technology. Ternary logic can potentially diminish the quantum circuit width, which is currently a limitation in quantum technologies. Using qutrit instead of qubit could play an essential role in the future of quantum computing. First, we propose two approaches for quantum ternary decoder circuit in this context. Then, we propose a quantum ternary multiplexer and quantum ternary demultiplexer to exploit the constructed quantum ternary decoder circuit. Techniques to achieve lower quantum cost are of importance. We considered two types of circuits, one in which the output states are always restored to the initial input states and the other in which the states of the output are irrelevant. We compare the proposed quantum ternary circuits with their existing counterparts and present the improvements. It is possible to realize the proposed designs using macro-level ternary gates that are based on the ion-trap realizable ternary 2-qutrit Muthukrishnan–Stroud and 1-qutrit permutation gates.
Quantum computers are expected to offer an
effect similar to the influence of the early integrated circuit
computers. According to current systems, it is predicted that
they will play an effective role in the emergence of a stronger
technology with an increasing speed. Some high-tech companies
have quantum computer designs that they actively put into use
from the research and development phase to the problemsolving
phase and these computers use different architectures.
Unlike the others, IBM launched a cloud-based software
infrastructure in 2016 and first introduced its 5-qubit quantum
computer, which consists of sequential quantum ports
architecture, to the use of researchers and interested parties via
its web servers. Programming is done by using quantum gates
via a web interface called quantum composer. Significant
progress has also been made in virtual reality technologies and
virtual reality based browser platforms have been developed. In
this paper, studies on the using and training of the IBM
quantum composer platform through a browser designed on the
basis of virtual reality are presented.
Multi-valued quantum operations have several advantages over binary operators. They decrease the number of essential data sending lines dramatically, which reduces the internal connections and thus can improve the circuit efficiency. In this paper, new reversible quaternary flip-flops are proposed which decrease the number of internal connectors and complexity of the circuits. So, the speed of circuits is increased. The implementation of synchronous sequential circuits requires memory elements. The proposed flip-flops need solely one memory element.
Ternary logic has some distinct advantage over binary logic. In this paper we propose a synthesis approach for ternary reversible circuits using ternary reversible gates. Our method takes a boolean function as input. The input is provided as .pla file. The .pla file is first converted into ternary logic function, which can be represented as permutation. The gate library used for synthesis is Ternary Not, Ternary Toffoli and Ternary Toffoli+ (NT ,TT ,TT +). The proposed constructive method, generates 3-cycles from the permutation, and then each 3-cycle is mapped to (NT ,TT ,TT +) gate library. Experimental results show that the method generates lesser number of gates for some circuits compared to previously reported works.
Ternary quantum circuits play a significant role in future quantum computing technology because they have many advantages over binary quantum circuits. Subtraction is considered as being one of the key arithmetic operations; hence, subtractors are very essential for the construction of various computational units of quantum computers and other complex computational systems. In this paper, we have proposed the realization of a quantum reversible ternary half-subtractor circuit using a generalized ternary gate, a ternary Toffoli gate, and a ternary C²NOT gate. Based on the realization of the ternary half-subtractor, we proposed the realization of a ternary full-subtractor.
This paper presents the algorithm for the function minimization of multivalued i.e. radix >2 digital system. The ternary digital system which radix=3 is considered here for the demonstration of proposed algorithm and computer program is developed based on algorithm in the form of ternary map. As the radix of system increases, the difficulties in the minimization or reduction of logic function is get increases. It becomes difficult to for higher radix to reduce the function design equation. The proposed program is developed for the ternary system function minimization. It incorporates all designed rules for ternary logic system design and gives the output in the form of Sum-of-Product (SOP) terms. There are different rules for the minimization of ternary logic based digital system that are different from the conventional binary digital system. Output equation of ternary digital system is in the form of F = F2 + 1. (F1) Where, F2 = 2's minterms and F1 = 1's minterms. The results are verified for ternary full adder and subtractor are tested on program and compared with truth table for ternary full adder and subtractor and obtained results are found to be accurate.
Typical methods of quantum/reversible synthesis are based on using the binary character of quantum computing. However, multi-valued logic is a promising choice for future computer technologies, given a set of advantages when comparing to binary circuits. In this work, we have developed a genetic algorithm-based synthesis of ternary reversible circuits using Muthukrishnan-Stroud gates. The method for chromosomes coding that we present, as well as a judicious choice of algorithm parameters, allowed obtaining circuits for half-adder and full adder which are better than other published methods in terms of cost, delay times and amount of input ancillary bits. A structure of the circuits is analyzed in details, based on their decomposition.
Ternary Galois Field Sum of Products (TGFSOP) expressions are found to be a good choice for ternary reversible logic and particularly for quantum cascaded realization of ternary functions. In this paper, we propose 5 ternary shift operations and various basic and composite ternary literals for defining TGFSOP expression. We propose 16 Ternary Galois Field Expansions (TGFE) using these literals and three new types of Ternary Galois Field Decision Diagrams (TGFDD) using the proposed expansions, which are useful for reversible and quantum logic design. We also propose a heuristic for creating optimal Kronecker TGFDD and methods for flattening the TGFDDs for determining near-minimum TGFSOP expressions. Besides, we propose quantum realizations for the 5 ternary Shift gates and a ternary swap gate. We also propose a new generalization of ternary Toffoli gates with their implementation from truly realizable 2-qudit quantum primitives. Further, we propose a method of synthesizing multi-output TGFSOP using cascade of ternary Shift gates, Swap gate, and generalized Toffoli gate. Finally, we present experimental results to show the complexity of the decision diagrams, the resultant TGFSOP expressions, and the new quantum cascade for some ternary benchmark functions.
This paper reviews basic aspects of reversible and quantum computing in the context of ternary systems. Ternary extensions of the Pauli matrices are presented and interactions with the Vilenkin-Chrestenson matrix are disclosed. The realization of extended ternary Toffoli gates under the Barenco et al. type of structure is shown not to be possible without ancillary lines, meanwhile a Sasanian-Wang-Perkowski type of structure leads to a five elementary gates realization. The presence of entanglement in ternary quantum computing is addressed and illustrated with an example.
Quantum technology is one of the most promising technologies for future computing systems, since quantum algorithms solve problems much more efficiently than classical algorithms. All quantum algorithms are made up of quantum logic circuits. A quantum logic circuit is made up of quantum gates (reversible in nature) and is designed using reversible logic synthesis methods. For a given Hilbert space, ternary quantum system requires 0.63 times qutrits than the corresponding number of qubits. Thus, the ternary quantum system provides a much more compact and efficient information encoding. Beside other technologies, ternary quantum logic system can be realized using photon polarization. These advantages of ternary quantum system open avenue for developing ternary quantum algorithms. Galois field sum of products (GFSOP) based synthesis of ternary quantum logic circuit is the most practical approach, since any ternary logic function with many inputs can be represented as GFSOP expression and the GFSOP expression can be implemented as cascade of ternary quantum gates. Here we discuss minimization of ternary logic function as GFSOP expression using quantuminspired evolutionary algorithm. We also discuss a method of realization of ternary GFSOP expression using ternary quantum gates. Experimental results are given to show the effectiveness of the ternary GFSOP minimization technique.
Multi-valued quantum circuits are the new generation of quantum circuits and they have some advantages over their binary counterparts. Ternary logic is the simplest type of multi-valued logic and it is more applicable than the other types of multi-valued logic. Comparators are widely used in search conditions, such as tree-based searches. In this paper, we design an n-qutrit comparator for quantum computing. The proposed comparator has less constant input and less quantum cost. To design a new comparator, we used quantum versions of ternary 1-qutrit permutation gates, 3-qubit Toffoli gates, Muthkrishnan-Stroud gates and lower quantum cost ternary full adders. The quantum gates used here can be realized using a liquid ion trap. In this work, we used ternary full adders to subtract two n-qutrit and then end full adder carry out and SUM output of all full adders has been used to compare the ternary numbers. The main output of the proposed circuit is f. Thus, the single circuit has been designed to discover the operation less-than, equal and greater-than, leading to low quantum cost and low ancilla qutrits. All of the scales are in the nanometric area.
Ternary quantum circuits have recently been introduced to realize ternary logic functions. In this paper realizations of ternary half-and full-adder circuits using generalized ternary gates (GTG) are proposed, which are more efficient than the previously published realizations.
Reversible / Quantum circuits are believed to be one of the future computer technologies. In this paper, a Genetic Algorithm (GA) based synthesis of ternary reversible / quantum circuits using Muthukrishnan-Stroud gates is presented. The circuit generated by GA may contain redundant gates. We have used post GA reduction to eliminate these redundant gates. We have experimented with ternary half-adder circuit. The proposed GA converges for many combinations of crossover and mutation.. Index Terms — Reversible logic, half-adder, quantum circuit, post GA reduction..
Multiple-valued logic functions having many input variables can be easily expressed as Galois field sum of products (GFSOP) expression and can be realized using cascade of multiple-valued Feynman and Toffoli gates (Khan et al., 2005). Conventional binary functions can be expressed very easily as quaternary functions by grouping 2-bits together. These quaternary functions can be expressed as quaternary Galois field sum of products expression and can be implemented as cascade of quaternary Feynman and Toffoli gates. These gates are macro-level gates and need to be realized using technology based primitive gates. In this paper, we show the realization of quaternary Feynman and Toffoli gates on the top of theoretically liquid ion-trap realizable 1-qudit and 2-qudit Muthukrishnan-Stroud gates (Muthukrishnan, 2000).
Reversible/quantum circuits are believed to be one of the future computer technologies. In this paper, a genetic algorithm (GA) based synthesis of ternary reversible/quantum circuits using Muthukrishnan-Stroud gates is presented. The circuit generated by GA may contain redundant gates. We have used post GA reduction to eliminate these redundant gates. We have experimented with ternary half-adder circuit. The proposed GA converges for many combinations of crossover and mutation.
Synthesis of ternary quantum circuits involves basic ternary gates and logic operations in the ternary quantum domain. Works that define ternary algebra and their applications for ternary quantum logic realization, are very few. In this paper, we express a ternary logic function in terms of projection operations including a new one. We demonstrate how to realize a few new multi-qutrit ternary gates in terms of generalized ternary gates and projection operations. We then employ our synthesis method to design ternary adder circuits which have better cost than that obtained by earlier method.
Multiple-valued quantum circuits are a promising choice for future quantum computing technology since they have several advantages over binary quantum circuits. Binary parallel adder/subtractor is central to the ALU of a classical computer and its quantum counterpart is used in oracles – the most important part that is designed for quantum algorithms. Many NP-hard problems can be solved more efficiently in quantum using Grover algorithm and its modifications when an appropriate oracle is constructed. There is therefore a need to design standard logic blocks to be used in oracles – this is similar to designing standard building blocks for classical computers. In this paper, we propose quantum realization of a ternary full-adder using macro-level ternary Feynman and Toffoli gates built on the top of ion-trap realizable ternary 1-qutrit and Muthukrishnan–Stroud gates. Our realization has several advantages over the previously reported realization. Based on this realization of ternary full-adder we propose realization of a ternary parallel adder with partially-look-ahead carry. We also show the method of using the same circuit as a ternary parallel adder/subtractor.
Galois Field Sum of Products (GFSOP) leads to efficient multi-valued reversible circuit synthesis using quantum gates. In this paper, we propose a new generalization of ternary Toffoli gate and another new generalized reversible ternary gale with discussion of their quantum realizations. Algorithms for synthesizing ternary GFSOP using quantum cascades of these gates are proposed In both the synthesis methods, 5 ternary shift operators and ternary swap gate are used We also propose quantum realizations of 5 ternary shift operators and ternary swap gate. In the cascades of the new ternary gates, local mirrors, variable ordering, and product ordering techniques are used to reduce the circuit cost. Experimental results show that the cascade of the new ternary gates is more efficient than the cascade of ternary Toffoli gates.
Multiple-valued Feynman and Toffoli gates are used in GFSOP based synthesis of quantum logic circuits. These gates are macro-level gates and need to be realized using technology dependent primitive gates. In this paper, we present ancilla input free architectures for realization of d-valued (d>=3 ) Feynman and n-qudit (n>=3 ) Toffoli gates on the top of liquid ion-trap realizable Muthukrishnan-Stroud gates. The proposed architectures can be used for any d if GF(d) can be constructed. We show realization examples of ternary, quaternary, and quinary Feynman gates, and 3 and 4-qudit Toffoli gates. The present realizations require either less or equal primitive gates than the previously reported realizations. Moreover, in contrast to the earlier realizations, the present Toffoli gate realizations do not require any ancilla input, which reduce the register width of a synthesized quantum logic circuit.
The paper discusses the evolutionary computation approach to the problem of optimal synthesis of Quantum and Reversible Logic circuits. Our approach uses standard Genetic Algorithm (GA) and its relative power as compared to previous approaches comes from the encoding and the formulation of the cost and fitness functions for quantum circuits synthesis. We analyze new operators and their role in synthesis and optimization processes. Cost and fitness functions for Reversible Circuit synthesis are introduced as well as local optimizing transformations. It is also shown that our approach can be used alternatively for synthesis of either reversible or quantum circuits without a major change in the algorithm. Results are illustrated on synthesized Margolus, Toffoli, Fredkin and other gates and Entanglement Circuits. This is for the first time that several variants of these gates have been automatically synthesized from quantum primitives.
In this paper, we show realization of macro- level ternary reversible 2-qudit Feynman gate, 3-qudit controlled Feynman gate, and 3-qudit Toffoli gates using ternary reversible 1-qudit gates and 2-qudit Muthukrishnan-Stroud gates, which are theoretically realizable using quantum technology such as liquid ion trap (10). Then we show the design of ternary reversible multiplexer and demultiplexer using the macro-level gates.
Ternary quantum circuits have recently been introduced to help reduce the size of multi-valued logic for multi-level quantum computing systems. However, synthesizing these quantum circuits is not easy. We describe a new genetic algorithm based synthesizer for ternary quantum circuits. Our results show some of the synthesized circuits use fewer gates than previously published methods.
The idea of S/D trees for binary logic is a general concept that found its main application in ESOP minimization and the generation of new diagrams and canonical forms. S/D trees demonstrated their power by generating forms that include a minimum Galois-Field-Sum-of-Products (GFSOP) circuits for binary and ternary radices. Galois field of quaternary radix has some interesting properties. An extension of the S/D trees to GF(4) is presented here. A general formula to calculate the number of inclusive forms (IFs) per variable order for an arbitrary Galois field radix and arbitrary number of variables is derived. A new fast method to count the number of IFs for an arbitrary Galois field radix and functions of two variables is introduced; the IFn,2 Triangles. This research is useful to create an efficient GFSOP minimizer for reversible logic
This paper proposes a novel evolutionary algorithm inspired by quantum computing, called a quantum-inspired evolutionary algorithm (QEA), which is based on the concept and principles of quantum computing, such as a quantum bit and superposition of states. Like other evolutionary algorithms, QEA is also characterized by the representation of the individual, evaluation function, and population dynamics. However, instead of binary, numeric, or symbolic representation, QEA uses a Q-bit, defined as the smallest unit of information, for the probabilistic representation and a Q-bit individual as a string of Q-bits. A Q-gate is introduced as a variation operator to drive the individuals toward better solutions. To demonstrate its effectiveness and applicability, experiments were carried out on the knapsack problem, which is a well-known combinatorial optimization problem. The results show that QEA performs well, even with a small population, without premature convergence as compared to the conventional genetic algorithm.
This paper investigates the synthesis of quantum networks built to realize ternary switching circuits in the absence of ancilla bits. The results we established are twofold. The first shows that ternary Swap, ternary Not and ternary Toffoli gates are universal for the realization of arbitrary ternary quantum switching networks without ancilla bits. The second result proves that all quantum ternary networks can be generated by Not, Controlled-Not, Multiply-Two, and Toffoli gates. Our approach is constructive. key words: ternary quantum logic synthesis, quantum circuit optimization, group theory. Comment: 10 pages, Latex. in press, J. Phys. A: Math. Gen. (2005)
Quantum computing is a fundamentally different way of performing computation than classical computing. Many problems that are considered hard for classical computers may have efficient solutions using quantum computers. Recently, technology companies including IBM, Microsoft, and Google have invested in developing both quantum computing hardware and software to explore the potential of quantum computing. Because of the radical shift in computing paradigms that quantum represents, we see an opportunity to study the unique needs people have when interacting with quantum systems, what we call Quantum HCI (QHCI). Based on interviews with experts in quantum computing, we identify four areas in which HCI researchers can contribute to the field of quantum computing. These areas include understanding current and future quantum users, tools for programming and debugging quantum algorithms, visualizations of quantum states, and educational materials to train the first generation of "quantum native" programmers.
The reducing of the width of quantum reversible circuits makes multiple-valued reversible logic a very promising research area. Ternary logic is one of the most popular types of multiple-valued reversible logic, along with the Subtractor, which is among the major components of the ALU of a classical computer and complex hardware. In this paper the authors will be presenting an improved design of a ternary reversible half subtractor circuit. The authors shall compare the improved design with the existing designs and shall highlight the improvements made after which the authors will propose a new ternary reversible full subtractor circuit. Ternary Shift gates and ternary Muthukrishnan-Stroud gates were used to build such newly designed complex circuits and it is believed that the proposed designs can be used in ternary quantum computers. The minimization of the number of constant inputs and garbage outputs, hardware complexity, quantum cost and delay time is an important issue in reversible logic design. In this study a significant improvement as compared to the existing designs has been achieved in as such that with the reduction in the number of ternary shift and Muthukrishnan-Stroud gates used the authors have produced ternary subtractor circuits.
In this paper an evolutionary technique for synthesizing Multi-Valued Logic (MVL) functions using Neural Network Deployment Algorithm (NNDA) is presented. The algorithm is combined with back-propagation learning capability and neural MVL operators. This research article is done to observe the anomalistic characteristics of MVL neural operators and their role in synthesis.
The advantages of NNDA-MVL algorithm is demonstrated with realization of synthesized many valued functions with lesser MVL operators. The characteristic feature set consists of MVL gate count, network link count, network propagation delay and accuracy achieved in training. In brief, this paper depicts an effort of reduced network size for synthesized MVL functions. Trained MVL operators improve the basic architecture by reducing MIN gate and interlink connection by 52.94% and 23.38% respectively.
Ternary logic synthesis has a significant role to realize multi-input ternary logic functions. Balanced ternary logic that contains three states as -1, 0 and 1 has substantial advantage over standard ternary logic containing the logic states as 0, 1 and 2. The paper addresses the synthesis of balanced ternary reversible logic circuit and design of reversible half-adder and full-adder circuit by using balanced ternary reversible logic gates. We also introduce balanced ternary multiplier gate that is used to design of single trit and multi-trit multiplier circuit. Hardware complexity of each circuit is investigated.
low-power CMOS design, quantum computation [8][10] and optical computing. An r-valued m-variable reversible logic function maps each of the r, input patters to a unique output pattern. The synthesis problem is to realize a reversible function by a cascade of primitive reversible gates. In this paper, we present a simple heuristic algorithm that exploits the bidirectional synthesis possibility inherent in the reversibility of the specification. The primitive reversible gates considered here are one possible extension of the well-known binary Toffoli gates. We present exhaustive results for the 9! 2-variable 3-valued reversible functions comparing the results of our algorithm to optimal results found by breadth-first search. The approach can be applied to general m-variable, r-valued reversible specifications. Further, we show how the presented technique can be applied to irreversible specifications. The synthesis of a 3-input, 3-valued adder is given as a specific case.
Part I. Fundamental Concepts: 1. Introduction and overview; 2.
Introduction to quantum mechanics; 3. Introduction to computer science;
Part II. Quantum Computation: 4. Quantum circuits; 5. The quantum
Fourier transform and its application; 6. Quantum search algorithms; 7.
Quantum computers: physical realization; Part III. Quantum Information:
8. Quantum noise and quantum operations; 9. Distance measures for
quantum information; 10. Quantum error-correction; 11. Entropy and
information; 12. Quantum information theory; Appendices; References;
Index.
An r-valued m-variable reversible logic function maps each of the rm input patterns to a unique output pattern. The synthesis problem is to realize a reversible function by a cascade of primitive reversible gates. In this paper, we present a simple heuristic algorithm that exploits the bidirectional synthesis possibility inherent in the reversibility of the specification. The primitive reversible gates considered here are one possible extension of the well-known binary Toffoli gates. We present exhaustive results for the 9! 2-variable 3-valued reversible functions, comparing the results of our algorithm to optimal results found by breadth-first search. The approach can be applied to general m-variable, r-valued reversible specifications. Further, we show how the presented technique can be applied to irreversible specifications. The synthesis of a 3-input, 3-valued adder is given as a specific case.
TDD graph-based representation is actually a natural extension of the binary decision diagram (BDD) to the three-valued case. This paper describes a method of defining, analyzing, and implementing the Boolean function using a ternary decision diagram (TDD). This diagram representation enables us to evaluate a Boolean function. We investigate the characteristics of different types of TDDs in order to develop an efficient general software package associated with efficient manipulation algorithms that leads to simpler Boolean functions. We define and discuss the data structure and reduction algorithms of the developed package. The performance of this software package is finally demonstrated by subjecting practical circuits, LGSynth93 standard benchmarks, to it.
This paper surveys seven types of TDDs: General TDD, SOP TDD, ESOP TDD, AND TDD, prime TDD, EXOR TDD, and Kleene TDD. We give new definitions for SOP TDDs and ESOP TDDs and introduce unifying terminology. After showing some theoremsoncomplexities, we compare the sizes of these TDDs using benchmark functions. Finally, we review important works on TDDs.
An efficient synthesis method for ternary reversible logic
- S B Mandal
- A Chakrabarti
- S S Kolay
- A K Choudhury
Designing new ternary reversible subtractor circuits. Microprocessors and Microsystems-Embedded Hardware Design
- A T Monfared
- M Haghparast
- AT Monfared