Coherent synthesis of ultrashort pulse fiber laser based on balanced difference method

Abstract

The output power of the fiber laser can be increased by synthesizing the output beam, but the problem of low output power is caused by the poor ability of controlling bandwidth in the current synthesis research. Therefore, a coherent synthesis method of ultrashort pulse fiber laser based on balanced difference method is proposed. The balance difference of fiber combiner is divided into different modules, including data exchange and acquisition, circuit balancing, phase compensation, etc. Select appropriate ad conversion chip, use Ethernet chip W5300, design data exchange, ensure the normal use of data acquisition function, in the signal preprocessing module, use band-pass filter to filter out unnecessary frequency components, use AD603 to design front-end balancing circuit, design signal separation circuit, separate AC and DC signals, use active phase lock. The phase compensation of each laser is realized by the fixed technology, and the coherent synthesis of ultrashort pulse fiber laser is realized by the fiber combiner. The experimental results show that, compared with the traditional coherent synthesis method, the output power of the coherent combination method based on balanced difference method is about 900 kW, which has higher output power and better control bandwidth. It provides a theoretical basis for practical application.

Full text

Li, F.: Coherent Synthesis of Ultrashort Pulse Fiber Laser Based on …
THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034 4027
COHERENT SYNTHESIS OF ULTRASHORT PULSE FIBER LASER
BASED ON BALANCED DIFFERENCE METHOD
by
Fangju LI
*
School of Physics and Electrical Engineering, Weinan Normal University, Weinan, China
Original scientific paper
https://doi.org/10.2298/TSCI2106027L
The output power of the fiber laser can be increased by synthesizing the output
beam, but the problem of low output power is caused by the poor ability of con-
trolling bandwidth in the current synthesis research. Therefore, a coherent syn-
thesis method of ultrashort pulse fiber laser based on balanced difference method
is proposed. The balance difference of fiber combiner is divided into different
modules, including data exchange and acquisition, circuit balancing, phase com-
pensation, etc. Select appropriate ad conversion chip, use Ethernet chip W5300,
design data exchange, ensure the normal use of data acquisition function, in the
signal preprocessing module, use band-pass filter to filter out unnecessary fre-
quency components, use AD603 to design front-end balancing circuit, design sig-
nal separation circuit, separate AC and DC signals, use active phase lock. The
phase compensation of each laser is realized by the fixed technology, and the co-
herent synthesis of ultrashort pulse fiber laser is realized by the fiber combiner.
The experimental results show that, compared with the traditional coherent syn-
thesis method, the output power of the coherent combination method based on
balanced difference method is about 900 kW, which has higher output power and
better control bandwidth. It provides a theoretical basis for practical application.
Key words: balanced difference method, pulse, fiber laser, coherent synthesis
Introduction
Coherent synthesis technology of fiber laser or amplifier array is a research hotspot
in the field of optoelectronic technology. It provides an effective way to obtain high power
and high beam quality laser output, and will be an important research direction in the field of
high-energy laser in the future [1]. Because of the small coupling area and the limited pump
power, the output power of ordinary fiber laser is very low, which is usually in milliwatt level.
With the development of cladding pumping technology, the output power of fiber laser has
been greatly improved, which has reached kilowatt level [2]. With the further development of
science and technology, it is expected to make a higher power fiber laser.
The key to the coherent synthesis of ultrashort pulse fiber laser is to correct the
phase error between the coherent beams and realize the phase locking. The multi port output
active phase-locked coherent synthesis based on the main oscillating power amplifier struc-
_____________
*
Author’s e-mail: juzi8366@126.com

Li, F.: Coherent Synthesis of Ultrashort Pulse Fiber Laser Based on …
4028 THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034
ture is one of the best schemes of high-power beam synthesis. The heterodyne method inter-
feres the N-path collimated beam with the reference light after frequency shift. The hetero-
dyne information detected by N photodetectors is used to control n-phase modulators to com-
pensate the phase error. In [3], the coherent combination method of pulsed fiber laser is stud-
ied. Based on the injection locked stimulated emission of diode, the comb frequency mode is
allowed to sprout with enough power amplification, but the original comb frequency stability
is not lost. In [4], a multichannel optical frequency synthesizer is proposed, which can directly
generate a very stable CW laser from the optical comb of an erbium-doped fiber oscillator. It
can provide stable optical frequency. The principle is relatively simple, but the module is
relatively complex and the optical path adjustment is difficult.
At present, the ability of the coherent synthesis method of ultrashort pulse fiber laser
to control the bandwidth is poor, resulting in the low output power of the far-field spot. There-
fore, the balanced difference method is used to process the optical signal, improve the anti-
interference of the signal, and make the coherent synthesis method of ultrashort pulse fiber
laser have the ability of normal bandwidth control.
Coherent synthesis of ultrashort pulse fiber laser
Photoelectric signal acquisition function design
The preprocessing based on balanced dif-
ference method includes signal preprocessing
module and data acquisition module, as shown
in fig. 1.
The whole signal processing part can be
divided into two parts: signal preprocessing and
data acquisition. The signal preprocessing is
mainly realized by analog signal processing
mode [5], including low-pass filter, measure-
ment amplifier, programmable amplifier, add
and subtract arithmetic, and band-pass filter.
The digital signal processing mode selected by
data acquisition circuit is mainly composed of
data acquisition chip, signal input/output buffer,
reset circuit, serial communication interface, etc.
Design of data acquisition chip
The AD conversion module is the core of
data acquisition chip, which has a great impact
on the overall performance. At present, there are
many kinds of AD conversion methods with
different performances, mainly including the
following types: double oblique integration,
successive approximation, and lightning type
AD conversion. Among them, the lightning AD conversion mode has the fastest speed and the
most expensive price, but the lightning AD conversion mode usually has low accuracy and
resolution, so it is not suitable to be used in the high accuracy sampling module [6]. The dou-
ble oblique integral type has high accuracy and low price, but its speed is slow and it is diffi-
Figure 1. Signal acquisition and processing flow

Li, F.: Coherent Synthesis of Ultrashort Pulse Fiber Laser Based on …
THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034 4029
cult to meet the requirements. The successive ap-
proximation type has the advantages of fast speed,
moderate price, high resolution and accuracy, so
the successive approximation type data acquisition
chip should be selected here [7], The schematic
diagram of data acquisition chip is shown in fig. 2.
The selection and analysis of ad bits are as
follows: for n bit AD, if the quantization unit is e
and the maximum ad range is R, then the maxi-
mum quantization error will be:
1
=22 *2 2
nn
e R R


   
(1)
Since the quantization of analog signals gen-
erally introduces additional noise, when the quanti-
zation noise is random noise, the quantization error
i of each sample point obeys the uniform distribu-
tion, and f(t) is set as its probability density func-
tion, so the quantization noise power can be ex-
pressed as:
 
22
2
e
e
i s t dt



(2)
where

represents the effective value or measure-
ment inaccuracy of the quantization noise within
the measurement bandwidth.
It can be seen from the previous formula that the total noise after digitization does
not need complex calculation in the chip after considering the acquisition. Therefore, in the
design of data acquisition function, adc812 is used as the core chip of data acquisition. The
adc812 controls ADC, DAC and other peripheral chips through internal special function reg-
isters, so its ad conversion program and DA conversion program are simpler and easier than
the traditional structure of 8051 plus peripheral chips. The internal 12 bit AD conversion cy-
cle is only 4S, which is several times faster than the common AD574 (conversion cycle 22s)
[8]. After rough estimation, if a conventional chip is used to form a data acquisition module
with the same performance as adc812, one chip of 8031, one chip of ad57427642816, two
chips of dac80, and several chips of decoder, register and multi-channel switch are needed [9].
Not only the price of these chips is much higher than that of adc812, but also the cost of a
single PCB is roughly the same as that of adc812. Its kernel is inte18051, which is familiar to
technicians. The existing software can be directly transplanted and its programming is rela-
tively simple. It can be programmed by general programmer or by loading program directly
through serial port of PC. Ad company provides adc812 with complete C language and as-
sembly language to develop simulation software and hardware debugging module tools. Sim-
ulation debugging software has a popular WINDOWS user interface and is very flexible and
convenient to use. In short, it is a high performance data acquisition chip with excellent per-
formance, low price and complete development means. Because of the previous functions,
adc812 is used as the core chip of this module.
Figure 2. Schematic diagram of data
acquisition chip;
D0-D7 – 8-bit digital output pin,
IN0-IN7 – 8-bit analog output pin,
VREF(+) – reference voltage positive
terminal, VPEF(–) – reference voltage
negative terminal, ST – A/D conversion start
signal input terminal, ALE – address latch
enable signal input, EOC – conversion end
signal output pin is low at the beginning of
conversion and high at the end of conversion,
OE – output permission control terminal is
used to open the three state data output latch,
and CLK – external clock source

Li, F.: Coherent Synthesis of Ultrashort Pulse Fiber Laser Based on …
4030 THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034
The AD conversion block in adc812 inte-
grates a fast, 8-Channel, 12 bit, single power ADC.
It is a capacitor 12 bit power supply ADC with
successive approximation conversion technology.
The conversion time is 5S and the acquisition rate
can be as high as 200 kHz. This module provides
users with multichannel multiplexer, sample holder,
on-chip reference power supply, calibration circuit,
AD converter and other components, and all these
components can be easily set through three special
function registers [10]. There is a factory pro-
grammed calibration coefficient in the chip, which
is automatically downloaded to the ADC when
power is on to ensure the best ad conversion per-
formance. If internal reference is used, 100 nF capacitance shall be connected between VREF
and CREF pin and analog ground and for decoupling. These decoupling capacitors should be
placed close to VREF and CREF pins. It should be noted that the internal reference source is
in power down state before the ADC or DAC enters into operation. When the reference volt-
age is provided by an off chip reference source, simply connect the external reference voltage
to the VREF pin. In order to ensure the technical index of adc812, the external reference volt-
age is set in the range of 2.3 V ~ avdd pin voltage. This not only avoids the lack of accuracy
of AD conversion result caused by reference voltage fluctuation, but also omits one-step divi-
sion operation by the ratio of two channels of data. Analog voltage input range of ADC is 0 ~
VREF. In this range, the designed code jump occurs in the middle of a continuous integer
LSB value. When VREF = 2.5 V, the output code is a direct binary number. The ideal in-
put/output conversion characteristics in the range of 0 ~ VREF are shown in fig. 3.
Although the AC component in the input signal is very small, the order of magni-
tude is 10-3, but the AC/DC separation has been successfully carried out, and the AC compo-
nent amplitude can be amplified to the measuring range for gold plating. Only selecting the
appropriate a/D converter can make good use of the ad bits and provide the absolute accuracy
of the whole data acquisition module.
Data exchange module design
The data exchange module exchanges data with the upper computer through the
network port. It has two functions: one is to transmit the data sent from adc812 to the upper
computer for display, processing and analysis. The other is to receive the commands and pa-
rameters sent from the upper computer and give them to adc812 for control and calculation.
Because the image transmission is not involved in the coherent synthesis of ultrashort pulse
fiber laser, and the amount of data is small, the module uses a 10/100M Ethernet chip W5300,
which integrates TCP/IP Ethernet controller, MAC and TCP/IP protocol stack inside the chip,
so it can send and receive data conveniently. In addition, considering that the research target
is point-to-point communication, the mode is single and the environment is good, UDP proto-
col is adopted for communication.
After W5300 initialization, it can respond to Ping request, and then complete the ini-
tialization of socket to be used for communication. Set the socket port number, destination
hardware address, destination port number, destination IP address, interrupt mask register and
mode register, and W5300 can carry out data transmission of Ethernet.
Figure 3. Input/output conversion
characteristics of adc812

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THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034 4031
Because W5300 processes all communication protocols internally, the receiving data
flow and sending data flow can be basically simplified as a fixed combination of read register
operation and write register operation, and the format of receiving data packet is also very
simple. The signals of W5300 chip and adc812 chip interface include seven groups: Address
bus (addr9-0), data bus (data (15:0), chip select signal
CS
, read enable signal
RD
, write
enable signal
WR
, interrupt request output
INT
, and reset signal
RESET
.
Signal preprocessing
Signal preprocessing circuit mainly in-
cludes four parts: filter design, front-end coeffi-
cient balancing circuit design, AC/DC signal
separation circuit design and fixed gain amplifi-
er circuit design, as shown in fig. 4.
Because the input signal may have clutter
on the power grid, and the sampling theorem
requires that the bandwidth of the sampled sig-
nal must be limited to avoid frequency aliasing,
so it is necessary to use the filter circuit to filter
out the unwanted frequency components to
meet this requirement [11]. At present, active
mode is generally used in filter design, which is
characterized by strong load capacity, good
filter characteristics and certain amplification
effect. In the design of signal preprocessing,
active filter is used in both filters, which is
composed of max275.
Because the AD sampling frequency is 4 K,
according to the sampling theorem, the cutoff
frequency f0 = 1 kHz is set, and the gain amplifi-
cation factor is 1. In this way, using max275 to
design the filter can be reduced to the calcula-
tion of resistance. The resistance calculation
formula of four external resistances is:
9
10
2 10 x
y
R
RhR



(3)
9
20
2 10
Rh


(4)
9
30
2 10 x
y
R
K
RhR



(5)
42
5R R K
(6)
where h0 is the cut-off frequency,

– the gain of the low-pass filter, and K – the quality factor.
The value of Rx/Ry depends on the connection method of frequency control terminal FC. If FC
Figure 4. Structure of signal preprocessing part

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4032 THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034
is grounded Rx/Ry = 1/5, if FC is connected with positive power supply Rx/Ry = 4, if FC is
connected with negative power supply Rx/Ry = 1/25. If the external resistance R1~R4 is too
large or too small, the latter two methods can be used to adjust the resistance. For the design
of low-pass Butterworth filter, K = 0.707 can be substituted into the above formula to calcu-
late its resistance, so the design is very convenient.
The band-pass filter is designed to isolate the direct flow and detect the AC, which is
convenient to control the program-controlled gain after AD acquisition. As there has been a
low-pass filter before, it can be satisfied that the second-order voltage controlled active high
pass filter and low-pass filter are designed by two OP amplifiers of op2177 and combined into
band-pass filter. The circuit diagram of band-pass filter is shown in fig. 5.
Among them, U10A, C5, C6, R6, and R2 constitute a high pass filter, and its cut-off
frequency is:
1
5 6 6 2
1
2π
hC C R R

(7)
If U10B, C7, C8, R4, and R5 AA form a low-pass filter, the cut-off frequency is:
2
7 8 4 5
1
2π
hC C R R

(8)
In this way, the passband of band-pass filter can eliminate DC and keep 50 Hz AC,
which ensures the accuracy of the data acquisition chip to the program-controlled gain ampli-
fier. In the design of signal preprocessing, the gain of the amplifier must be adjusted ac-
cording to the change of the input signal, so that the front-end coefficients of the signal are
equal, and the self balancing function can be realized, so as to eliminate the influence of the
loss coefficient. This requires the use of programmable amplifiers, data acquisition chip by
controlling it and then adjust the signal coefficient, get the required signal [12]. When 5-pin
and 7-pin are short circuited, the output gain of AD603 can be expressed as 40 VG + 10, and
the gain range is – 10 ~ + 30 dB. When pin-5 and pin-7 are disconnected, the output gain can
be expressed as 40 VG + 30, and the gain range is 10~50 dB. If the resistance is connected at
5-pin and 7-pin, the output gain range will be between them. The gain of the whole AD603
can be calculated by:
 
40 G
Gain dB V G
(9)
where VG represents the voltage difference between pins 1 and 2, and G represents the starting
point of gain. Under different feedback networks, G is different. The previous three connec-
Figure 5. Circuit diagram of band-pass filter

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THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034 4033
tion methods G are l0 dB, 30 dB, and 20 dB, respectively. It should be noted that the effective
range of control voltage of AD603 is only – 0.5 V to + 0.5 V. When the voltage difference
between pins 1 and 2 is greater than + 0.5 V, it is equivalent to + 0.5 V. When the voltage
difference is less than – 0.5 V, it is equivalent to – 0.5 V. As the output pin is 7-pin, the posi-
tive and negative power supply is 8-pin and 6-pin, so be careful when measuring the output.
Once the output terminal is short circuited with the power supply terminal, the chip will be
permanently damaged.
Experimental study
Aiming at the problem of low output power in the traditional coherent synthesis
method of ultrashort pulse fiber laser, the output power is taken as the evaluation index in the
experimental study of coherent synthesis method. The output power is a quantity describing
the energy concentration degree of far-field facula, whose value is between 0 and 1. The larg-
er the value is, the better the energy concentration degree of far-field facula is. The output
power is defined:
 
 
π,
,
rp x y
PIB p x y



(10)
where p(x,y) represents the light intensity distribution of far-field spot and r represents the
radius of circular barrel. In the experiment, the signal detected by PD is the output power
within the pinhole range. The pinhole size represents the barrel size of the calculated output
power. The pinhole size used for the phase-locked control is 20 m.
In order to verify the effectiveness of the
coherent combination method of ultrashort
pulse fiber laser based on balanced difference
method in this paper, the method proposed in [3,
4] is taken as the contrast object, and the con-
trast experiment is carried out. The experi-
mental results are shown in fig. 6.
It can be seen from fig. 6 that the output
power of the two literature methods is main-
tained at about 600 kW. Compared with the two
literature methods, the output power of the
method in this paper is maintained at about 900
kW, the output power is larger, and the energy
concentration of far-field spot is better.
Conclusion
This paper designs the coherent synthesis method of ultrashort pulse fiber laser
based on the balanced difference method. By using the balanced difference method to process
the photoelectric signal, the accuracy of the signal can be guaranteed, and the problems exist-
ing in the traditional coherent synthesis method of ultrashort pulse fiber laser can be solved,
which will provide some help for the follow-up research of ultrashort pulse fiber laser and
promote the development of laser technology.But in this study, the experimental test index is
less, not applied in practical operation, in the future development, further improve here.
Figure 6. Compare the experimental results

Li, F.: Coherent Synthesis of Ultrashort Pulse Fiber Laser Based on …
4034 THERMAL SCIENCE: Year 2021, Vol. 25, No. 6A, pp. 4027-4034
Acknowledgement
The research is supported by Nature Science Foundation of Weinan Normal Univer-
sity (No. 18ZRRC08).
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Paper submitted: January 14, 2021 © 2021 Society of Thermal Engineers of Serbia.
Paper revised: July 7, 2021 Published by the Vinča Institute of Nuclear Sciences, Belgrade, Serbia.
Paper accepted: July 10, 2021 This is an open access article distributed under the CC BY-NC-ND 4.0 terms and conditions.