Machine Learning on FPGA for Robust Si 3 N 4 -gate ISFET pH Sensor in Industrial IoT Applications

Abstract

This paper presents performance enhancement of Si 3 N 4-gate Ion-Sensitive Field-Effect Transistor (ISFET) based pH sensor using Machine Learning (ML) techniques [1]. A robust SPICE macromodel is developed using experimental data which incorporates intrinsic temperature and temporal characteristics of the device, which is further used in sensor readout circuit (ROIC), which shows a non-ideal temperature and time dependence in the voltage output. To make the device robust to the critical drifts, we exploit six state-of-the-art ML models, which are trained using the data generated from ROIC for a wide range of pH, temperature, and temporal conditions. Thorough comparison between ML models shows Random Forests (RF) outperforms other models for drift compensation task. This work also shows a preliminary time series classification task. The ML models are implemented on a Xilinx ® PYNQ-Z1 Field Programmable Gate Array (FPGA) board to validate the performance in power and memory-restricted environment, crucial for IoT applications. A parameter, Implementation Factor (IF) is defined to evaluate best ML model for IoT deployment using FPGA/MCU hardware implementation. The significantly lower power consumption of FPGA board as compared to CPU with no noticeable performance drop is a pointer to the future of robust pH sensors used in industrial and remote IoT applications.

Full text

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Machine Learning on FPGA for Robust Si3N4-gate
ISFET pH Sensor in Industrial IoT Applications
Soumendu Sinha, Member, IEEE, Nishad Sahu, Rishabh Bhardwaj, Aditya Mehta, Hitesh Ahuja, Satyam
Srivastava, Anubhav Elhence, Vinay Chamola, Senior Member, IEEE
Abstract—This paper presents performance enhancement of
Si3N4-gate Ion-Sensitive Field-Effect Transistor (ISFET) based
pH sensor using Machine Learning (ML) techniques [1]. A robust
SPICE macromodel is developed using experimental data which
incorporates intrinsic temperature and temporal characteristics
of the device, which is further used in sensor readout circuit
(ROIC), which shows a non-ideal temperature and time depen-
dence in the voltage output. To make the device robust to the
critical drifts, we exploit six state-of-the-art ML models, which
are trained using the data generated from ROIC for a wide
range of pH, temperature, and temporal conditions. Thorough
comparison between ML models shows Random Forests (RF)
outperforms other models for drift compensation task. This
work also shows a preliminary time series classification task.
The ML models are implemented on a Xilinx®PYNQ-Z1 Field
Programmable Gate Array (FPGA) board to validate the per-
formance in power and memory-restricted environment, crucial
for IoT applications. A parameter, Implementation Factor (IF)
is defined to evaluate best ML model for IoT deployment using
FPGA/MCU hardware implementation. The significantly lower
power consumption of FPGA board as compared to CPU with no
noticeable performance drop is a pointer to the future of robust
pH sensors used in industrial and remote IoT applications.
Index Terms—ISFET, Machine Learning, SPICE Macromodel,
pH Sensor, Random Forest, Neural Networks, Drift Compensa-
tion
I. INTRODUCTION
The field of biomedical and chemical sensing applica-
tions has been a fascinating area for research since several
decades [2]. With the advancement in micro/nano fabrication
technologies, it requires that miniaturized sensors should not
compromise on the measurement accuracy and precision [3].
Electrochemical sensors are widely used for pH sensing ap-
plications [4]. Ion-Sensitive Field-effect Transistors (ISFETs)
are one of the most promising electrochemical sensors due to
inherent advantages of easy fabrication, low cost and small size
Soumendu Sinha is with the Semiconductor Devices Area, CSIR-Central
Electronics Engineering Research Institute(CEERI), Pilani, India (e-mail:
soumendu@ceeri.res.in).
Nishad Sahu, Hitesh Ahuja and Anubhav Elhence are with the Department
of Electrical and Electronics, BITS-Pilani, Pilani Campus, 333031, India. (e-
mail: h20160215@pilani.bits-pilani.ac.in, h20190070@pilani.bits-pilani.ac.in
and f2015499@pilani.bits-pilani.ac.in).
Aditya Mehta is with the Department of Computer Science and In-
formation Systems, BITS-Pilani, Pilani Campus, 333031, India. (e-mail:
f20170783@pilani.bits-pilani.ac.in and f20170599@pilani.bits-pilani.ac.in).
Satyam Srivastava is with the Intelligent Systems Group, CSIR-Central
Electronics Engineering Research Institute(CEERI), Pilani, India (e-mail:
satyamsrivastava@ceeri.res.in).
V. Chamola is with the Department of Electrical and Electronics Engi-
neering & APPCAIR, BITS-Pilani, Pilani Campus, 333031, India. (e-mail:
vinay.chamola@pilani.bits-pilani.ac.in).
TABLE I: Table listing out the applications of ISFET in various industries.
#Industrial
Application Application Description Ref.
1.
Bio-medical /
clinical,
diagnosis
and research
Rapid detection of SARS-CoV-2
virus causing the COVID-19 disease [7–9]
Malaria diagnosis [10]
Human Genome Project and
genome/DNA sequencing [6, 11–14]
Accuracte and high throughput pH sensning [11]
Robust label-free Micro RNA detection [15]
Breast cancer mutation detection [16]
pH and oxygen partial pressure measurement [17]
Point of care biomedical applications [18]
DNA methylation detection [19]
2. Agriculture
Development of wireless sensor
nodes for algae cultivation [20]
Precision Agriculture [21–23]
Soil and Crops Measuements [24]
In situ monitoring of soil nutrients/
soil nitrate sensing/ soil analysis/soil sensor [25–29]
3. Environmental
monitoring
Monitoring of wastewater [24]
Geochemical Barriers Monitoring [24]
Pesticide and toxin concentration detection [30]
Coastal pH monitoring [31]
Pollution monitoring in liquid media [32]
Sea water alkalinity measurement [33]
4. Wearable
sensing
Sweat sensing [34, 35]
Skin temperature monitoring [35]
On body pH measurement [36]
Wearable Point of care applications [37]
Body Fluid pH monitoring [38]
5. Food
Heavy metal ions detection in vegetables [39]
Determination of glucose,
ascorbic and citric acids [40]
Controlling Phosphororgannic
pesticides in Water and Vegetables [41]
Nitrate ion determination in vegetables [42]
6. Horticulture
pH and potassium measurement
in nutrient solution [43]
Multi ion sensing [44]
Soil Analysis [45]
Nutrient sensing for rockwool culture [46]
Application in closed
loop system for green houses [47]
[5, 6] for chemical/biochemical sensing applications, popularly
utilized for pH sensing applications, as listed in Table I.
Despite the wide range of applications, ISFETs are prone
to temperature and temporal drift, restricting their accuracy
in field applications [48]. ISFETs show non-linear drift char-
acteristics due to temperature dependent semiconductor and
electrochemical parameters [49, 50]. The temporal drift in
ISFET devices is due to chemical modification of the sensing
film [51]. In order to deploy ISFET-based pH sensors for
critical field applications such as biomedical devices, environ-
mental monitoring and food quality monitoring, robust drift
compensation methodologies are critical to provide accurate

2
sensor data [5, 52]. Manual calibration of such deviations
is difficult when remotely deployed in large numbers, and
the non-linear drift behavior makes it extremely challenging
with varying temperature and time in field deployment [49].
Therefore, Artificial Intelligence (AI)-assisted techniques are
increasingly being utilized for automated sensor calibration
[53].
Machine learning techniques are powering major trans-
formations in the novel era of automation. The algorithms
have proven to be extremely effective in learning impact
of independent variables on the dependant variables [54].
As ISFET-ROIC shows output voltage (pH) dependence on
ambient conditions, we infer that ML techniques greatly suits
the compensation task [48]. From the data generated using
device-ROIC, ML algorithm learns approximate input-output
functions in the training phase. To test a model’s performance,
i.e., testing phase, we evaluate the model on an unseen test
data. Previous works have seen importance of ML based
approaches in temperature and temporal drift compensation
[55].
For the compensation task, we compare the accuracy of
various models, viz., multi-layer perceptron, linear regression,
polynomial regression, decision trees, random forest and sup-
port vector machine. For the purpose of data generation, a
robust SPICE macromodel of Si3N4-gate ISFET has been
developed using experimental data, which includes the temper-
ature and temporal dependence of electrochemical and device
parameters [49]. The model is essential to generate quality
data for later used ML algorithms for the task of concern.
This SPICE macromodel of ISFET is exported as a sub-circuit
block in a constant voltage constant current (CVCC) ROIC.
In comparison to our previously reported work [1], we extend
this work to the implementation and performance comparison
of the ML models on FPGA/MCUs using Xilinx PYNQ-Z1
board for drift compensation in sensors and study feasibility
for IoT deployment.
To the best of our knowledge, our five major contributions
are:
•We introduce ML-based models to significantly reduce
temperature and temporal dependence of Si3N4-gate IS-
FET pH sensor in a CVCC ROIC.
•Based on our compensated results, we compare the per-
formance of various ML models to evaluate the best per-
forming ML technique for Si3N4-gate ISFET-pH sensor.
•As a preliminary work, we show how by only using
drifted values of the reference voltage, we can estimate
the pH of the solution.
•We also present for the first time implementation of ML
models on FPGA using Xilinx PYNQ-Z1 board for drift
compensation in sensors and compare the results in terms
of accuracy, speed and power consumption with CPU,
MCU and FPGA implementation.
•We also propose a novel factor called Implementation
Factor (IF) to evaluate the performance of ML models
for FPGA/MCU implementation. The factor is calculated
by giving equal weights to accuracy, speed and energy
consumption of the ML models on the FPGA.
p-Si
n-Si n-Si
S
Ref
D
B
Silicon
Metallization
Insulator
Sensing film
Channel
pH solution
Fig. 1: Schematic of the cross-sectional view of ISFET device
[1].
The paper organization is as follows: Section II presents
an overview of ISFET devices and its SPICE macromodel
formulation along with the details of ROIC topology. Section
III presents an overview of the machine learning algorithms
and the experimental setups for drift compensation tasks.
Section IV discusses the FPGA and MCU implementation
of the ML models. Section V presents the results obtained
from the various experimental setups discussed. Section VI
presents the conclusion of the work.
II. ISFET DEVICE DESCRIPTION AND MACROMODEL
FOR MU LATI ON
ISFET device is similar to a MOSFET in terms of the device
structure, except the gate electrode in the MOSFET is replaced
by a reference electrode, a sensing layer and an ionic solution,
as shown in Fig. 1 [49]. A reference electrode is inserted in
the ionic solution to supply a reference potential. The ionic
solution is in contact with the gate oxide, which leads to the
formation of charges at the solution/oxide interface, which
further modulates the threshold voltage of the ISFET, causing
variation in the channel current, which is sensed by a suitable
read out circuit, by sensing the voltage at the output terminal.
The semiconductor and the electrochemical parameters of
ISFET have a dependence on temperature (see Supplementary
article for details) [50]. Thus, the threshold voltage of ISFET
gets affected by the concentration of ions in the electrolyte
solution and the temperature [51]. Sensing films such as Si3N4
also show a significant temporal drift [49] due to inherent
transient nature of chemical reactions taking place at the
surface of the sensing film, leading to chemical modification of
insulator with time, which affects the device threshold voltage
[51].
A. SPICE Macromodel Formulation of Si3N4-gate ISFET
The macromodel of ISFET is developed in SPICE because
it gives us the flexibility to define custom sub-circuit blocks,
which contains robust modeling of all the parameters pertain-
ing to the circuit elements involved. Sinha et. al. carried out
comprehensive modeling of the dependence of the parameters
present in the both electrochemical and electronic stages,
considering the parameters’ dependence on temperature and

3
N-ISFET
D
BS
Ref
pH
Fig. 2: Schematic of the developed ISFET SPICE
Macromodel[1].
8.5 k Ω
+15V
D
Gnd
pH
+15V
+4 V
B
S
+5 V
Ref
Gnd
Gnd
Gnd
Fig. 3: CVCC topology for readout for ISFET sensor [1].
time in [49] to develop an accurate Si3N4gate ISFET SPICE
macromodel that closely mimics real world ISFET device.
The study uses experimental data to develop a robust SPICE
macromodel and the simulated characteristics of the SPICE
model is very close to the experimental results. We follow a
similar approach and use the developed SPICE macromodel
in this study. The ISFET SPICE model consists of 5 nodes,
namely drain (D), source(S), bulk (B), the reference electrode
potential connected to the electronic stage of the device via
electrical double-layer capacitors and pH, which is the linear
mapping of pH of the solution as an input voltage terminal.
In CVCC circuit topology, the sub-circuit block shown in Fig.
2 is used to obtain the sensor response [48].
B. ISFET Readout Circuit Topology
CVCC topology (Fig. 3) is used as a read out circuit derived
from previous study [49]. The voltages at the source and the
drain nodes of the device are kept constant using op-amps
in negative feedback and voltage buffer modes, respectively.
Hence, due to constant Vds and Ids, the quantity (Vref -Vt) is
fixed. Thus, any change in the threshold voltage due to varying
temperature, time and pH are reflected by change in Vref of
the device. The Vref output relates to the pH of the solution
when the temperature and time are constant. For the same pH
solution, when the temperature and time is varied, the Vref
values obtained correspond to erroneous values of measured
pH, which needs to be corrected through intelligent techniques.
The ROIC output is given as an input to the ML algorithms
to compensate the undesired temporal and temperature drift.
C. Accuracy of Si3N4-gate ISFET SPICE Macromodel
The SPICE macromodel used in this study is based on our
previous study on development of an accurate Si3N4gate pH-
ISFET device [49]. The results of [49] indicate that the model
is able to obtain characteristics very close to the experimental
data for both temperature and temporal drift. For temperature
drift , the model was developed based on the experimental
data reported in [56]. In the transfer characteristics of the
device, the simulated isothermal point was obtained at (4.25 V,
457.45 uA) against the experimentally reported value of (4.10
V, 468.26 uA) i.e. an error of 3.53 % in the gate voltage and
error of 2.29 % in the drain to source current, which is within
the tolerance limits.
For the temporal drift, the experimental data was taken
from [57]. Using the experimental data, the parameters were
extracted for modeling the temporal drift in the ISFET SPICE
macromodel which provided an Adj. R2value of close to 1.
Thus, the simulated temporal drift was very close to the the
experimental data, which is confirmed with a high value of
Adj. R2.
Thus, the SPICE macromodel reported in [49] gives very
close accuracy to the real ISFET device characteristics. We
provide an in-depth explanation of the developed mathemat-
ical model used in the ISFET SPICE macromodel for the
calculation of ISFET threshold voltage, temporal drift and
temperature drift in the Supplementary Article (Sections I.B,
I.C and I.D respectively). The developed model has been used
in this study for generating the data for training the ML
models. Thus, a successful drift compensation on this data set
can be emulated with high confidence for drift compensation
in real life ISFET-pH sensors.
III. EXP ER IM EN TAL SET UP
We formulate the compensation task as two sub-tasks. The
first task focuses on compensating the voltage drift induced
by only considering one parameter, i.e. temperature; whereas
the second task aims to tackle a more complicated challenge
of offsetting voltage drift caused by variability in both tem-
perature and time. Since both time and temperature lead to
voltage drift, it is a non-linear function estimation problem,
thereby increasing its complexity.
All models were built using the Sklearn Python library in
Python 3.5 [58]. In this study, we compare task performances
of six state-of-the-art ML models described in this section. The
pipeline of approach is depicted in Fig. 4. We encourage reader
to refer [58] for fine-grained details about ML model and
function optimization that lead to model parameter learning.
A. Machine Learning Algorithms
1) Linear [LR] and Polynomial Regression [PR] LR is the
most basic form of regression technique which involves
fitting a straight line on the training data with a strong
assumption i.e. linear relationship between input-output
variables. PR is an extension to LR incorporating nonlin-
ear dependencies. The algorithm tries to fit a polynomial
curve on the data provided by optimizing a cost function.
If x={x1, . . . , xn}is the input vector and ybe the
output—
y=α0+α1x1+α2x2
2+... +αnx2
n(1)

4
Experimental data of
Si3N4 gate ISFET pH
device from literature
Accurate SPICE
macromodel development
based on experimental
data which accounts for
both temperature and
temporal drift
Six different ML Algorithms:-
LR,PR,DT, RF,MLP and SVR
trained on PC for compensating
temperature and temporal drift The SPICE macromodel is
incorporated in a CVCC readout
circuit and data is generated for
training and testing Machine
Learning(ML) algorithms
Data split
into 2 parts
80 % used for
training
20 % used for
testing
Trained model
executed on PC
for testing
Trained model
executed on PYNQ Z1
for
board testing
Comparison made
between different ML
algorithms based on
speed, accuracy and
energy consumed
Results indicate that FPGA implementation is more
suitable for ISFET Industrial IoT applications as compared
to PC. Random Forests gives best results based on the
above three parameters for FPGA implementation
Fig. 4: Pipeline of the adopted methodology
Fig. 5: Schematic of RNN architecture.
where αiare weights which are learnt during training the
regressor model.
2) Support Vector Regression [SVR] The algorithm works
on a similar principle as SVM (Support Vector Machine).
In SVM, the algorithm finds a hyperplane, with function
f(x) = wx+b, given f(x)lies within margin of tolerance
() from the value y(x)of every data point, with the
greatest possible margin between the decision line and the
nearest point from it from samples representing a specific
class. The hyperplane with the maximum distance margin
will classify the data points correctly. However, in the
case of SVR, the support vectors come up with the closest
match between the data points and the actual function
that is represented by them. So, maximizing the distance
between the support vectors to the regressed curve, we
move towards the actual curve. Mathematically, this can
be represented as
minimize f=1
2kwk2(2)
s.t. yi−w1·xi−b≤ε;w1·xi+b−yi≤ε(3)
3) Decision Trees [DT] This algorithm builds the models
in the form of an inverted tree structure. Each branch
of the tree represents a possible decision, and with such
branches, the associated decision tree is incrementally
developed. The leaf nodes at the bottom represent the
final decision. In regression problem, the criteria to split
the branches is usually decided by selecting the setup
resulting in minimum mean square error or standard
deviation.
4) Random Forest [RF] RF constructs multiple DTs during
training phase. It fits these DT on sub-samples of data
(a) (b)
(c) (d)
Fig. 6: Characteristic curves of Si3N4-based ISFET: a)Vref-pH
curves at different temperatures; b)Vref-Temperature curves at
different pH; c)Vref-time curves at different temperatures for
pH 7; d)Vref-time curves at different temperatures for pH 10
[1].
and gives the averaged output for the computation of
accuracy. There are two key concepts which causes the
randomness. Firstly, there is random sampling of training
data at the time of building trees. Secondly, there are ran-
dom subsets of features examined when splitting nodes.
For an input, select with replacement Krandom samples
from the training set followed by learning a separate
decision tree. Prediction on an unseen sample xnew can
be made by averaging prediction from all the individual
DT on xnew—

5
Fig. 7: PYNQ-Z1 board booted with the PYNQ image and
drawing power from USB port via USB power tester.
ˆ
f(xnew) = 1
KX
k∈{1,...K}
fk(xnew)(4)
5) Multi-layer Perceptron [MLP] An MLP is a feed-forward
artificial neural network model which maps the input data
to the output data. The framework of MLP consists of
neurons, which are the basic units of computations. This
fundamental unit receives input from other neurons or
an external source and computes the output. Each of the
inputs have an associated weight, which is being imposed
on the bias of its comparative importance to other inputs.
A neuron performs the following operation,
f(x) = ϕ n
X
i=1
wixi+b!(5)
where w represents the weight vector, x represents the
input vector, b adds the bias an ϕis the activation
function.
6) Recurrent Neural Networks (RNN) Standard feed-forward
neural networks fail to capture sequential structure of the
input. To tackle problems where the input has a series
of values having notion of sequence, a special class of
neural network were designed. An RNN (directionally)
iterates over the element of the sequence and encodes
the necessary information from the sequence. The input
is processed as follows:
ht=fW(ht−1, vt)(6)
Vp=fO(hn)(7)
where, fW, and fOare the function with trainable pa-
rameters Wand O, respectively. fOlearns to map hidden
representation of input. htis the hidden RNN generates
until sequence at step t, i.e., vt. For prediction, we use
hnt,ntbeing the sequence length. We feed hntto a
feed-forward NN with softmax activation to predict the
pH class,(as shown in Fig. 5.
We used mean absolute error (MAE), mean square error
(MSE) and R2metrics to test the above models. [59].
B. Experiment 1 - Temperature Drift Compensation
As discussed above, temperature is one of the primary
factors leading to ROIC output drift provided by an ISFET
sensor. We plot the temperature dependent characteristics of
ISFET ROIC as shown in Fig. 6 (a) and (b). We tested several
ML models in this first experiment, which attempts to predict
the actual pH by compensating for Vref drift. Here, we have
used the data points from the set of reference voltages and
corresponding pH of the solution, ranging from 0 to 14 at
a resolution of 0.01. The temperature is varied from 15oC
to 65oC. Hence, the total number of samples obtained were
66,351. The whole data was split into training and testing
data sets in the ratio of 80:20%. For efficient preparation,
preprocessing techniques, such as normalization and mean
centering, were taken into account. We have taken ROIC
output voltage and ambient temperature as input features for
the algorithms.
(a) pH-7 (b) pH-10
Fig. 8: Prediction curve with and without ROIC temperature
drift compensation for pH 7 and pH 10 [1].
C. Experiment 2 - Temperature-Temporal Drift Compensation
For this experiment, we have taken data points for tempera-
ture ranging from 15oC to 65oC and time varying from 0 hours
to 50 hours. We plot temperature-temporal dependent ROIC
output as shown in Fig. 6 (c) and (d). Data corresponding
to pH 7 and 10 were considered for this experiment, which
resulted in a total of 81,254 data samples. Again, the data
is split in the ratio 80:20% for training and testing purposes
and similar pre-processing as in Experiment 1 was applied. We
have considered pH, ambient temperature and time as the input
features for training all the models, with an aim to capture the
changing voltage for a particular pH with change in time and
temperature.
D. Experiment 3 - Time series classification
Owing to the limited temporal data for pH values 7 and 10,
we also performed time-series classification. Given a set of 10
consecutive Vref reading given by the pH sensor, the binary
classification task is to predict the pH of the solution. The
problem formulation is slightly harder from the previous two
experiments as we do not have the time stamp information at
which the readings are noted, and also the data is scarce. For

6
TABLE II: Comparison of results for experiments on the Xilinx PYNQ-Z1 board(PS) and the Intel Core CPU for temperature drift compensation.
Model Metrics for Xilinx PYNQ-Z1 Board(PS) Metrics for Intel(R) Core(TM) i5-8250U
CPU @ 1.6 GHz - Quad core
MAE MSE R2Time
(s)
Power
(W) MAE MSE R2Time
(s)
Power
(W)
LR 0.234 1.237e-01 0.99121 0.004 2.4552 0.234 1.237e-01 0.99121 ∼0 6.0
PR 0.071 1.118e-02 0.99916 0.013 2.7181 0.071 1.118e-02 0.99916 0.0009 9.7
DT 0.058 6.713e-03 0.99952 0.023 2.7181 0.058 6.713e-03 0.99952 0.0029 9.6
RF 0.007 8.947e-05 0.99999 0.272 2.7280 0.007 8.627e-05 0.99999 0.0568 10.8
MLP 0.025 9.809e-04 0.99993 0.035 2.52464 0.025 9.809e-04 0.99993 0.0366 9.6
SVR 0.074 1.060e-02 0.99925 73.878 2.66352 0.074 1.059e-02 0.99925 1.1847 21.2
(a) (b)
(c) (d)
Fig. 9: Prediction curve with both temporal and temperature
drift compensation and only temperature compensation: a) pH-
Time curve for pH 7, temperature 20oC; b) pH-Time curve
for pH 10, temperature 20oC; c) pH-Time curve for pH 7,
temperature 35oC; d) pH-Time curve for pH 10, temperature
35oC [1].
the time-series (sequence) classification, we use RNNs. The
input consists of two feature vectors, one corresponding to
the ten consecutive Vref readings and the other is the natural
logarithm of each voltage reading. As we suspect the voltage
should follow an exponential decay curve, the logarithm of the
voltage might show linear dependence with time. This comes
from the idea that learning linear relationships is significantly
easier (since it facilitates analytical solutions) than capturing
a non-linear relationship between dependent and independent
variables from the dataset. We sample 2,500 non-overlapping
sequences of Vref through time and for both the pH 7 and 10.
Training set constitutes randomly shuffled 70% of the dataset
samples, 10% is used for development, 20% for performance
TABLE III: Summarizing experiments for input and output
features
Experiment Input features Output
1:Temp Comp Temperature+Vref pH
2:Temp-time Comp Temperature+Vref +Time pH-shift
3:Series classification Sequence of Vref values pH
testing.
We have summarised the input features and expected output
of the above experiments in Table III.
IV. FPGA AND MCU IMPLEMENTATION OF ML
ALGORITHMS FOR IOTDE PL OYM EN T
In addition to conventional implementation on CPU, we also
implemented the algorithms discussed in the Section III on
FPGA and MCU Hardware. The ML models discussed in this
study are relatively simple and therefore in addition to FPGAs,
they can also be implemented using micro-controllers with
specialised instruction set, although it may take long time. In
this study, we choose to implement them on Programmable
System (PS) and Programmable Logic (PL) of the Xilinx
PYNQ-Z1 board. The implementation on the PS is considered
as an MCU implementation while the implementation on the
PS+PL is considered as an FPGA implementation. FPGAs
provide the feature of rapid prototyping. In comparison to
FPGAs, micro-controllers with specialise instruction set con-
sume lesser area but consume more time as well as power
for implementing the same ML algorithms. PYNQ (Python
Productivity for ZYNQ) is the latest open-source project from
Xilinx which makes it easier to program FPGAs using the
python language [60]. Traditionally, Verilog HDL code was
essential to be written for implementing algorithms on hard-
ware like FPGAs but with the aid of the PYNQ framework,
such algorithms can now be directly programmed into FPGA
using languages such as Python and C/C++ and with the help
of hardware libraries/overlays, using a hardware-software co-
design approach. The hardware libraries or overlays are written
in conventional languages such as Verilog and can be used
directly to program the FPGA on board the PYNQ-Z1 board.
Here, we choose the PYNQ-Z1 board as it has very low power
consumption, which makes it suitable for IoT and industrial
applications. To monitor the power consumption of the PYNQ-
Z1 board in real time, we used a USB power tester. A real time
image of the setup is given in Fig. 7. The PYNQ-Z1 board has

7
TABLE IV: Programmable logic resource in the PYNQ Z1
board[60, 61].
Sl.
No. Programmable logic resource No. of Units
1. 6-input LUTs 53,200
2. Flip-flops 106,400
3. BRAM (block RAM) 630 KB
4.
Clock management tiles each
with a phase-locked loop(PLL)
and mixed-mode-clock manager
(MMCM)
4
5. DSP slices 220
6. On chip analog-to
digital converter 1
Fig. 10: Screenshot of the Xilinx Power Estimator Window for
estimating the worst case power consumption on the PYNO-
Z1 board.
a 650 MHz dual core Cortex-A9 processor and PL equivalent
to Artix- FPGA. It has 13,300 logic slices, each with four 6-
input LUTs and 8 flip flops. Details of its PL resources are
given in Table IV.
In addition to this, we also perform worst case power
estimation using the Xilinx Power estimator (XPE) tool in
the following subsection.
A. Power Estimation using Xilinx Power Estimator(XPE)
It is important to determine the power and cooling speci-
fications of SoC(System on Chip) and FPGA designs early.
Accurate worst case power analysis helps in avoiding ma-
jor roadblocks in the product development life-cycle. The
Xilinx SPE is a spreadsheet tool designed for this purpose.
we performed the power estimation using the Xilinx Power
Estimator for Zynq 7000 family (PYNQ Z1 board belongs
to ZYNQ XC7Z020-1CLG400C) [60, 61]. On choosing the
Fig. 11: Total on chip power consumption on the PYNQ Z1
board for different amount of resource utilisation of the PL
(estimated using Xilinx Power estimator).
suitable device settings and 100 % resource utilisation in
the Programmable Logic (PL) , the total on-chip power was
estimated to be 2.861 W as shown in Figure 10. This proves
the lower power consumption of the board and makes it
feasible for checking designs meant for IoT deployment. This
is also very close to the results obtained with the USB power
tester as discussed in Tables II and VII . Also we plot
the power consumption estimate using the XPE for different
degrees of PL utilisation from 20 % to 100 % as shown in
Figure 11.
B. Adopted methodology for FPGA and MCU implementation
Next, we followed the following step by step methodology
for the FPGA and MCU implementation of the various ML
algorithms discussed earlier for temperature and temperature
+ temporal drift compensation in ISFET devices:
1) We installed the SciKit Learn (SK Learn) library on the
PYNQ Z1 board using the reference [62].
2) Next, we trained the ML models using the data set
generated from SPICE.
3) Next, we dump the trained model on the PS of PYNQ-Z1
and run the prediction. While the prediction is running,
we measure the peak power consumption of the board by
visually observing the USB power tester display.
4) We implement the ML algorithms for temperature and
temporal drift data on the PL of the PYNQ -Z1 Board
using the sklearn hardware library for PYNQ in [63].
5) We calculate the time taken for prediction using the
time.time() function in the Jupyter terminal of the PYNQ
Z1 board.
6) The performance metrics, such as MAE, MSE, RMS and
R2are calculated for the ML models using the python
code in the Jupyter terminal.
7) We note the obtained values and multiply the correspond-
ing elapsed time with peak power consumption values to
calculate the energy consumption per prediction.
8) Steps 2-6 are repeated for all the six ML algorithms
for both temperature and temperature + temporal drift
compensation.
9) As the best results were achieved by RF, we choose
to implement it from scratch using Verilog and imple-

8
Fig. 12: Schematic of the trained RF algorithm implementation on the PL of PYNQ-Z1 board using generated using Xilinx
Vivado software for only temperature ( top) and temperature + temporal drift(bottom).
ment it using Xilinx Vivado software. We selected the
Xc7z020CLG400-1 FPGA platform (PL of PYNQ-Z1)
for implementation. The verilog code was extracted for
the trained RF model from [64].
10) As RF consists of multiple DTs, we also implemented
DT using the Xilinx Vivado Software on PL platform.
Overlays given in [65] can also be used to run DT on the
PYNQ-Z1 board directly.
11) Finally all the the results are compiled and presented in
tabular format. The PL implementation of PYNQ Z1 is
compared with the Intel Core CPU implementation in
terms of accuracy, power consumption and speed.
12) We calculate the new parameter proposed in Section V-E
called IF score for the six ML algorithms. It indicates the
best performing ML model for IoT deployment, giving
equal importance to accuracy, power consumption and
time taken for prediction for both the PS and PL of the
PYNQ-Z1 FPGA.
Recorded video and code snippets from Jupyter terminal of
the PYNQ-Z1 board for the experiments conducted on the PS
are given in the Supplementary material [66].
C. Issues with fixed point and floating point representation
In FPGA implementation, it is important to decide the num-
ber representation to be used. There are two popular methods
1) Fixed Point representation, 2) Floating point representation.
In fixed point representations, it is easier to perform arithmetic
operations but the range of the numbers and precision is
limited whereas in floating point representation (such as IEEE
754), it is difficult to perform arithmetic operations but the
range of numbers which can be represented and the precision
is very high. In our implementation of ML models on the PL,
we used 32 bits fixed point number representation with 20 bits
for fraction part. A better solution can be obtained by using
standard floating point representation, such as IEEE 754 single
precision, half precision etc., which is part of our future work.
D. Details of FPGA implementation
For LR and PR models, we used a common hardware library
from [63]. The library used 32 bit fixed point number system
with 20 bits in fraction. For LR the training:testing ratio in the
data-set was 80:20 for temperature and temporal drift compen-
sation. However, for PR the same was 95:5 due to the limited
buffer size available on the PYNQ-Z1 board for storing the
test data.We also implemented the best performing RF model
along with DT algorithms using the Xilins Vivado Software
on the PYNQ-Z1 PL platform, i.e., XC7020CLG400-1. The
Verilog code for the trained RF and DT models were extracted
using [64]. It uses 64 bit number representation with only 8 bit
for fractions. For both temperature and temperature+temporal
drift compensation, the RF had 12 estimators with a maximum
depth of 4. Figure 12 shows the schematic of the Trained
RF models for temperature and temperature+temporal drift
obtained using the Xilinx Vivado Software. For DT, in both
temperature and temperature+temporal drift compensation, the
depth was 4.
V. RES ULTS A ND DISCUSSION
A. Temperature Drift Compensation
Table II encompasses Si3N4-based ISFET ROIC results on
various performance measures for achieving temperature drift
compensation on both the Xilinx PYNQ-Z1 board and the
Intel(R) Core(TM) i5-8250 CPU @ 1.6 GHz - Quad core.
The developed ML models achieved very high R2score (cor-
relation) on both the platforms. The strong correlation value
between the real pH value and its expected value indicates that
the temperature drift can be precisely accounted for by the ML
models. The error rates achieved with various models are very
small, with Random Forests (RF) outperforming other models.
We suspect that with a large number of data samples used for
training, MLP might outperform the classical ML algorithms.
In terms of the time taken for prediction and average power

9
TABLE V: Performance metrics for ML algorithms practically implemented using the PYNQ-Z1 board PL (Xc7z020CLG400-1)
and power measured using USB power tester.
Drift
Compensation
ML
Algorithm
Accuracy Metrics Time taken
(per prediction)
Energy consumed
(per prediction) (J)
IF
ScoreMAE MSE R2
Only
Temperature
LR 0.244 0.125 0.991 3.80E-04 6.83E-04 1351.861
PR 0.015 0.003 0.999 4.24E-04 7.70E-04 1248.598
Temperature
+ Temporal
LR 1.505 3.963 0.644 3.68E-04 6.24E-04 1425.462
PR 0.695 1.001 0.907 3.67E-04 6.50E-04 1407.147
TABLE VI: Performance metrics for trained RF model imple-
mentations on Vivado on XC7Z020CLG400-1 FPGA board(
PL of PYNQ-Z1)
Drift
Comp.
ML
Algorithm
Accuracy Metrics Total on chip
power (W)MAE MSE R2
Only
Temperature
RF 0.598 0.546 0.961 1.13
DT 0.692 0.7248 0.948 1.13
Temperature
+ Temporal
RF 0.297 0.335 0.965 0.926
DT 0.316 0.397 0.958 1.13
consumption during prediction, Linear Regression (LR) out-
performs other models on both the platforms but gives poorer
performance metrics as compared to other models. Thus, there
is a trade-off between better performance metrics with power
and time consumed for prediction.
In addition, we examine the performance of the RF model
with respect to a simple curve fitting model (we chose Linear
Regression (LR) for this purpose). Illustration Fig. 8 shows the
expected pH vs temperature curves for pH values 7 and 10.
The obtained curves are almost same for both CPU and FPGA
implementation. This is explained by results shown in Table
II, where it is seen that the performance metrics of FPGA
implementation on PYNQ board and CPU implementation are
similar for RF and LR models. The curves in blue correspond
to a random forest regressor fitted on all samples of training
data, except for a number of pH values. For example, all
samples corresponding to pH 0-5 and 9-14, i.e. except all of
the samples corresponding to pH 6-8, will be the training data
to predict pH 7. On similar lines, another model was trained
to predict pH 10.
B. Temperature-Temporal Drift Compensation
Table VII shows the performance of ML models for com-
pensating drift in Vref due to both time and temperature using
the Xilinx PYNQ-Z1 board and the Intel(R) Core(TM) i5-
8250 CPU @ 1.6 GHz - Quad core. All ML models except
LR, perform decently well for the task at hand. This drop
in performance of linear regression model can be explained
due to the non-linearity of the experiment. Even though it
consumes the least time in both platforms and least power
on FPGA board, its poor accuracy makes it unfit for imple-
mentation. Similar to experiment 1, a high R2score shows
prominent correlation between the real Vref and the predicted
Vref for particular temperature, pH and time. Random Forest
achieves better results than any other model, showing its worth
for compensating drift in voltage for Si3N4-based ISFET.
Moreover, here we examine the performance of the RF
model for temperature-temporal drift compensation with re-
spect to best model obtained from experiment 1 (only temper-
ature compensation). Illustration Fig. 9 shows the expected pH
vs time curves for pH values 7 and 10 at two temperatures (low
and high) . For training the RF regressor, for both temporal and
temperature drift compensation, it was fitted on all samples
of training data except for a number of temperatures. For
example, if the model is used to compensate Vref for pH
7 at 20oC, it was trained for all samples of pH 7 and
all temperatures except 18,19,20,21,22 oC. On similar lines,
another model was trained to predict Vref for pH 10. The
output is mapped to corresponding pH value. Similar to the
previous case, the results are nearly same for both the FPGA
and CPU implementations due to the very close performance
metrics, as shown in Table VII.
C. Time series classification
We compare the performance on 4 different RNN-based
models—1) LSTM, 2) biLSTM, 3) GRU, 4) biGRU [67]. The
number of RNN nodes in LSTM and GRU is 32 while in
biLSTM and biGRU is 16. The feed-forward NN has 200
neurons which is chosen based on grid search in the set
10,20,50,100,150,200,300,500,1000. We minimize the binary
cross-entropy loss with a batch size of 64 and run for 10
epochs. Table VIII shows biLSTM performs best amongst all
the RNN variants with minimum entropic loss and highest
accuracy of 79.8%. As the obtained accuracy of RNN is not
very high in CPU, future work is required to optimize it further
before going for FPGA implementation. As a future work,
when the data scarcity is not a limitation, the classification
task can be effortlessly adapted to a regression task where a
sequence of voltages can predict precise pH of the solution
over a wide range.
D. Comparison of FPGA, MCU and CPU implementation
In this section we compare the FPGA, MCU and CPU
implementation of the various ML algorithms in terms of
three parameters, i.e., accuracy, speed and power consumption.
Here, FPGA implementation is on the PS+PL of the PYNQ-Z1
board, MCU implementation is only on the PYNQ-Z1 board
and CPU implementation is on the Intel Quad core processor.
1) Accuracy: Accuracy is measured in terms of perfor-
mance metrics, i.e., Mean Absolute Error (MAE), Mean
Squared Error (MSE) and Correlation (R2). For an accurate
model, MAE and MSE should be very low and R2should
be very high. We see that in Tables II and VII, V and VI
that the accuracy of all the three, the CPU, MCU and FPGA
implementation are nearly the same. FPGA has slightly lower
accuracy but that can be easily overcome by using more
number of bits and floating point number representation.

10
TABLE VII: Comparison of results for experiments on the Xilinx PYNQ-Z1 board(PS) and the Intel core CPU for temperature + temporal drift compensation.
Model Metrics for Xilinx PYNQ-Z1 Board(PS) Metrics for Intel(R) Core(TM) i5-8250U
CPU @ 1.6 GHz - Quad core
MAE MSE R2Time
(s)
Power
(W) MAE MSE R2Time
(s)
Power
(W)
LR 1.4217 3.5449 0.642554 0.0051 2.485 1.4217 3.5449 0.642554 0.0009 9.6
PR 0.0577 0.0220 0.997777 0.0751 2.743 0.0581 0.0220 0.997776 0.0069 11.6
DT 0.0057 0.0005 0.999943 0.0229 2.847 0.0057 0.0005 0.999950 0.0019 5.5
RF 0.0017 0.0003 0.999965 0.4405 2.768 0.0018 0.0003 0.999966 0.0419 6.5
MLP 0.0552 0.0151 0.998472 0.0994 2.599 0.0552 0.0151 0.998473 0.0049 12.3
SVR 0.0704 0.8175 0.991757 60.636 2.644 0.0705 0.0818 0.991753 0.9520 13.4
TABLE VIII: Comparison of results obtained for different
RNN on CPU for Temperature Drift Compensation.
RNN-model Loss Accuracy
LSTM 0.4135 79.20%
GRU 0.4061 79.00%
BiLSTM 0.4063 79.80%
BiGRU 0.486 79.20%
2) Speed: Speed refers to the time duration ML model takes
to predict the pH value. The lesser is the time taken, faster is
the speed. From Tables II and VII and V we observe that
the speed is much better for the CPU implementation in both
temperature and temperature+temporal compensation tasks as
compared to MCU implementation.It should be noted that the
FPGA implementation is faster than both in most cases. Hence,
FPGA helps in achieving hardware acceleration.
3) Power Consumption: Power is measured while the ML
models are running on the FPGA, MCU and the CPU. The
lesser is the power consumption, better is the model. Here, for
both the PS and PL, we measure the entire power consumption
by the PYNQ-Z1 board with the help of a USB power tester
as shown in Fig. 7, while for the CPU, we measure the total
power consumed by the CPU package, CPU cores , CPU
graphics and CPU DRAM with the help of the Open Hardware
Monitor application. It is important to note that the PYNQ-
Z1 board has many on-board peripherals such as audio/video,
USB, Ethernet, UART, CAN controllers, etc., which will not
be required for final FPGA deployment in an IoT or industrial
scenario for ISFETs, hence the power consumed by the ML
models solely on the FPGA will be much lesser than what
is given, i.e., the given power consumption can be treated
as worst case. However, for the CPU, we are measuring the
power consumed by the CPU itself and not other peripherals
of the computer, hence it is the best case. It can be seen
from II and VII that the the worst case power consumed
by FPGA implementation is much lesser than the best case
power consumption by CPU. Similarly, from Table V it is
seen that the FPGA implementation provides a lot of hardware
acceleration as compared to MCU or software implementation.
Additionally power consumption can also be measured using
Xilinx Power estimator or Xilinx Vivado Design Suite.
IoT and industrial scenarios such as biomedical applications,
environmental monitoring, agriculture, food industry, etc.,
where ISFETs are used may not require high speed but require
low power consumption and high accuracy. Hence FPGA
0
200
400
600
800
1000
1200
1400
LR PR DT RF MLP SVR
Temperature compensation Temperature+Temporal compnesation
IF
Score ML models
Fig. 13: IF score comparison of the various ML models for
both temperature and temperature+temporal compensation.
implementation is the best approach for such applications.
In this study, we used the PYNQ framework to implement
the algorithms on FPGA but designs implemented using these
are not optimised for performance parameters such as speed,
power consumption, area etc. Hence, customized RTL and/or
ASIC implementations would consume much less power and
would be preferred for eventual large-scale fabrication. It will
give better results than the results obtained in this study. Table
X summarises the pros and cons of both the implementations.
After concluding that the FPGA implementation is better than
CPU or MCU for deployment of ML model in IoT and
industrial application of ISFETs, the next step is to evaluate
the best ML model to be deployed on FPGA. This is discussed
in the next subsection.
E. Evaluation of ML models for FPGA and MCU hardware
for IoT deployment
As discussed previously, certain ML models such as RF
give very high accuracy whereas some ML models such as
LR consume very less power and time but give relatively
poorer accuracy and some models such as Decision Trees
(DT) give very moderate accuracy and consume moderate
power and time. Hence, choosing the optimum ML model
for implementation on FPGA/MCU needs further analysis. In
order to solve this problem, we define a new parameter called
Implementation Factor (IF) which gives weights to accuracy,
speed or time taken per-prediction and energy consumed per-
prediction to calculate a final score, which allows the ML
models to be compared. The weights are given according to
the scheme below :-
1) Accuracy: 33 % ( 11% - MAE, 11% - MSE , 11% R2)
2) Speed or Time taken per prediction : 33 %

11
TABLE IX: Final comparison of various ML algorithms based on the accuracy of prediction, time taken for prediction, and energy consumed per prediction.
The IF score gives the overall performance score on the basis of which random forests is best for implementation on FPGA platform for both temperature
and temperature+temporal compensation.
Model
Temperature Compensation Temperature + Temporal Compensation
Accuracy Time
(s)
Energy per
prediction
(mJ)
IF
Score
Accuracy Time
(s)
Energy per
prediction
(mJ)
IF
Score
MAE MSE R2MAE MSE R2
LR 0.234 1.237e-01 0.99121 0.004 9.921 117.22 1.4217 3.5449 0.642554 0.0051 12.817 89.91
PR 0.071 1.118e-02 0.99916 0.013 36.654 44.39 0.0577 0.0220 0.997777 0.0751 205.906 13.01
DT 0.058 6.713e-03 0.99952 0.023 63.698 37.66 0.0057 0.0005 0.999943 0.0229 65.349 235.33
RF** 0.007 8.947e-05 0.99999 0.272 743.599 1246.07 0.0017 0.0003 0.999965 0.4405 1219.228 378.85
MLP 0.025 9.809e-04 0.99993 0.035 88.908 129.74 0.0552 0.0151 0.998472 0.0994 258.366 13.96
SVR 0.074 1.060e-02 0.99925 73.878 196777.458 11.96 0.0704 0.8175 0.991757 60.636 160303.618 1.81
TABLE X: Overall comparison of FPGA and CPU implemen-
tation of ML models for ISFET IoT and Industrial implemen-
tation
Parameter
Parameter
requirement for
ISFET IoT and
Industrial
applications
FPGA
implementation
(PL
of
PYNQ-Z1
Board)
MCU
implementation
(PS of
PYNQ-Z1
Board)
CPU
implementation
Accuracy Essential 3= =
Speed Non-Essential
but helpful 3 7 3
Power Essential 3 3 7
3) Energy consumed per prediction : 33 %
The IF score for each ML model can be calculated using
the formula below:-
IF =0.11
MAE +0.11
MSE + 0.11 ×R2+0.33
T+0.33
E(8)
where, MAE, MSE and R2are the performance metrics
for accuracy of the ML model, T is the time taken by the
ML model per prediction in SI unit, i.e., seconds and E is
the energy consumed by the ML model per prediction in SI
unit, i.e., Joules. The higher is the IF score, better is the
ML model for implementation on FPGA/MCU, giving equal
weights to all the three parameters, i.e., accuracy, speed and
energy consumption. To the best of our knowledge, there is no
parameter defined in literature till now which considers all the
three factors: energy consumed, speed and accuracy to give a
single score to evaluate the best ML algorithm for FPGA/MCU
implementation, which necessitates the creation of new IF
parameter. Existing performance metrics for ML algorithms
consider only one of these metrics, for example, F score and
F1 score only gives information about the accuracy. Hence,
there is a need to define a score which accounts collectively
for all three factors. Moreover, the weights assigned to the
factors may change according to type of application. For
example, in bio-medical and research applications, accuracy
will have more weight while for long term IoT deployment
such as environmental monitoring, power consumption will
have more weight. In this study, as a general case, we have
given equal weights to all the three factors. On the basis of
IF score calculation, we see from Table IX that RF has the
highest IF for both temperature and temperature + temporal
compensation. This is also graphically shown in Fig. 13.
F. Advantage of drift compensation using ML implemented on
FPGA/MCU platforms
As compared to conventional drift compensation methods
in ISFETs, implementing ML on FPGA/MCUs has several
advantages. Drift compensation in ISFETs may be done by
other compensation techniques such as ISFET sensor design
or simple modeling. However, the temporal drift compensation
is a complex problem, where the sensor needs to compensate
for the drift temporally for various pH values. In order to
learn the sensor behavior, ML models are suitable to capture
the drift patterns in the acidic and basic pH solutions, and
predict more accurate measurements in comparison to simple
modeling techniques. Moreover, the ML models developed
in this work are designed to obtain early estimation of pH
even before the VRef stabilizes. Thus, its prediction can be
much faster. We have discussed pros and cons of using ML
models implemented on FPGA platforms for sensor drift com-
pensation in comparison with drift compensation by sensor
design or using simple modeling, as listed in Table XI. Drift
compensation using ML implemented on FPGA platforms is
suitable for Industrial IoT applications, as it is re-configurable
and cheaper compared to other techniques.
VI. CONCLUSIONS
In this work, we present the modeling of non-idealities in
Si3N4-gate ISFET due to temperature and temporal variations
using SPICE and the drift compensation using state-of-the-
art ML models which have been implemented on FPGA.
The SPICE macromodel is used as a subcircuit block in a
CVCC readout topology to generate temperature and temporal
drift data for a wide temperature (15-65 oC) and pH (0-14)
range. The data is used to train state-of-the-art ML models
to compensate the temperature and temporal drift and it was
found that Random Forest (RF) technique outperforms other
ML models. Seeing promising results on CPU, the ML models
were implemented in the PYNQ Z1 board that houses both
an ARM processor and an FPGA. It is a power and memory
constrained environment suitable for IoT applications. We used
hardware-software co-design based tool, PYNQ framework
to implement the design but customized RTL and/or ASIC
implementations would consume much less power and would
be preferred for eventual large-scale fabrication. We also
propose a novel Implementation Factor(IF) which gives equal
weights to accuracy, speed and energy consumption while
running on FPGA and assigns the ML models an overall score.
A higher IF score indicates that the ML model is better suited

12
TABLE XI: Comparison of drift compensation by ML implemented on platforms like FPGA/MCUs vs. other drift compensation
techniques
Comparison
Criteria Compensation by sensor design Compensation using simple modelling Compensation using post data processing
techniques like ML on platforms like FPGA
Hardware
implementation
Very complex as precise operations need to be performed for adjusting
appropriate doping to compensate the temporal drift at
fabrication level by ion-implantation. Also, it is highly vulnerable to
process variation which may adversely impact the compensation [51].
Difficult to implement the modeling based compensation in
hardware as modeling software like SPICE and MATLAB
use complex mathematical tools and equations which
are difficult to be implemented in IoT Embedded systems [68, 69].
ML models can be easily implemented in
external hardware processing chips like
FPGAs and trained to learn the drift
patterns using the well-established ML models.
Size No external chip based compensation
required, hence overall system is small in size.
System size increases due to involvement
of large and bulky computing systems. System size slightly increases due to an additional chip.
Cost Very costly as there has to be customization at the fabrication level. Less costly Less costly
Time Fast, as there is compensation at the point of sensing. Slow, as the data will have to be transferred to
computing systems and calculated by complex softwares. Fast, as it can have high level of parallelism.
Power Not much power consumption. High power consumption by computing systems. Low power consumption.
Overall IoT
deployment scenario
Feasible for Real-Time IoT Applications but
will be very costly and cannot be reconfigured.
Implementation is challenging for real-time IoT
applications and it may not be reconfigurable.
Feasible for real-time IoT applications and
it will be cheap and reconfigurable
for FPGA implementation. Based on the evaluation, we find
that RF has a higher IF score for both temperature and tem-
perature+temporal drift compensation in both the PS and PL
implementations on the PYNQ-Z1 board. This paper presents a
promising application of ML in drift compensation of ISFET-
based pH sensor, which has a huge scope for further research
to improve the robustness of smart chemical sensors, which
can be deployed for various Industrial IoT applications such as
biomedical diagnosis, environmental monitoring, agriculture,
wearable sensing, food industry and horticulture.
ACKNOWLEDGMENT
The authors are thankful to Director, CSIR-CEERI, Pilani
for the generous support. They would like to thank all the
scientific and technical staff of CSIR-CEERI, Pilani for the
discussions and technical support. Financial support from
CSIR, New Delhi is gratefully acknowledged.
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