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This paper presents the analytical solution in time domain for the ideal single-ended class-E power amplifier (PA). Based on the analytical solution a coherent noniterative procedure for choosing the circuit parameters is presented for class-E PA's with arbitrary duty-cycle and finite dc-feed inductance (e.g., continuously ranging from class-E with small finite drain inductance to class-E with RF choke). The obtained analysis results link all known class-E PA design equations as well as presenting new design equations. The result of the analysis gives more degrees of freedom to designers in their design and optimization by further expanding the design space of class-E PA.

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... In the nominal operation, S W satisfies the zero voltage switching (ZVS) and zero voltage derivative switching (ZVDS) conditions, which reduces the switching losses [9]. This ideal soft-switching behavior is shown in Figure 2. The design of the class-E PA has been explored in several works [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24]. From the point of view of the L SH element, the class-E PA can be divided into two topologies: class-E PA with RF choke [9][10][11][12] and class-E PA with finite DC-feed inductance (FDI) [13][14][15][16][17][18][19][20][21][22][23][24]. ...

... This ideal soft-switching behavior is shown in Figure 2. The design of the class-E PA has been explored in several works [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24]. From the point of view of the L SH element, the class-E PA can be divided into two topologies: class-E PA with RF choke [9][10][11][12] and class-E PA with finite DC-feed inductance (FDI) [13][14][15][16][17][18][19][20][21][22][23][24]. The model of a class-E PA with RF choke assumes a DC input current, which simplifies the mathematical analysis and allows its design through simple analytical equations [9,12]. ...

... The model of a class-E PA with RF choke assumes a DC input current, which simplifies the mathematical analysis and allows its design through simple analytical equations [9,12]. In contrast, the class-E PA with FDI must consider the current waveform in the circuit analysis, which increases the complexity of the design [19,23]. However, the finite feed inductance increases the designer's degrees of freedom. ...

This paper explores the design of a Class-E amplifier with finite DC-feed inductance using three tuning methods. Furthermore, this work quantifies the impacts of the tuning process (referred to in this paper as the tuning effect) on the main figures of merit (FoMs) of this amplifier. The tuning goals were to guarantee two conditions: zero voltage and zero voltage derivative switching (i.e., soft-switching tuning). To the best of the authors’ knowledge, systematic tuning methods have not been analyzed before for this amplifier topology. Two of them are based on the iterative component tuning process, and they have been explored previously in the design of the conventional class-E amplifier with an RF choke inductance. The last tuning method explores the simultaneous adjustment of the control signal period and one amplifier capacitor. The analyzed tuning methods were validated by extensive simulations of case studies, which were designed following the power specifications of the Qi standard. In 100% and 96% of the case studies, zero voltage switching (ZVS) and zero-derivative voltage switching (ZDS) were achieved, respectively. Furthermore, we identified an unexpected behavior in the tuning process (referred to in this paper as the turning point), which consisted of a change of the expected trend of the soft-switching (i.e., ZVS and ZDS) point, and it occurred in 21% of the case studies. When this behavior occurred and converged to at least ZVS, the tuning process required more iterations and a large number of tuning variables. Additionally, after the tuning process, the total harmonic distortion and output power capacity were improved (i.e., in 78% and 61% of the case studies, respectively), whereas the output power, drain and added power efficiencies deteriorated (i.e., in 83%, 61% and 65% of the case studies, respectively) in the overall case studies. However, we could not identify an improvement in the overall FoMs related to the soft-switching tuning. Furthermore, the tuning impact was significant and produced some improvements and some deleterious effects for the FoMs in each case study, without a clear trend by FoMs or by tuning method. Therefore, the amplifier designer may choose the more favorable tuning method and the related FoM trade-offs for the required design specifications.

... In general, the PA designer analyzes the DC-feed inductance (i.e., L SH in Figure 1) as an RF-choke or a finite value and designs the overall circuit to guarantee Zero Voltage Switching (ZVS) and Zero Voltage Derivative Switching (ZVDS) conditions. When the value of L SH is considered in the PA model, the designer could explore the PA design with more flexibility [6][7][8], a feature that is particularly useful in applications with many constraints as the integrated PA implementations [7,9]. ...

... In general, the models of the Class-E PA with Finite DC-Feed Inductance (FDI) are more complex than the Class-E with RF-choke models because they considered the feed current behavior in the circuit analysis [9]. Furthermore, the first analytical design equations reported in [6] appeared only 43 years after the topology was born in 1964 [10]. These equations are based on an ideal model of the Class-E PA with FDI, which considers a Class-E amplifier with ideal components (e.g., inductors and capacitors with infinite quality factor), a switch with zero rise and fall commutation times, zero on-resistance, and infinite off-resistance, and an infinite loaded quality factor of the output resonant circuit [6,8,11]. ...

... Furthermore, the first analytical design equations reported in [6] appeared only 43 years after the topology was born in 1964 [10]. These equations are based on an ideal model of the Class-E PA with FDI, which considers a Class-E amplifier with ideal components (e.g., inductors and capacitors with infinite quality factor), a switch with zero rise and fall commutation times, zero on-resistance, and infinite off-resistance, and an infinite loaded quality factor of the output resonant circuit [6,8,11]. Moreover, these equations allow finding the PA circuit components values for ZVS and ZDVS with an arbitrary duty-cycle and finite dc-feed inductance (e.g., continuously ranging from Class-E with small finite drain inductance to Class-E with RF choke) without an iterative procedure [8,12,13]. ...

This paper proposes an analytical expression set to determine the maximum values of
currents and voltages in the Class-E Power Amplifier (PA) with Finite DC-Feed Inductance (FDI) under the following assumptions—ideal components (e.g., inductors and capacitors with infinite quality factor), a switch with zero rise and fall commutation times, zero on-resistance, and infinite off-resistance, and an infinite loaded quality factor of the output resonant circuit. The developed expressions are the average supply current, the RMS (Root Mean Square) current through the DCfeed inductance, the peak voltage and current in the switch, the RMS current through the switch, the peak voltages of the output resonant circuit, and the peak voltage and current in the PA load. These equations were obtained from the circuit analysis of this ideal amplifier and curve-fitting tools. Furthermore, the proposed expressions are a useful tool to estimate the maximum ratings of the amplifier components. The accuracy of the expressions was analyzed by the circuit simulation of twelve ideal amplifiers, which were designed to meet a wide spectrum of application scenarios. The resulting Mean Absolute Percentage Error (MAPE) of the maximum-rating constraints estimation was 2.64%.

... The Class-E adopts zero voltage switching (ZVS) and zero voltage derivative switching (ZVDS) conditions to obtain "soft switching" operation that minimizes power dissipation within the transistor during the off-to-on transition. The analysis of the PAs employing ideal RF choke (infinite inductance) and finite dc-feed inductance are treated in [4,[17][18][19] and [1,5,26], respectively. Furthermore, the effects of the transistor's nonlinear output capacitance on the Class-E PA performance were investigated in [3,20,21]. ...

This paper presents the theoretical analysis of the Class-E/F3 power amplifier (PA) with nonlinear shunt capacitor at different grading coefficient (m), for both optimum (i.e., ZVS and ZVDS) and suboptimum (i.e., ZVS and non-ZVDS) operations. The effects that the grading coefficient has on the load network parameters, maximum operating frequency, and the peak switch voltage and current are investigated in details for m = 0 up to m = 0.8. Three design examples are given to explain the design procedure, and two circuit prototypes were built using power MOSFETs with m = 0.3 and m = 0.5 to validate the theory. The constructed PAs delivered an output power of 3.5 W/2.55 W and a drain efficiency of 92.3%/92% at an operating frequency of 3.8/3.85 MHz, respectively.

... The waveform shaping can be realized in different classes of PA operations. However, most of the popular classes, e.g., class-E [33] and class-F, suffer from a narrow bandwidth as the harmonic impedances required for the desired voltage and current waveforms can only be achieved at a single frequency. The continuous modes of operation provide extended design spaces for the harmonic impedances, which can be used to realize high-efficiency broadband PAs [5], [21], [22], [34]. ...

In this article, we propose a broadband fully integrated power amplifier (PA) using a waveform shaping harmonic matching network. A comprehensive theory is developed for the proposed multi-resonance harmonic matching network to derive design criteria for achieving wide bandwidth, low insertion loss, and optimum load impedances in the second- and third-harmonic frequency bands. Furthermore, it is shown that this network can be realized using a lower total inductance compared to a standard bandpass network which is an important feature in reducing chip area and fabrication cost. A fully integrated PA prototype is implemented using a 250-nm GaN-on-SiC process with 28-V supply. The PA provides 33.9-36.1,dBm output power (at 2-3,dB gain compression), 42-51% drain efficiency (DE), 38-48% power-added efficiency (PAE), and 10-12.2,dB power gain, across 4.0-6.0,GHz. The output-power 1-dB bandwidth is 3.6-5.6,GHz (44.5%). For a 64-QAM signal with 8,dB peak-to-average power ratio (PAPR) at 5.0,GHz, the PA can provide 30.2,dBm average output power and 32% average PAE with RMS error vector magnitude (EVM) of -34.0/-32.4/-28.4,dB (2.0/2.4/3.8%) for 50/100/200,MHz modulation bandwidth, without using digital predistortion (DPD). The maximum average output power and average PAE, under the linearity constraint EVM < -28,dB, are respectively 32.1/32.0/30.2,dBm and 39/38/32%, for modulation bandwidth of 50/100/200 MHz.

... Class-E PAs can be designed using a switch and lumped components with a high quality-factor to achieve a high efficiency. For classical approaches, accurate operation has been achieved by adding an inductive element at a fixed resistive load [32]- [33]. To achieve a higher output power, an impedance matching network based on an L-C or C-L-C network can be used to provide the optimum load impedance to the switch. ...

This paper presents a high-efficiency wireless power transfer (WPT) system that can charge multiple receivers (Rx’s) of various types. For system analysis, the transmitted power and received power levels are derived using the parameters of the resonators based on electro-magnetic (EM) resonance. Using the analysis results, the power customized resonator (PCR) not only for deriving sufficient output power from the transmitter (Tx) but also for appropriately distributing the received power to the various and multiple Rx’s is proposed. In addition to the PCR, the Tx unit is designed to work as a load-dependent voltage source using a differential Class-E power amplifier (PA) through a wide range of load impedances. Therefore, the Tx can naturally adapt to the required Tx power levels with a high efficiency corresponding to various Rx configurations without additional tunable circuits or adaptive control schemes. The WPT system, including the load-dependent voltage source for the Tx, full-bridge rectifiers for the Rx’s, and the proposed PCR, was designed for the 6.78 MHz frequency band. The proposed system is validated for use with multiple mobile devices by conducting experiments with nine charging cases using three types of Rx’s. For all cases, high system efficiencies of 70.7-85.5% were maintained over received power levels of 8.6-45.7Wat a charging distance of 30 mm, and each of the three types of Rx’s were experimentally verified to receive sufficient power.

... With respect to Figure 2.16 the required capacitor and reactance values can be calculated as a function of duty cycle and of the series resonator's quality factor [48]. Other circuit configuration have been presented in the literature to achieve class-E operation [49,50]. ...

High data-rate communication systems require the transmission of radio frequency signals which
are modulated in both amplitude and phase, presenting peak power envelope swings exceeding ten
times their average power level. In wireless communication systems, it is a significant challenge
to transmit high peak-to-average-power-ratios signals whilst maintaining a high degree of energy
efficiency. However, it is fundamental from an environmental and economical point of view.
Within radio hardware, power amplifier modules are the most power hungry elements, and it is
therefore of utmost importance to develop modules capable of maintaining high levels of efficiency
over large output power dynamic ranges. A common approach to preserve the power amplifier
efficiency is to use load modulated systems. This thesis investigates circuit level approaches
to push the efficiency of load-modulated architectures to their fundamental limits, focusing on
the power amplifier harmonic terminations. A theory is proposed to determine the intrinsic
optimal load modulation of harmonically tuned power amplifiers within a continuous mode of
operation using closed form equations. The theory is validated by simulations and load-pull
measurements. The impact of the harmonic tuning on highly saturated Gallium Nitride (GaN)
power amplifiers is investigated experimentally and found to be significant, with up to 3 dB
fundamental output power and 50 percentage points efficiency variation on a prototype at 900
MHz. The outphasing load modulated technique was examined further due to its high efficiency
enhancement potential that arises from its dual drive nature. It was observed that the optimal
harmonic terminations vary for different output power levels. A design methodology was then
developed to simultaneously maximise the back off efficiency and power utilisation for a given
device. A 26 Watt 900 MHz GaN outphasing amplifier is presented, based on the proposed
methodology, with a saturated power added efficiency of 76% and exceeding 58% over 8 dB of
output power back-off.

In this chapter, the switchmode second-order Class-E configurations with one capacitor and one inductor and generalized load network including the finite DC-feed inductance, shunt capacitance, and series reactance are discussed and analyzed. The results of the Fourier analysis and derivation of the equations governing the operation in an idealized operation mode are presented. Based on these equations, the required voltage and current waveforms and load network parameters are determined for both general case and particular circuits, corresponding to the subharmonic Class-E, parallel-circuit Class-E, and even-harmonic Class-E modes. The effect of the device output bondwire inductance on the optimum circuit parameters is demonstrated. To minimize an effect of the load variation on efficiency, a Class-E with inductive impedance inverter is analyzed. The possibilities to realizing a parallel-circuit Class-E approximation with transmission lines are shown and discussed. The operating power gain achieved with a parallel-circuit Class-E power amplifier is evaluated and compared with the operating power gain of a conventional Class-B power amplifier. The circuit design examples and practical implementations of the Class-E power amplifiers with finite DC-feed inductance using a CMOS technology are given.

This paper presents a Class-E Power Amplifier (PA) design procedure for operation at mm-Wave frequencies, which accounts for the loss of passive components, ON-resistance (Ron) of the transistor, and its breakdown voltage (VBr). The quality factor of inductors is modeled with equivalent resistors and integrated into time-domain equations for the first time. The proposed procedure is examined for the design of a 24GHz Class-E PA in 130nm CMOS technology and compared with former best-known design recipes in the same technology node. Besides, a simplified design technique is introduced based on Ron-Cout (Cout is the transistor output capacitance) curves of the transistor versus its width, obtained by Harmonic Balance (HB) simulation. By the proposed method, the Figure of Merit (FoM) of the designed PA, including a combination of the output power, efficiency, and maximum drain voltage, is improved significantly (52%) compared to the other procedure outcomes in the literature.

A high-efficiency CMOS wireless battery charging system with battery voltage tracking and global power control through the proposed pulsed load-shift keying (PLSK) backward data telemetry technique is designed. The power transmitted from the adaptively controlled power transmitter (ACPT) for battery charging is automatically adjusted with the battery voltage tracking through the PLSK backward data telemetry. Therefore, the generated rectifier output voltage is only slightly larger than battery voltage and tracks with battery voltage during the charging time of linear battery charger. Experimental result shows that the average receiver efficiency with battery voltage tracking from 3.3 V to 4.2 V and global power control is 90.9% which is 14.9% higher than that without these techniques and 28.9% higher than that in the prior work. The measured power loss is 8 mW (4.44%) under the maximum output power of 180 mW and with the PLSK data rate of 211 kbps. The proposed wireless battery charging system with a single pair of coils at the resonant frequency of 13.56 MHz is suitable for the applications of implantable medical devices.

T he switched-mode second-order Class E amplifier configuration can be designed with a generalized load network that includes the shunt capacitance, series bondwire inductance, finite DC feed inductance and series L 0 C 0 circuit. Based on theoretical analysis, this article examines the required voltage and current waveforms, and circuit parameters are determined for particular circuits corresponding to: Class E with shunt capacitance, even harmonic Class E, parallel-circuit Class E, and Class E with quarter wave transmission line. The effect of the device output bondwire induc-tance on the optimum load network parameters is shown. The operating power gain achieved with the parallel-circuit Class E power amplifier is evaluated and compared with the operating power gain of the conventional Class B power amplifier. A load network implementation with matching circuit using transmission line elements is considered with exact circuit parameters. This article is generally complete, but is condensed from two longer papers that provide more in-depth discussion and development of the design equations and their implementations. Those papers, as well as this article , are available for downloading at this mag-azine's web site.

In literature, it is widely accepted that the design of class-E power amplifier (PA) with finite dc feed inductance requires a long iterative solution procedure. To avoid such iterative solution methods, analytical design equations should be known. The problem associated with the finite dc feed inductance class-E PA is usually ascribed to the fact that the circuit element values are transcendental functions of the input parameters which is assumed to prevent the derivation of exact or fully analytical design equations. Using a proper analytical method, exact design solutions for class-E PA with any inductor value can however be derived. A mathematically exact analysis of the idealized class-E PA with finite dc feed inductance has been done and analytical expressions showing the relation between the circuit elements and the input parameters are found. These analytical expressions have been simplified to obtain explicit, relatively simple design equations. In this paper, it presents these relatively simple design equations. Using these design equations, class-E PA with finite dc feed inductance can be designed without iterative design procedures. The current paper discusses these simplified versions of the exact solution of general class-E PA with finite dc feed inductance, and discusses some implications of these design equations

This paper compares two types of class E power amplifier and studies their applicability in an EER (envelope elimination and restoration) transmitter. In EER applications one of the main concerns is the modulation bandwidth of the supply voltage and DC bias current. It is shown here that a recently proposed parallel tuned class E dimensioning principle results in much wider modulation bandwidth due to lower bias inductance of the transistor, so that a given transistor can be used at higher frequency, or its response can be linearized by adding a parallel linear capacitance to the drain node. The findings are verified by behavioural simulation.

Modern transmitters usually have to amplify and transmit complex communication signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B or AB) are usually employed as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio. The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper presents solutions for the power supply that acts as the envelope amplifier and class E amplifier that is used as a nonlinear amplifier. The envelope amplifier is implemented as a multilevel converter in series with a linear regulator and can provide up to 100 W of peak power and reproduce sine wave of 2 MHz, while the implemented class E amplifier operates at 120 MHz with an efficiency near to 90%. The envelope amplifier and class E amplifier have been integrated in order to implement the Kahn's technique transmitter and series of experiments have been conducted in order to characterize the implemented transmitter.

An analytical expression for the harmonic distortion and power efficiency for class-E power amplifiers is derived. By considering the nonideal behavior of the switching device, we explore the dependence of power efficiency on the quality factor of the resonant circuit, as well as the current decay angle of the active device. The result is very useful since it predicts the power efficiency in terms of circuit parameters. The analytical expression is supported by good agreement with circuit simulations.

In this paper, a new circuit configuration of switched-mode tuned
Class E power amplifiers with load network consisting of a parallel
capacitance, a parallel inductance and a series resonant circuit tuned
on the fundamental is defined using a detailed analytical description
with a complete set of the design equations. The ideal collector voltage
and current waveforms demonstrate a possibility of 100-percent
efficiency. The circuit schematic of a parallel-circuit Class E power
amplifier can be realized with lumped or transmission-line elements. Two
examples of high power LDMOSFET and low-voltage HBT power amplifiers,
utilizing a parallel-circuit Class E circuit configuration, are
presented

A simple and efficient procedure relying on a state-space description of the circuit to evaluate boundary conditions in a class-E, switching-mode, RF amplifier is described. The amplifier model used includes the on and off resistances of the active device switch. The state-space description is converted to a discrete-time representation which allows incorporating the problem into the framework of linear algebraic equations. Details on determining boundary conditions and a simple but efficient program to calculate them are provided

A method for designing an amplifier that does not need an RF choke coil is proposed. This is accomplished by adding a shunt capacitor to a class E amplifier with a shunt inductor; this creates class E switching where higher harmonics are induced in the inductor-fed input waveform. A design method is derived by performing an analysis of the circuit assuming load current is sinusoidal. Because the switch current is smaller than that of conventional class E amplifiers (with the same output power), the losses due to the series saturation resistance of the switch device are greatly reduced for the proposed amplifier. A 96-percent RF conversion efficiency for 2 W of output power was obtained in experiments using a 2-MHz switch using the proposed design.

The Class E power amplifier offers a means to increase the battery efficiency in wireless terminals. The losses can be taken into account by solving the drain waveforms for a switch having a non-zero on resistance. In this paper a new analysis formulation is presented in which the input values (P<sub>OUT</sub>, V<sub>DD</sub> and R<sub>ON</sub>) are combined into one parameter k. Then, the efficiency and optimum component values for a lossy Class E amplifier can be solved with relatively simple calculations. The analysis reveals that there is a maximum value for switch losses that can be accepted in order to operate in the Class E mode. The results of the analysis are presented in plots providing initial component values for practical Class E power amplifier design. The validation simulation results show excellent match with the calculated values.

Typescript. Thesis (Ph. D.)--Oregon State University, 1965. Includes bibliographical references (leaf 61).