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A 28 GHz front-end for phased array receivers in 180 nm CMOS process
Abstract
In this paper, a receiver front-end in 180 nm CMOS operating at 28 GHz is presented. The receiver front-end consists of a cascade low-noise amplifier (LNA) with two gain stages and a current-bleeding active mixer with tunable loads. By embedding a quadrature coupler into the mixer, the circuit delivers in-phase and quadrature outputs. The proposed architecture avoids the traditional I/Q implementation by process-sensitive quadrature voltage control oscillators (VCOs) with larger power consumption at high frequencies. The adopted transformers and inductors are optimized by a momentum tool. The simulated results show that the receiver front-end provides an NF of 5.48 dB, a conversion gain of 18.1 dB, and an IIP3 around −8.5 dBm at 28 GHz. The circuit dissipates 17.3 mW under a 1.8 V supply.
... In [11], Hajiri et al. proposed a new three stages high gain low power consumption, using the current reuse approach. In [12], design of a new receiver front-end which consists of a modified cascade LNA with two gain stages using a negative feedback structure and a current-bleeding active mixer with tunable loads has been presented. ...
In this paper a novel tuneable LNA is presented. This LNA is designed with two separated structures which both of them utilize noise cancellation technique and some other approaches such as gain boosting and T-transformer feedback. Each proposed LNA has two stages that the first stage is designed based on noise cancellation and the second stage uses common gate structure. The proposed LNA type (A) utilises the switched capacitance in the first stage to tune the centre frequency and a gain boosting in the second stage to increase the gain. The second proposed LNA type (B) has implemented the parallel networks to decrease the change in the gain values of the LNA in different channels. The T-transformer approach is used in each parallel network to decrease the inductors value and improve the input matching. In the second stage, the negative feedback is also employed to control the bandwidth. The proposed LNA is simulated in ADS software with TSMC 130 nm CMOS technology and the layout is designed by Cadence. The LNA type (A) has 22.7 dB gain in 28.8 GHz and the noise figure of 2 dB. The IIP3 for this LNA is 0 dBm in 25.42 GHZ. For the LNA type (B), the gain and noise figure standard deviations are 0.25 and 0.057 respectively which shows minimum variations by frequency tuning. For this LNA, the maximum gain is 20.5 dB and the noise figure is 2 dB at 31.42 GHz. Finally the performances of the proposed LNAs have been compared with those of LNAs which have been recently published.
In this paper, a vector‐sum phase shifter (VSPS) integrated with a wideband high‐gain low‐noise amplifier (LNA) for Ka‐band phased‐array receivers is presented. The digitally controlled VSPS based on the RF phase shifting architecture consists of a modified I/Q signal generator with additional inductor resonance and a programmable variable gain amplifier (VGA) based on Four 3 × 4 transistor arrays. Besides the reduced parasitic effect of the I/Q signal generator, an Equidistant Contraction Technology (ECT) is used in the VGA, to maintain higher phase shift accuracy of the VSPS. A multistage LNA with series inductor peaking is adopted to fulfill the flat wideband gain, where LC resonance networks are used as interstage matching to compensate for gain roll‐off at a higher frequency. Based on simulations in 65 nm CMOS technology, the presented LNA‐Phase shifter has achieved an average NF of 3.24–3.66 dB, and an average gain of 13.1–23.6 dB. Moreover, an RMS phase error of 1.1–12.6°, an RMS gain error of 4.2–5.6 dB, and an RMS magnitude error of 2.1–2.8 dB are maintained across 27–40 GHz, with a 360° phase shift coverage in steps of approximately 2.8125°. The chip consumes 16.83 mW from a 1.2 V supply voltage, and the occupied area is 0.65 mm ² .
In this paper, a mixer-first receiver frontend with dual-feedback baseband is proposed. The negative resistive and positive capacitive feedback paths are both applied to single-stage inverter-based operational transconductance amplifier (OTA) with fewer poles, to cover a wide BB frequency range. The [Formula: see text]-path filtering at the RF side and second-order filtering at the BB side inhibit out-of-band blocker interferences. The receiver frontend is designed in 65 nm CMOS. Simulation results display an NF of 2.1 dB across 306 MHz IF bandwidth, and a maximum gain of 33 dB from 1 to 3 GHz LO frequency range. The in-band and out-of-band IIP3 are −13 and 16 dBm, respectively. The receiver core draws 40 mW at 1 GHz LO frequency.
As the Bluetooth devices for the internet of things require extremely low-power dissipation to maintain longer battery life, a low-noise amplifier (LNA) as the main power-consuming part in the circuit needs more current-efficient topologies on power saving. This paper proposes a low-noise transconductance amplifier that combines the techniques of passive impendence transformation, [Formula: see text]-boosting technique, and current reuse, leading to a low power under the 1.2 V power supply. The transformer-based [Formula: see text]-boosted structure is applied in the four-transistor-stacked current-reuse topology leading to a [Formula: see text] power saving. The proposed LNA simulated in 65 nm CMOS shows the NF of 3.3 dB and the IIP3 of −8 dBm, respectively, while dissipating 87 [Formula: see text]W dc power. Compared to the previous low-power LNA, this design has fairly low-power consumption and low NF while other performance metrics remain competitive.
In this paper, a wideband receiver front-end including the flexible reconfigurable main and auxiliary paths is proposed. Therein, the main path has the low-noise advantage thanks to the low-noise transconductance amplifier (LNTA) preceding the mixer and baseband. Meanwhile, by utilizing a mixer-first structure, the auxiliary path renders a high in-band and out-of-band linearity. Furthermore, an inductor resonance structure is also designed to mitigate the baseband noise crosstalk issue which is disclosed by a charging/discharging mechanism via the tail capacitance of passive mixers. Both of the receiving paths have shared a common baseband circuit while loading a commonly-shared 25% duty-cycle LO source generator. Simulation results by a 180 nm CMOS have demonstrated that the main path provides a low noise figure (NF) of 2.7 dB, while the auxiliary path obtains the in-band and out-of-band IIP3 of 9.2 and 21 dBm under typical LO excitation frequency of [Formula: see text] GHz. The power consumption of the main path of the dual-path front-end is 57 mW and that of the auxiliary path is 26 mW under a supply voltage of 1.8 V.
Relationship between matter and energy transport has always been one of the key issues that researchers have been searching for in statistical physics and complexity science. In many transport phenomena, the active transport with zero or even no external force in life activities has attracted extensive attention of scholars. As a special kind of active particles, active Brownian particles have received the attention of physicists and biophysicists. These active particles are natural or artificially designed particles, whose scale is in the order of micrometer or nanometer. Different from the traditional passive Brownian particles driven by the equilibrium heat wave generated by the random collision of the surrounding fluid molecules, active Brownian particles can extract energy from their own environment to drive their own motion. Here, directional transport process of active particles in the two-dimensional asymmetric ratchet potential field is analyzed. Both the overdamped medium and the critically damped one are emphasized. Langevin equations with inertia term are introduced to describe the impacts of the self-driven force, friction coefficient, etc. on the directional motion. Then, the average particle speed is found. Thereafter, the relationships between the speed and critical parameters like self-driven force, friction coefficient, etc. are obtained. Two different dynamical domination mechanisms are found, which are expressed as the random collision domination and the self-driven force domination, respectively. Furthermore, the random collision domination is found to correspond to the much higher peak of the two-dimensional asymmetric Brownian rachet potential field, while the self-driven force domination is found to correspond to the much lower peak of the introduced potential. The study will be helpful for discovering the stochastic thermodynamics mechanisms in nonlinear dynamics and nonlinear properties of such multibody interaction system in statistical physics and complex system science.
In this paper, a secure and fast chaotic image encryption scheme with simultaneous permutation-diffusion operation is proposed. We combine permutation and diffusion processes into a whole, namely, simultaneous permutation and diffusion operation (SPDO). This can solve the problem of traditional encryption scheme in which the permutation and diffusion are two independent processes, that leads attackers to crack the two processes separately. In SPDO, the initial value of the current Sine-Sine chaotic map is related to the secret keys and the previous encrypted pixels’ values. In this case, the proposed scheme can generate dynamic key streams and indexes that are related to plaintext, which improves the sensitivity to plaintext for the encryption scheme. In addition, the pixel values are processed by row and column (row-level and column-level) during the encryption procedure. Thus, the proposed scheme presents lower time complexity and faster running speed compared with bit-level or pixel-level image encryption schemes, which makes the proposed scheme be conducive to the batch transmission and real-time transmission of digital images. The simulation results and security analysis show that our scheme can resist common attacks, such as statistical attack, differential attack, chosen plaintext attack and other comprehensive attacks.
The need for the high‐speed analogue‐to‐digital converters demands the use of regenerative comparators. The strong positive feedback present in the regenerative comparators helps the comparator to work efficiently at the high‐speed operations. This work proposes a low power auxiliary circuit to improve the high‐frequency performance of the comparator. The proposed architecture along with the conventional comparators is simulated in 65‐nm complementary metal oxide semiconductor (CMOS) technology with a supply voltage of 0.9 V. The maximum operating frequency of the proposed comparator is 6.25 GHz for a differential input voltage of 1 mV.
Recently, a plaintext-related image encryption scheme based on a hyper-chaotic system has been proposed by Li
et al
. In their encryption scheme, the permutation process is related to the sum of plaintext pixel values, and the diffusion process is related to the values of nine special positions in the permuted image. This can resist the existing chosen plaintext attack due to the ever-changing permutation matrix and diffusion matrix when the plaintext is changed. Here, we show that Li’s encryption scheme contains two vulnerabilities. First, the gray values of the nine specific pixels do not change during diffusion. Second, the permutation process is reversible. Therefore, the diffusion process can be attacked and the permuted image can be obtained by constructing a special image, where the nine special position values in the special image’s permuted image are the same as those in the cipher image. Then, if the obtained permuted image is chosen as plaintext, we can get its permuted image by attacking the diffusion process. Since the permutation process is reversible, the permuted image is the original plaintext image. In addition, some improvements for Li’s encryption scheme are provided to enhance the security.
Low-power, high-speed dynamic comparators are highly desirable in the design of high-speed analog-to-digital converters (ADC) and digital I/O circuits. Most dynamic comparators use a pair of cross-coupled inverters as the latching stage, which provides a strong positive feedback, to accelerate the comparison and reduce the static power consumption. The delay of the comparator is mainly determined by the total effective transconductance of the latching stage. The delay not only limits the maximum operating frequency but also extends the period of the metastable state of the latching stage; hence, it increases the energy consumption. However, at the beginning of the comparison phase, the conventional latching stage has two transistors with zero gate-to-source voltage, which degrade the total effective transconductance of the latching stage. In this paper, a novel low-power, high-speed dynamic comparator with a new latching stage is presented. The proposed latching stage uses separated gate-biasing cross-coupled transistors instead of the conventional cross-coupled inverter structure. The simple proposed latching stage improves its effective total transconductance at the beginning of the comparison phase, which leads to a much faster comparison and lower energy consumption. The comparator is analyzed and compared to its prior type in terms of delay and power consumption via simulations and measurements. The experimental results demonstrate that the proposed comparator operates from a 1.2-V supply and consumes 110 fJ energy per comparison, with sampling speeds up to 2 GS/s.
Proposing realistic hybrid traffic flow model is a promising and hot topic in the area of fluid mechanics and nonlinear dynamics, since they can take advantages of combining dynamical properties of each individual vehicle and macroscopic characteristics of the global system. In this paper, different from the previous work, we propose a hybrid traffic flow model considering the dynamical competition between ramps and main roads. Afterwards, the dynamical control equations of the proposed system are established. Then, by means of performing finite difference analyses, nonlinear dynamical characteristics and specific properties of the proposed system are investigated. Evolvement laws of characteristic order parameters of the proposed traffic flow system are obtained by analyzing the change of density, velocity and current in various circumstances. Moreover, matrices of partition coefficient are employed into the proposed traffic network composed of a main road and varied ramps. Additionally, linear and nonlinear stability analyses are considered in different phase spaces. Therefore, the robustness of the proposed system is tested by both linear and nonlinear dynamics. Our work will be helpful to understand mesoscopic dynamical behaviors of each individual vehicle and inner interactions between them.
Totally asymmetric simple exclusion process (TASEP) is an important stochastic dynamic process in the area of statistical physics, which can be used to model microscopic transport in nonequilibrium processes. Due to its rich stochastic dynamics and nonequilibrium phase transition mechanisms, the importance of TASEP in statistical physics is similar with that of Ising model, which has attracted many attentions. In this paper, multiple TASEPs are introduced and coupled with various strong and weak interacting effects of self-driven particles. Both strong and weak couplings are calculated by means of mean-field analyses and Monte Carlo simulations. Tremendous cluster dynamics, evolution law of topological structures of phase diagrams and mechanisms of shock evolution are found in thermodynamic limit of proposed particle system. Monte Carlo simulation results like phase boundaries are found to be a good match with mean-field analyses, which reflect the validity of the research. The research work will be conducive to exploring the mechanisms of stochastic dynamics in the process of nonequilibrium phase transitions of multi-body interacting particle systems.
Exclusion processes are hot study issues in statistical physics and corresponding complex systems. Among fruitful exclusion processes, totally asymmetric simple exclusion process (namely, TASEP) attracts much attention due to its insight physical mechanisms in understanding such nonequilibrium dynamical processes. However, interactions among isolated TASEP are the core of controlling the dynamics of multiple TASEPs that are composed of a certain amount of isolated one-dimensional TASEP. Different from previous researches, the interaction factor is focused on the critical characteristic parameter used to depict the interaction intensity of these components of TASEPs. In this paper, a much weaker constraint condition ∏i=1Kω id =∏ i=1Kω iu is derived as the analytical expression of interaction factor. Self-propelled particles in the subsystem i of multiple TASEPs can perform hopping forward at pi, moving into the target site of the (i − 1)th TASEP channel at ωiu or updating into the (i + 1)th TASEP channel at ωid. The comparison of this proposed interaction factor and other previous factors is performed by investigating the computational efficiency of obtaining analytical solutions and simulation ones of order parameters of the proposed TASEP system. Obtained exact solutions are observed to match well with Monte Carlo simulations. This research attempts to have a more comprehensive interpretation of physical mechanisms in the impact of interaction factors on TASEPs, especially corresponding to stochastic dynamics of self-propelled particles in such complex statistical dynamical systems.
Totally asymmetric simple exclusion process (namely, TASEP) is one of the most vital driven diffusive systems, which depicts stochastic dynamics of self-driven particles unidirectional updating along one-dimensional discrete lattices controlled by hard-core exclusion. Driven diffusive system composed by multiple TASEPs with asymmetric heterogeneous interactions under twodimensional periodic boundaries is investigated. By using detailed balance principle, particle configurations are extensively studied to describe system’s stochastic dynamics. By performing analytical analyses and Monte-Carlo simulations, local densities dominated by these asymmetric heterogeneous interactions among subsystems are found to be monotone increase with global density and homogeneous to site locations because of the spatial homogeneity of sites. Oppositely, local currents are found to be nonmonotonically increasing against global density, heavily dependent on the forward rate and proportional to it under preset interactions. Additionally, by calculating different cases of topologies, changing transition rates are found to have greater effects on particle configurations in adjacent subsystems. Furthermore, heterogeneous interaction rates are found to improve the total current in such multiple TASEPs and optimize the overall transport of such driven-diffusive system. Our research will be helpful to understand microscopic dynamics and non-equilibrium dynamical behaviors of interacting particle systems.
In the brain, learning is achieved through the ability of synapses to reconfigure the strength by which they connect neurons (synaptic plasticity). In promising solid-state synapses called memristors, conductance can be finely tuned by voltage pulses and set to evolve according to a biological learning rule called spike-timing-dependent plasticity (STDP). Future neuromorphic architectures will comprise billions of such nanosynapses, which require a clear understanding of the physical mechanisms responsible for plasticity. Here we report on synapses based on ferroelectric tunnel junctions and show that STDP can be harnessed from inhomogeneous polarization switching. Through combined scanning probe imaging, electrical transport and atomic-scale molecular dynamics, we demonstrate that conductance variations can be modelled by the nucleation-dominated reversal of domains. Based on this physical model, our simulations show that arrays of ferroelectric nanosynapses can autonomously learn to recognize patterns in a predictable way, opening the path towards unsupervised learning in spiking neural networks.
The paper studies periodic two-dimensional exclusion processes constituted by multi-lane totally asymmetric simple exclusion processes with the effect of asymmetric lane-changing rates. Particles in lane i can move forward with a rate or hop into the adjacent lane () with a rate (). Complemented by Monte Carlo simulations, exact solutions have been derived. According to the detailed balance principle, two different cases and are studied here. Dynamics of the system can be revealed by exact solutions, which can match well with simulation ones.
In this paper, we study a traffic model constituted by totally asymmetric simple exclusion process (TASEP) and two-lane simple exclusion processes (SEP). Then we generalize it to study TASEP coupled with multiple SEP lanes. Numerical results by the mean-field approximation have been presented to show the dynamics of TASEP competing with multi-lane SEPs. Complemented by simulation results, numerical results show that phase diagrams and current diagrams qualitatively vary with current splitting parameter , hopping rate () and the global density .
A wideband linearized common-gate low-noise amplifier (LNA) is proposed. The linearity is improved by active cross-coupled feedback technique. The active cross-coupled feedback circuit, consisting of a complementary source follower and a feedback capacitor, is employed to enhance loop gain, and acquire linearity improvement. A passive cross-coupled feedback removes the second-order harmonic feedback effect to the input-referred third-order intercept point (IIP3). An enhanced LC-match input network and forward isolation of the active cross-coupled feedback enable the proposed LNA with wideband input matching and flat gain performance, respectively. Fabricated in a 0.13 μm RF CMOS process, the LNA achieves a flat voltage gain of 14.5 dB, an NF of 2.5–3.4 dB, and an IIP3 of 3.1–4.3 dBm over a 3 dB bandwidth of 0.1–1.2 GHz. It consumes only 3.5 mA from a 1.2 V supply and occupies an area of 0.2 mm2.
An analytical approach based on linear periodic time-varying theory, is developed to analyze the noise characteristics of current-commutating CMOS mixers. Based on the derived transfer functions with memory effect of tail capacitance, the frequency-dependent noise transforming factors for individual stages in the mixers are numerically computed to rigorously describe the noise output. A unified noise expression considering both the thermal noise and the flicker noise is proposed. It enables the noise analysis of the mixers particularly for a high LO frequency with different IF characteristics, and is verified by measurements.
This Letter studies a weakly and asymmetrically coupled three-lane driven
diffusive system. A non-monotonically changing density profile in the middle
lane has been observed. When the extreme value of the density profile reaches
, a bulk induced phase transition occurs which exhibits a shock and a
continuously and smoothly decreasing density profile which crosses
upstream or downstream of the shock. The existence of double shocks has also
been observed. A mean-field approach has been used to interpret the numerical
results obtained by Monte Carlo simulations. The current minimization principle
has excluded the occurrence of two or more bulk induced shocks in the general
case of nonzero lane changing rates.
Quantum information- the subject- is a new and exciting area of science, which brings together physics, information theory, computer science and mathematics. Quantum Information- the book- is based on two successful lecture courses given to advanced undergraduate and beginning postgraduate students in physics. The intention is to introduce readers at this level to the fundamental, but offer rather simple, ideas behind ground-breaking developments including quantum cryptography, teleportation and quantum computing. The text is necessarily rather mathematical in style, but the mathematics nowhere allowed priority over the key physical ideas. My aim throughout was to be as complete and self- contained but to avoid, as far as possible, lengthy and formal mathematical proofs. Each of the eight chapters is followed by about forty exercise problems with which the reader can test their understanding and hone their skills. These will also provide a valuable resource to tutors and lectures. To request a copy of the Solutions Manual, visit: http://global.oup.com/uk/academic/physics/admin/solutions
A CMOS fully differential current-mode front-end for SAW-less receivers is proposed. The noise-canceling LNTA has a main path of the common-gate (CG) stage and an auxiliary path of the inverter stage. A current mirror is used to combine the signals from the main and auxiliary paths in current mode. The stacked nMOS/pMOS configurations improve their power efficiency. The traditional stacked tri-state inverter as D-latch replaced by the discrete inverter and transmission gate enables a reduced supply voltage of divider core. LO generator based on the improved divider provides quarter LO signals to drive the proposed LNTA-shared receiver front-end. Simulation results in 180 nm CMOS indicate that the integrated receiver front-end provides an NF of 2.4 dB, and a maximum gain of 45 dB from 0.2 to 3.3 GHz. The in-band (IB) and out-of-band (OB) IIP3 of 2.5 dBm and 4 dBm, are obtained, respectively. With CMOS scaling down continuously, CMOS devices are providing increased transit frequency and reduced intrinsic parasitics which are important for radio frequency (RF) and millimeter-wave applications. As a promising solution, CMOS RF delivers comparable performance to silicon bipolar and GaAs devices but at a much lower cost and higher integration level. Supply voltage reduction with CMOS scaling down also poses a stringent linearity requirement. Avoiding the conventional trade-off between the supply voltage and linearity headroom, the proposed receiver front-end based on the current mode principle is with weak linearity dependency on the supply voltage and provides excellent anti-blocker interference capability.
In this work, biaxial and uniaxial strain techniques are implemented in the channel for both p- and n-type FinFETs necessary for advanced CMOS applications. Stress/strain mapping in strained-Si (n-type) and strained-SiGe (p-type) channels (in trapezoidal tri-gate FinFET devices) are studied through three-dimensional (3D) numerical simulation, with particular focus on the enhancement of drain current. Following the strain/stress profiles simulated, the piezoresistive changes are implemented in the simulator to describe the strain effects on device operation. Further, we have investigated the impacts of random discrete dopant variability on the characteristics of a 14-nm gate length FinFET transistors (both n and p-type) using a 3D finite element quantum corrected drift-diffusion device simulator. We have also found the fluctuation of critical device parameters such as threshold voltage (VTH), sub-threshold slope (SS), on current (ION), and off state current (IOFF), etc., mainly originated from the randomness of distribution of the dopants.
Cluster dynamics possess the promising studies in statistical physics and complexity science. While, proposing physical models, applying analytical analyses and exploring macroscopic properties and microscopic interactions are critical to investigate physical mechanisms of cluster dynamics. Among these physical models, totally asymmetric simple exclusion process is an important non-equilibrium statistical physics model, as it is essential enough to lattice models. Besides, it’s also abbreviated to TASEP. Additionally, asymmetric simple exclusion processes, ASEPs, are derivatives, whose dynamics are based on TASEP with other nonlinear physical processes. Actually, heterogeneity of ASEPs is available to depict the real physical and engineering phenomena in a more reasonable manner. Different with previous researches, connected ASEPs are proposed here, which are constituted by two isolated ASEP coupled with a conjunction. As for each individual ASEP, its dynamics are dominated by interacting energies. Different with previous work, two completely different energies are introduced in system, which are used to describe the competition between subsystems. By analyzing complete transition processes among different particle configurations, mean-field dynamical equations are established. Phase diagrams under different energies are obtained, which yield to findings of coexistence phase of low densities, coexistence phase of high densities and coexistence phase of low and high densities. These local densities are qualitatively different. Hereafter, evolution regularities of phase diagrams obtained from local densities and currents are obtained to deeply understand physical mechanisms of complexity science. Expanded results and discussions about potential applications and fewer basic results are also presented. Expanded model with different Langmuir kinetics and internal interacting energies is established. Governing partially differential equations of the whole system are derived. Four steady stacking states of kinesin-II and OSM-3 on bovine brain tubulins affected by two different kinds of buffers are found. This work will help and promote the understanding of non-equilibrium statistical evolutions and nonlinear dynamic behaviors of such multibody system. (Accepted paper)
This article presents a fully depleted monolithic active pixel sensor technology compatible with a standard deep submicrometer 110-nm CMOS process. Passive test pixels structures, produced in various flavors, have proved the feasibility of 100- and 300-μm-thick active substrates. Active pixel sensors with monolithically integrated analog and digital electronics, consisting of a 24 x 24 array of pixels with 50-μm pitch, have been shown to be fully functional when operating in the full depletion mode. Characterization results obtained with a proton microbeam and a ⁵⁵Fe radiation source are presented and discussed.
Multibody interacting particle system is one of the most important driven-diffusive systems, which can well describe stochastic dynamics of self-driven particles unidirectionally updating along one-dimensional discrete lattices controlled by hard-core exclusions. Such determined nonlinear dynamic system shows the chaos, a complicated motion that is similar to random and can't determine future states according to given initial conditions. Derived from the study of randomness in the framework of determinism, chaos effectively unifies determinacy and randomness of nonlinear physics, which also embodies the randomness and uncertainty of multibody particle motions. Besides, chaos often presents complex ordered phenomena like aperiodic ordered motion state etc., which indicates it's a stable coordination of local random and global mode. Different with previous work, a mesoscopic multibody interacting particle system considering the trajectory of variable curvature radius is proposed, which is more reliable to depict true driven-diffusive systems. Nonlinear dynamical master equations are established. Linear and nonlinear stability analyses are performed to test system robustness, which lead to linear stable region, metastable region, unstable region, triangular wave, solitary wave and kink-antikink wave. Complete numerical simulations under quantitatively changing characteristic order parameters are performed to reveal intrinsic chaotic dynamics mechanisms. By comparing fruitful chaotic patterns, double periodic convergence in stable limit cycles is observed due to attractors folding. System states tend to be limit cycles with the passage of time. The longer time is, the higher density is near attractors. The number of main components of attractors and the shape of them are found to drastically change with these parameters. Hereafter, the chaotic formation mechanism is explained by performing Fourier spectrums analyses. High and low frequency elements are obtained, whose module lengths are found to change periodically with time and nonperiodically with space. Our results show the sensitivity of the chaotic system to initial conditions, which mean slight changes of initial states in one part of system can lead to disproportionate consequences in other parts. The sensitivity is directly related to uncertainty and unpredictability. Moreover, calculations also show that three kinds of attractors (namely, point attractor, limit-cycle attractor and strange attractor) exist in the proposed chaotic system, which control particle motions. The first two attractors are convergence attractors playing a limiting role, which lead to static and balanced features of system. Oppositely, strange attractor makes the system deviate from regions of convergent attractors and creates unpredictability by inducing the vitality of the system and turning it into a non-preset mode. Furthermore, interactions between convergence attractors and strange attractors trigger such locally fruitful modes. This work will be helpful to understand mesoscopic dynamics, stochastic dynamics and non-equilibrium dynamical behaviors of multibody interacting particle systems.
Keywords: Chaos patterns; Stochastic dynamics; Multibody interacting particle system; Variable curvature radius
(Accepted paper)
In this paper, a 60 GHz complementary metal-oxide-semiconductor (CMOS) balun low-noise amplifier (LNA) was implemented for millimeter-wave communication. To improve the gain and noise performance, slow-wave coplanar waveguides (S-CPW) with high quality factor were designed as input, output, and inter-stage matching networks. At the input port, a balun transformer provides additional passive gain while performing the singled-ended to differential conversion. Implemented in a 28-nm CMOS process, simulated results show that the proposed LNA exhibits a simulated linear gain of 16 dB and a noise figure of 5.6 dB at 60 GHz, with a 3-dB gain bandwidth of 5 GHz (58 GHz–63 GHz). The input return loss is better than −25 dB at the central frequency. The simulated input third-order intercept point (IIP3) is −5 dBm. The circuit draws 35 mA from 1 V supply voltage.
A linear transimpedance amplifier (TIA) for a 53 GBd PAM-4 optical link to support 100 Gb/s data on a single wavelength is reported. Designed in a 16 nm FinFET CMOS process, the chip consumes 60.8 mW with <; 2% total harmonic distortion (THD), while producing a 600 mVpk-pk differential output, a -3 dB bandwidth of 27 GHz, and an input referred noise density of 16.7 pA/ √Hz. Transimpedance can be programed from 62 to 83 dBQ in 0.5 dBQ steps to enable digital automatic gain control. Novel circuit topologies for high-bandwidth, low-noise, low-power, and high-linearity are discussed in detail. The entire signal path is realized with dc-coupled CMOS inverters biased at mid-supply to achieve maximum gain linearity. Dynamic voltage scaling tightly controls the transimpedance value, bandwidth, and in-band peaking across process, temperature, and voltage (PVT) variations to realize a robust macro with a high parametric yield needed in a system-on-chip.
Processing steps to integrate active and passive components in a CMOS-based technology are discussed in this chapter. A basic description of unit processes is first presented. An overview of a baseline CMOS process is then given, followed by a discussion of process modules that are added to the baseline process to fabricate components for mixed-signal (MS) and radio-frequency (RF) CMOS, analog CMOS, high-speed BiCMOS, and Bipolar-CMOS-DMOS (BCD). Illustrative cross-sectional views of the numerous analog component constructions are provided.
In this paper, a broadband complementary metal–oxide–semiconductor (CMOS) active down-conversion mixer is presented. Specifically, a capacitor cross-coupled (CCC) transconductor serves as the input stage to reduce noise figure of the mixer while providing wideband input matching. Moreover, a capacitive neutralization technique is used to compensate the source-drain parasitic of input stage and boost loop gain of the transconductor, resulting in improved isolation and linearity. The current-reuse technique applied to the developed transconductor by stacked nMOS/pMOS architecture efficiently saves power consumption of the circuit. Implemented in the TSMC 28-nm CMOS process, post-simulations show that the proposed mixer provides a maximal conversion gain of 11.4 dB and an NF of 3.9–4.7 dB across RF input frequency range of 2–9.6 GHz. The average IIP3 of 5 dBm are obtained while the mixer core consumes 6.2 mW from a 1 V supply.
This paper presents a highly efficient low-IF receiver front-end for IoT applications. The low-noise trans-impedance amplifier (LNTA) combines a transformer-based network for scaling up the source impedance together with passive gm-boosting and current-reuse techniques to achieve better noise and 12x current saving compared with a Common Gate (CG) stage. A complex channel-selection filter with center frequency and passband of 2 and 1.4 MHz respectively is implemented after the passive mixer with a gm-boosted CG stage. Built in 28 nm CMOS, the proposed receiver occupies an active area of 0.1 mm 2 , it is supplied with 0.9 V and consumes only 350 μW, while showing a minimum NF of 6.2 dB at the channel of interest. The RF performance of the proposed receiver is very competitive with state-of-the-art ultra-low-power receivers, while it consumes the lowest power.
This chapter presents the working principle, design and analysis of various types of microwave frequency mixers based on diodes and transistors for communication systems. Noise performance analysis and importance of image reject filters in the design of mixers are discussed. Design details and analysis of single-ended, single-balanced, double-balanced, image reject and subharmonic mixers are also presented along with examples.
In the area of statistical physics, totally asymmetric simple exclusion process (namely, TASEP) is treated as one of the most important driven-diffusive systems. It contains profound non-equilibrium statistical physics mechanisms due to being the paradigm model like Ising model. Different with previous work, a one-dimensional TASEP coupled with inner interactions and Langmuir dynamics is taken into account. Weak coupled binding and unbinding rates are introduced in the proposed model. Bond breaking and making mechanisms of self-driven particles illustrating the unidirectional movement of protein motors are investigated by means of performing cluster mean-field analyses. Dynamics in the proposed system dominated by the competition between the attraction effect and the repulsion one are found to depend on the specific value of the interaction energy of these active particles. The research work will be helpful for understanding non-equilibrium statistical behaviors of interacting particle systems.
Keywords: TASEP; cluster mean-field analysis; inner interactions; Langmuir dynamics
In the paper, a broadband CMOS active down-conversion mixer is presented. Specifically, a noise-canceling transconductor is developed to reduce the noise figure of the mixer. The current-reuse technique applied to the developed transconductor by stacked nMOS/pMOS architecture not only saves power consumption of the circuit, but also reduces the undesirable parasitics. Moreover, two passive type networks are exploited to absorb internal parasitics of the circuit and guarantee broadband operation. Implemented in an advanced 65-nm CMOS process, post-simulations show that, driven by 0 dBm sinusoidal LO signal, the proposed mixer provides a maximal conversion gain of 15 dB and a NF of 3.9-4.9 dB across RF input frequency range of 0.5-6.5 GHz. The IIP3 and IP1dB of 3.1 and -6.9 dBm are obtained, respectively. The mixer core consumes 7.2 mW from a 1 V supply.
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85047096049&doi=10.1016%2fj.vlsi.2018.04.011&partnerID=40&md5=3c763ae9832f1f1dbf0e0abcd6892c91 A broadband, inductorless receiver including a noise-canceling low-noise transconductance amplifier (LNTA), suitable for TV White-Space applications is presented. The LNTA has single-ended input and balanced output, allowing double-balanced mixing for high IIP2. The circuit consists of a common-gate stage with a feed-forward noise-canceling common-source path. High common-source transconductance improves noise but leads to unbalanced output currents, re-balanced with a low-noise current multiplier. A self-calibrating loop boosts the IIP2 above 52 dBm across process corners. The LNTA bandwidth is from 100 MHz to 1 GHz. Power consumption is only 3 mW for a NF < 2.6 dB and an IIP3 of 1 dBm. © 2018 Elsevier B.V.
In this work, we present a CMOS-integrated lownoise junction field-effect transistor (JFET) developed in a standard 0.18 μm CMOS process. These JFETs reduce inputreferred flicker noise power by more than a factor of 10 when compared to equally sized n-channel MOS devices by eliminating oxide interfaces in contact with the channel. We show that this improvement in device performance translates into a factor-of-10 reduction in the input-referred noise of integrated CMOS operational amplifiers when JFET devices are used at the input, significant for many applications in bioelectronics.
Based on tremendous real data, a macroscopic model is established, which can depict
the process of volatile organic compounds (namely, VOCs) emissions. Different with
previous work, a complete set of sources is taken into account rather than only an
isolated source. These data have been processed to support the sample set in order to
prove the validity of the theoretical analyses. Besides, the relationship between the
industrial production and VOCs emissions of industrial source is discussed and
depicted. Furthermore, the relationship between the electronic industrial production
and VOCs emissions is emphasized and calculated. And VOCs emission per unit
production is investigated. Additionally, the relationship between the number of sample
points in the sample set and VOCs emissions is illustrated. Then, the control strategy
of VOCs emissions is proposed by calculating the optimal solutions of each sample
set. It's found that the lower the slope of optimal solutions, the lower the average VOCs
emission, the better the VOCs emission control effect.
In this paper, a CMOS active down-conversion mixer is presented for wideband applications. Specifically, a LO generation chain is suggested to convert AC LO signal to shaped trapezoid burst, which reduces the sinusoidal LO power level requirement by the mixer. The current-reuse technique by stacked nMOS/pMOS architecture is used to save the power consumption of the circuit. Moreover, this complementary configuration is also employed to compensate second-order nonlinearity of the circuit. Implemented in a 0.18-(Formula presented.)m CMOS process, post-simulations show that, driven by only −10 dBm sinusoidal LO signal, the proposed inductorless mixer provides a maximal conversion gain of 15.7 dB and a noise figure (NF) of 9.1–12 dB across RF input frequency range 0.5–1.6 GHz. The IIP3 and IP1dB of 3.5 dBm and −4.8 dBm are obtained, respectively. The mixer core only consumes 3.6 mW from a 1.8-V supply.
Antenna-coupling group delay limits the cancellation bandwidth of conventional self-interference cancellers (SICs), making it difficult to ensure isolation in both transmit (TX) and receive (RX) bands. Isolation over both bands is achieved in the dual-path receiver architecture proposed in this paper. The main path consists of a highly linear current-mode RX with a passive RF SIC. The auxiliary path implements a notch in the TX band followed by an adaptive digital equalizer whose output is used to suppress the TX noise leakage in the RX band. The main and auxiliary receiver prototypes, implemented in 28-nm CMOS technology, operate between 1 and 2 GHz, occupy an area of 0.51 and 0.12 mm
2
, and have a power dissipation of 32-40 and 26-64 mW, respectively. The stand-alone RX has a noise figure (NF) of 4-5 dB and an out-of-band IIP3 of 18 dBm. Turning on the passive canceller results in an effective IIP3 of 25-29 dBm and a degradation of the NF of less than 0.8 dB. Thanks to its high dynamic range, the auxiliary path suppresses the TX noise by >29 dB while degrading the RX NF by only 1 dB at 23-dBm TX output power.
Motivated by the previous traffic flow model considering the real-time traffic state, a
modified macroscopic traffic flow model is established. The periodic boundary condition
is applied to the car-following model. Besides, the traffic state factor R is defined in order
to correct the real traffic conditions in a more reasonable way. It is a key step that we
introduce the relaxation time as a density-dependent function and provide corresponding evolvement of traffic flow. Three different typical initial densities, namely the high
density, the medium one and the low one, are intensively investigated. It can be found
that the hysteresis loop exists in the proposed periodic-boundary system. Furthermore,
the linear and nonlinear stability analyses are performed in order to test the robustness
of the system.
In this work, a heterogeneous traffic flow model coupled with the periodic boundary condition is proposed. Based on previous models, a heterogeneous system composed of more than one kind of vehicles is considered. By bifurcation analysis, bifurcation patterns of the heterogeneous system are discussed in three situations in detail and illustrated by diagrams of bifurcation patterns. Besides, the stability analysis of the heterogeneous system is performed to test its anti-interference ability. The relationship between the number of vehicles and the stability is obtained. Furthermore, the attractor analysis is applied to investigate the nature of the heterogeneous system near its steady-state neighborhood. Phase diagrams of the process of the heterogeneous system from initial state to equilibrium state are intuitively presented.
A wideband common-gate CMOS low noise amplifier with negative resistance technique is proposed. A novel single-ended negative resistance structure is employed to improve gain and noise of the LNA. The inductor resonating is adopted at the input stage and load stage to meet wideband matching and compensate gain roll-off at higher frequencies. Implemented in a 0.18 μm CMOS technology, the proposed LNA demonstrates in simulations a maximal gain of 16.4 dB across the 3 dB bandwidth of 0.2–3 GHz. The in-band noise figure of 3.4–4.7 dB is obtained while the IIP3 of 5.3–6.8 dBm and IIP2 of 12.5–17.2 dBm are post-simulated in the designed frequency band. The LNA core consumes a power dissipation of 3.8 mW under a 1.5 V power supply.
An inductorless noise-canceling CMOS low-noise amplifier (LNA) with wideband linearization technique is proposed. The complementary configuration by stacked NMOS/PMOS is employed to compensate second-order nonlinearity of the circuit. The third-order distortion of the auxiliary stage is also mitigated by that of the weak inversion transistors in the main path. The bias and scaling size combined by digital control words are further tuned to obtain enhanced linearity over the desired band. Implemented in a 0.18 μm CMOS process, simulated results show that the proposed LNA provides a voltage gain of 16.1 dB and a NF of 2.8-3.4 dB from 0.1 GHz to 1.4 GHz. The IIP3 and IIP2 of 13-18.9 and 24-40 dBm are obtained, respectively. The circuit core consumes 19 mW from a 1.8 V supply.
The stability analysis and wave dynamic properties of an extended hybrid traffic flow model, WZY model, are intensively studied in this paper. The linear stable condition obtained by the linear stability analysis is presented. Besides, by the mean of analyzing Korteweg-de Vries equation, we present soliton waves in the metastable region. Moreover, the multi-scale perturbation technique is applied to derive the travelling wave solution of
the model. Furthermore, by the mean of performing Darboux transformation, the firstorder and second-order doubly periodic solutions and rational solutions are presented. It can be found that analytical solutions match well with numerical simulations.
In this paper, the effect of the speed limit on degradable networks with capacity restrictions and the forced flow is investigated. The link performance function considering the road capacity is proposed. Additionally, the probability density distribution and the cumulative distribution of link travel time are introduced in the degradable network. By the mean of distinguishing the value of the speed limit, four cases are discussed
respectively. Means and variances of link travel time and route one of the degradable road network are calculated. Besides, by the mean of performing numerical simulation experiments in a specific network, it’s found that the speed limit strategy can reduce the travel time budget and mean travel time of link and route. Moreover, it reveals that the speed limit strategy can cut down variances of the travel time of networks to some extent.
In this paper, a modified macroscopic traffic flow model is presented. The term of the density-dependent relaxation time is introduced here. The relation between the relaxation time and the density in traffic flow is presented quantitatively. Besides, a factor R depicting varied properties of traffic flow in different traffic states is also introduced in the formulation of the model. Furthermore, the evolvement law of traffic flow with distinctly initial density distribution and boundary perturbations is emphasized.
A wideband capacitor cross-coupled common-gate low-noise amplifier (CGLNA) featured with high gain, low noise, and enhanced linearity is proposed. The linearity is enhanced by complementary multi-gated transistor (CMGTR) technique. The bulk voltage and scaling size of auxiliary transistors are tuned to shift the distortion coefficients, compensating the nonlinearity of main transistors. In addition, the current reuse by stacked PMOS/NMOS configuration reduces power consumption while guaranteeing the input matching. A prototype is implemented in a 0.18 μm RF CMOS process. The measurement shows a maximal voltage gain of 19.5 dB, an average noise figure (NF) of 2.1 dB, and an input-referred third-order intercept point (IIP3) of 8.3–10 dBm over a 3 dB bandwidth of 0.2–1.6 GHz, respectively. It consumes only 3.5 mA from a 2.2 V supply.
In this paper, a modified microscopic traffic flow model accounting for the optimal velocity has been proposed. Different with previous models, drivers' response ability and the maximum of accelerations are considered in the term of the optimal velocity. The effect of parameters in the term of the optimal velocity on bifurcations in the rotary traffic is studied here. Besides, the evolvement of bifurcations in the system is calculated by performing numerical simulation experiments. Moreover, the linear stability analysis of the proposed model is presented.
A hybrid traffic-flow model [Wang-Zhou-Yan (WZY) model] is brought out in this paper. In WZY model, the global equilibrium velocity is replaced by the local equilibrium one, which emphasizes that the modification of vehicle velocity is based on the view of safe-driving rather than the global deployment. In the view of safe-driving, the effect of drivers' estimation is taken into account. Moreover, the linear stability of the traffic model has been performed. Furthermore, in order to test the robustness of the system, the evolvement of the density wave and the velocity wave of the traffic flow has been numerically calculated.
A complementary noise-canceling CMOS low-noise amplifier (LNA) with enhanced linearity is proposed. An active shunt feedback input stage offers input matching, while extended input matching bandwidth is acquired by a π-type matching network. The intrinsic noise cancellation mechanism maintains acceptable noise figure (NF) with reduced power consumption due to the current reuse principle. Multiple complementary nMOS and pMOS configurations commonly restrain nonlinear components in individual stage of the LNA. Complementary multigated transistor architecture is further employed to nullify the third-order distortion of noise-canceling stage and compensate the second-order nonlinearity of that. High third-order input intercept point (IIP3) is thus obtained, while the second-order input intercept point (IIP2) is guaranteed by differential operation. Implemented in a 0.18-μm CMOS process, the experimental results show that the proposed LNA provides a maximum gain of 17.5 dB and an input 1-dB compression point (IP1 dB) of -3 dBm. An NF of 2.9-3.5 dB and an IIP3 of 10.6-14.3 dBm are obtained from 0.1 to 2 GHz, respectively. The circuit core only draws 9.7 mA from a 2.2 V supply.
This paper presents two 4-bit (16-phase) mm-wave vector modulator phase shifters exploiting a novel in-phase and quadrature signal generator that consists of a single-input double-output cascode amplifier incorporating a lumped-element coupled-line quadrature coupler. The two circuit implementations have been designed and fabricated in a 28 nm fully depleted silicon-on-insulator CMOS. The first (PS1) achieves a higher gain and the second (PS2) has a more compact area (reduced to about 50%). Each consumes 18 mA from a 1.2 V supply. PS1 exhibits an average gain of 2.3 dB at 87.4 GHz and B
3dB
from 78.8 to 92.8 GHz; rms gain error of 1.68 dB at 87.4 GHz and <;2 dB in the B
3dB
; rms phase error of 9.4° at 87.4 GHz and <;11.9° in B
3dB
; S
11
<; -10.5 dB in B
3dB
; average P
1dB
of -7 dBm; and average noise figure (NF) equal to 10.8 dB at 87 GHz. PS2 exhibits an average gain of 0.83 dB at 89.2 GHz and B
3dB
from 80.2 to 96.8 GHz; rms gain error of 1.46 dB at 89.2 GHz and <;2 dB in B
3dB
; rms phase error of 11.2° at 89.2 GHz and <;11.9° in B
3dB
; S
11
<; -11.5 dB in B
3dB
; average P
1dB
of -6 dBm; and average NF of 11.9 dB at 89 GHz.
A wideband CMOS active mixer is proposed with improved noise and linearity, merging a resistive feedback noise-canceling low-noise amplifier as its transconductor. The noise-canceling characteristic enables the transconductor with low noise over a wide frequency range. An auxiliary pMOS transistor is employed to cancel the third-order nonlinear currents of a composite transistor in the transconductor, and impair the second-order nonlinear currents of that. To enhance input equivalent transconductance, a bulk cross-coupled feedback is applied to the transistor in the transconductor with large power consumption. Together with a current bleeding technique, comparable gain, noise, and improved linearity are achieved, but by reduced bias currents of the mixer. Fabricated in a 0.13- triple-well RF CMOS process, the proposed mixer demonstrates a voltage gain of 16.3–14.4 dB, average noise figure of 4.2 dB, and input-referred third-order intercept point of 7.3–2.5 dBm, operating between 500 MHz–5.8 GHz. It consumes 17 mA from a 1.5-V supply and occupies an area of .
A linearized ultra-wideband (UWB) CMOS low noise amplifier (LNA) is proposed. The linearity is improved by a post distortion technique, employing PMOS as an auxiliary FET to cancel the second- and the third-order nonlinear currents of common-gate LNA. A three-section band-pass Chebyshev filter is presented for wideband input matching. The LNA implemented in a 0.18 μm CMOS technology demonstrates that IIP3 and IIP2 have about 9 and 6.9 dB improvements in broad frequency range, respectively. Power gain of 9.6-12.6 dB and noise figure (NF) of 3.9-5.8 dB are obtained in the frequency range of 1.6-9.7 GHz with a power dissipation of 10.6 mW under a 1.8 V power supply.
The conversion gain of CMOS active mixers is investigated in terms of
several kinds of LO offsets. With the effect of output resistance
characterized in submicron process, the effective transconductance of
driving stage is rigorously derived based on small-signal cascode
equivalence. An analytical conversion gain model for the mixer with
several kinds of LO offsets is thus presented. Based on Chartered 0.35
µm CMOS technologies, the Spectre-RF simulations agree with the
predictions from the proposed model well, where the maximal error is
less than 0.28 dB.