Filament-Free Bulk Resistive Memory Enables Deterministic Analogue Switching

Abstract

Digital computing is nearing its physical limits as computing needs and energy consumption rapidly increase. Analogue-memory-based neuromorphic computing can be orders of magnitude more energy efficient at data-intensive tasks like deep neural networks, but has been limited by the inaccurate and unpredictable switching of analogue resistive memory. Filamentary resistive random access memory (RRAM) suffers from stochastic switching due to the random kinetic motion of discrete defects in the nanometer-sized filament. In this work, this stochasticity is overcome by incorporating a solid electrolyte interlayer, in this case, yttria-stabilized zirconia (YSZ), toward eliminating filaments. Filament-free, bulk-RRAM cells instead store analogue states using the bulk point defect concentration, yielding predictable switching because the statistical ensemble behavior of oxygen vacancy defects is deterministic even when individual defects are stochastic. Both experiments and modeling show bulk-RRAM devices using TiO2-X switching layers and YSZ electrolytes yield deterministic and linear analogue switching for efficient inference and training. Bulk-RRAM solves many outstanding issues with memristor unpredictability that have inhibited commercialization, and can, therefore, enable unprecedented new applications for energy-efficient neuromorphic computing. Beyond RRAM, this work shows how harnessing bulk point defects in ionic materials can be used to engineer deterministic nanoelectronic materials and devices.

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CommuniCation
Filament-Free Bulk Resistive Memory Enables Deterministic
Analogue Switching
Yiyang Li,* Elliot J. Fuller, Joshua D. Sugar, Sangmin Yoo, David S. Ashby,
Christopher H. Bennett, Robert D. Horton, Michael S. Bartsch, Matthew J. Marinella,
Wei D. Lu, and A. Alec Talin*
Dr. Y. Li,[+] Dr. E. J. Fuller, Dr. J. D. Sugar, Dr. D. S. Ashby, R. D. Horton,
Dr. M. S. Bartsch, Dr. A. A. Talin
Sandia National Laboratories
Livermore, CA 94550, USA
E-mail: yiyangli@umich.edu; aatalin@sandia.gov
S. Yoo, Prof. W. D. Lu
Department of Electrical Engineering and Computer Science
University of Michigan
Ann Arbor, MI 48109, USA
Dr. C. H. Bennett, Dr. M. J. Marinella
Sandia National Laboratories
Albuquerque, NM 87185, USA
The ORCID identification number(s) for the author(s) of this article
can be found under https://doi.org/10.1002/adma.202003984.
[+]Present address: Department of Materials Science and Engineering,
University of Michigan, Ann Arbor, MI 48109, USA
DOI: 10.1002/adma.202003984
operations including machine learning
and artificial neural networks are particu-
larly costly in energy due to the need to
move information between the memory
and the processor. On the other hand,
analogue neuromorphic computing
processes information directly on the
memory elements[1–3] to bypass this bot-
tleneck, making such systems hundreds
of times more energy ecient.[4] Neu-
romorphic computing architectures for
fully connected[5–7] and convolutional[8,9]
neural networks have been developed.
Despite significant research into memory
technologies such as conductive-bridge
random access memory,[10–12] ferroelectric
memory,[13] phase-change memory,[14–16]
among others, the search for a CMOS
compatible analogue non-volatile memory
element, or artificial synapse, with accu-
rate and ecient switching has been
elusive.
Filamentary resistive random access
memory (RRAM) has demonstrated tre-
mendous potential as analogue memory
due to its scalability, non-volatility, fast
switching, and CMOS compatibility,[17–26]
but suers from severe challenges in achieving predictable
analogue behavior. Filamentary-RRAM stores analogue infor-
mation in a conductive filament formed by oxygen vacancy
(O
··
V
) defects inside a metal oxide switching layer. The local-
ized, nanometer-sized filament arises from the instability of the
electroforming process that results from positive thermal feed-
back.[20,27,28] Applying a write voltage combines two eects to
change the resistance state:[27,28] first, a large electronic current
creates internal joule heating to several hundred degrees Cel-
sius to locally activate O
··
V
mobility;[29] second, a much smaller
electrochemical current directs the motion of O
··
V
to or away
from the filament, changing its size and/or composition.
A well-known challenge of filamentary devices is that the ana-
logue resistance state, set by the position and motion of a dis-
crete number of O
··
V
defects in this nanosized filament,[20,21,30] is
stochastic due to the probabilistic nature of microscopic atomic
behavior (e.g., thermally activated defect “hopping”). This sto-
chasticity is responsible for the intrinsically unpredictable and
irreproducible analogue switching in filamentary devices.[31–33]
The challenges surrounding stochasticity become acute for
Digital computing is nearing its physical limits as computing needs and
energy consumption rapidly increase. Analogue-memory-based neuromorphic
computing can be orders of magnitude more energy ecient at data-intensive
tasks like deep neural networks, but has been limited by the inaccurate and
unpredictable switching of analogue resistive memory. Filamentary resistive
random access memory (RRAM) suers from stochastic switching due to the
random kinetic motion of discrete defects in the nanometer-sized filament. In
this work, this stochasticity is overcome by incorporating a solid electrolyte
interlayer, in this case, yttria-stabilized zirconia (YSZ), toward eliminating
filaments. Filament-free, bulk-RRAM cells instead store analogue states
using the bulk point defect concentration, yielding predictable switching
because the statistical ensemble behavior of oxygen vacancy defects is
deterministic even when individual defects are stochastic. Both experiments
and modeling show bulk-RRAM devices using TiO2-X switching layers
and YSZ electrolytes yield deterministic and linear analogue switching for
ecient inference and training. Bulk-RRAM solves many outstanding issues
with memristor unpredictability that have inhibited commercialization, and
can, therefore, enable unprecedented new applications for energy-ecient
neuromorphic computing. Beyond RRAM, this work shows how harnessing
bulk point defects in ionic materials can be used to engineer deterministic
nanoelectronic materials and devices.
Although CMOS-based digital memory and processors have
achieved enormous advances in computing, they may not be
optimal to meet future computing requirements. Data-intensive
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analogue devices engineered for higher-resistance operation
due to fewer atoms in the critical conduction path.[30,32] Since
energy-ecient neuromorphic computing demands both more
analogue states and higher resistances,[4,34] state-of-the-art ana-
logue filamentary devices often switch in the correct direction
only ≈60% of the time,[5,8,10,25,35] slightly better than random
(50%). As a result, it can take nearly 500 switching events to
tune the memory cell to one of 32 analogue states,[8] expending
significant time and energy to achieve modest 5-bit resolu-
tion. Additional challenges include nonlinear and asymmetric
changes in analogue state that reduce the training accuracy of
artificial neural networks.[1,34,36]
To address these issues, we introduce the filament-free bulk-
RRAM using TiO2 and yttria-stabilized zirconia (YSZ) to achieve
deterministic switching. An electron-blocking, ion-conducting
solid electrolyte interlayer eliminates the positive thermal feed-
back that creates the dominant conductive filament. Instead,
due to uniform temperatures provided by external heating
sources, O
··
V
defects are homogeneously distributed as a solid
solution in the bulk. By widening the active information storage
volume from the dominant nanosized filament to the bulk
volume of the switching layer, bulk-RRAM employs the sta-
tistical ensemble concentration of O
··
V
defects in the bulk to
store the analogue resistance states. This leads to predictable
switching because the ensemble behavior of all defects is deter-
ministic even if individual defects are stochastic. The analogue
switching accuracy at high resistances improves from ≈60%
in filamentary memristors to between 96% and 99% in these
first-generation bulk-RRAM devices. Eliminating internal joule
heating also enables linear changes in the analogue state for
accurate training. While external heating in bulk-RRAM may
be less space-ecient than internal joule heating, it provides
the uniform temperatures to eliminate the filament and enable
deterministic switching.
We first compare the switching stochasticity of filamentary-
and bulk-RRAM. Filamentary devices contain a direct electronic
path between the top and bottom contacts formed by electron-
donating O
··
V
defects in the metal oxide layers (Figure1a). An
initial voltage applied between the top and bottom contacts con-
centrates the current into a thermal hotspot to “electroform” a
nanometer-sized conducting filament in the switching layer.[20]
The number and position of O
··
V
defects in the filament control
its conductance, which dominates the overall device conduct-
ance state. Subsequent write pulses lead to local Joule heating
that activates O
··
V
migration within the filamentary hotspot to
change the defect concentration and distribution. To illustrate
the eect of stochastic switching and introduce a method to
quantify the switching variability, we show a typical analogue
ramping profile for a TaOx filamentary memristor (Figure1b,
see supporting information for details). This data was also used
to conduct neural network simulations in ref. [35] Switching is
unpredictable and stochastic, and the distribution of switching
events varies considerably from cycle to cycle and device to
device.[35] For higher resistance devices, only ≈60% of SET
or RESET pulses switch in the desired direction (Figure 1c),
a result comparable to those of other published works[5,8,10,25]
(Figure S1, Supporting Information).
Previous studies have shown that stochastic switching
arises because the discrete defects in a single nanometer-sized
filament dominate the device conductance. A low probability
of defect “hopping” over an ≈1eV activation barrier (≈10−9 at
300 °C) combined with the “random walk” of defects from
kinetic theory dictates that discrete defects behave
probabilistically and stochastically.[31–33] Poissonian switching
statistics,[37] shot noise,[1] and random telegraph noise[30] adds to
unpredictability and stochasticity. Filamentary-RRAM also pre-
sents nonlinear and asymmetric switching behavior that makes
it dicult to accurately train neural networks.[1,34,36]
To address these challenges, we design the bulk-RRAM
cell (Figure 1d) that does not contain dominant conducting
filaments and is instead sensitive to the average bulk defect
concentration, a continuous variable that is generalizable to
many transition metal oxides. To demonstrate the concept,
we fabricated thin-film devices on silicon that adds a 400-nm
thick solid electrolyte interlayer, YSZ, between the mixed
conducting base (120-nm thick) and switching (60-nm thick)
layers, both consisting of TiO2−X (see supporting informa-
tion and Figures S2,S3 for fabrication protocol and materials
characterization). Figure 1e shows a cross-sectional energy-
dispersive spectroscopy (EDS) map taken using a scanning
transmission electron microscope. High-resolution EDS
maps do not show cation intermixing between the YSZ and
TiO2 layers (Figures S4,S5, Supporting Information). This
structure resembles a solid oxide fuel cell[38] without the gas
interface.
Because the electrolyte blocks the direct electronic pathway
and resulting in internal joule heating (Figure1d), the heat to
thermally activate O
··
V
migration is supplied uniformly from an
external hotplate or on-chip resistive heaters. No electroforming
process is needed. Unlike filamentary devices, bulk-RRAM has
separate read and write pathways: write pulses, ±1.5V in mag-
nitude, applied between contacts 1 and 3 shuttle O
··
V
defects in
and out of the switching layer. The measured resistance state
between contacts 2 and 3 (100 mV) samples the average elec-
tronic resistivity of the switching layer, which depends on the
defect concentration. To demonstrate analogue tunability, the
switching layer was ramped from 100–450 nS. Figure1f plots
the first and last two ramps over 3 × 108 write operations, each
consisting ±1.5V writepulses applied between contacts 1 and
3 for 2 µs.
Bulk-RRAM shows linear, symmetric, and predictable
switching profiles. In stark contrast to that of filamentary
devices (Figure 1b,c), the switching behavior is essentially
deterministic with minimal cycle-to-cycle variations. Over 96%
of the switching pulses change the conductance state in the
desired direction (Figure1g), despite >2 MΩ resistance, more
analogue states, and lack of materials optimization compared
to the filamentary devices. This predictable switching arises
from the absence of localized internal heating: under uniform
temperatures, mobile defects are homogeneously distributed
as a solid solution due to configurational entropy,[38] without
the positive feedback conditions for heterogeneous filament
growth.[28] Because the number of O
··
V
defect sites exceeds 106
even in a small (30 nm)3 volume,[39] defect migration firmly
obeys collective deterministic statistical behavior like Fick’s
Laws of Diusion. Moreover, switching is linear and sym-
metric, essential attributes required to achieve high network
training accuracy:[1,34,36] Crossbar simulations (Cross-Sim[36])
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show ≈97% training accuracy for the MNIST training set
(Figure S6, Supporting Information). While this device is a type
of electrochemical random-access memory (ECRAM),[40–50] the
bulk-RRAM cells based on oxygen vacancies presented here
provide significant advantages in terms of scalability, retention,
and CMOS compatibility over previously developed ECRAM,
and will be discussed later.
Next, we probe the switching layer’s local conductivity with
both materials characterization and physical modeling to con-
firm the absence of filaments. Experimentally, we map the
electrical conductivity with conductive atomic force micro-
scopy (c-AFM) using a modified device geometry with exposed
switching layers (see supporting information). Figure2a,b
shows the local tip current of a region of the switching layer
-40
-20
0
20
40
ΔG per pulse (nS)
400300200100
Conductance G (nS)
-20
0
20
ΔG per pulse (μS)
1601208040
Conductance G (μS)
Filament
hotspot
Filamentary-RRAM
Probabalistic & stochastic
Base layer
(ion reservoir)
Switching layer
Metal Contact
Bulk-RRAM
Statistical & deterministic
a
e
b
d
e-
e-
96% switching accuracy
Pulse count
2 μs
160°C
100 ns
58% switching accuracy
SET
RESET
160
120
80
40
Conductance (μS)
100806040200
Pulse count
VO
•• Solid electrolyte +/-
e-
V
O
••
e-
Contact 1
23
g
c
400
300
200
100
Conductance (nS)
150
100500
First ramps
Final ramps
3Χ108 pulses
Write
Read
+1V (set)
-1V (reset)
+1.5V (set)
-1.5V (reset)
SET
RESET
Si Ti Zr YPt
Uniform heating
YSZ electrolyte
TiO2 switching
TiO2-X base
23
1
200 nm
f
Figure 1. Bulk-RRAM compared to filamentary-RRAM. a) Filamentary-RRAM uses localized internal joule heating to mobilize
V
O
··
defects within the
nanometer-sized conductive filament. Due to the discrete number of defects within the dominant conducting filament, this memory device switches
stochastically and probabilistically, schematically illustrated using a random walk. b) Analogue switching behavior in a TaOx filamentary-RRAM device;
this data was also previously used for neural network simulations in ref. [35] the first fifty SET and RESET pulses in each of five ramps are plotted.
c)The switching distribution plot from 50 ramps. The switching accuracy, defined as the number of SET or RESET pulses that changes the state in the
correct direction, is ≈58%, slightly better than random (50%). SET from the low-conductance state results in ΔG≈100 µS, beyond the scale of the graph.
d)Bulk-RRAM utilizes the average concentration of
VO
··
defects in the switching layer to store analogue information. While each defect follows probabil-
istic behavior, the statistical behavior of all defects is deterministic, leading to accurate and predictable switching. e) Cross-sectional energy-dispersive
spectroscopy (EDS) map taken by scanning transmission electron microscopy, of the bulk-RRAM cell used in this work. Contact 1 is a metallic, highly
oxygen-deficient TiOx, and the substrate is Si with 100nm of thermal oxide. f) Bulk-RRAM shows much more linear and deterministic behavior despite
lower electronic conductance and more analogue states. The first and final two ramps over 3 × 108 pulses are shown. The ramping switches between SET
to RESET when the conductance limits of 100 nS and 450 nS are reached. g) The switching distribution for ≈30 ramps show 96% switching accuracy.
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in two conductance states, 5 µS and 1 µS. No current hot-
spots were detected, in stark contrast to hotspots frequently
observed for filamentary-RRAM arising from conductive fila-
ments.[17,51] The average tip current for all images in the high-
conductance state is about 4.9 times higher than that of the
low-conductance state, in agreement with macroscopically
measured values.
To quantify the inhomogeneity in local conductivity, we
divide the c-AFM map into square regions of dierent sizes
during analysis, and calculate the mean tip current
x
for each
region (Figure2c). The error bars represent two standard devia-
tions (2s) of the distribution: our results show that 94/100
of the (25 nm)2 regions have tip currents between 70% and
130% of the mean current
x
. Given that bulk-RRAM devices
have 5× conductance range (Figure1f ), c-AFM results suggest
that nanoscale devices with switching layers on the order of
25–50nm would be suciently uniform for analogue memory
crossbars. The 2s/
x
ratio obtained from a number of c-AFM
maps for both states are plotted in Figure2d. The highly uni-
form, yet low conductance of the oxide at dierent states
suggests that large crossbars with >106 synapses are indeed
possible to yield at least 1014 multiply-and-accumulate opera-
tions per joule, hundreds of times improvement over optimized
digital computing.[4]
We adapt a quantitative and deterministic physical model
from past work[27,28] to further study switching in bulk-RRAM
(see Supporting Information for details). The temperature
within bulk-RRAM with externally controlled heating is con-
stant (Figure 2e); as a result, O
··
V
defects enter the switching
layer uniformly from the base layer via the electrolyte. In
contrast, internal joule heating in filamentary devices con-
centrates the electronic current into regions that are initially
more conducting, turning them into hotspots (Figure 2f ).
These hotspots serve as positive feedback nucleation points
for the filament. The filament is nanometer-sized even when
the device is much larger, leading to the discrete stochastic
behavior in Figure1b,c.
We also use this deterministic model to simulate analogue
switching. In filamentary devices, the change in conductance
depends non-linearly on the present state, even when stochas-
ticity is not simulated (Figure S7, Supporting Information). This
arises because the joule heating power (I2R or V2/R) depends
on the resistance, yielding resistance- or state-dependent tem-
perature which in turn aects the defect mobility. In contrast,
the temperature of bulk-RRAM is controlled independently, so
both the defect mobility and the number of defects shuttled
per pulse is essentially constant, resulting in the highly linear
switching shown experimentally (Figure1f,g).
Figure 2. Nanoscale spatial distribution in electronic conductivity demonstrates non-filamentary nature of the device as well as potential scalability to
smaller dimensions. a,b) Conductive-AFM tip current distributions for the switching layer at high-conductance and low-conductance states. The tip
voltage is −2 V,and the absolute value for the current is plotted. No filaments were observed. c) Histogram distribution of the tip current in (b) aver-
aged across regions of dierent sizes, used to evaluate the uniformity of the conductance as a function of dimensions. The black dots represent the
image-averaged current x̄. The error bars 2s (twice the standard deviation) encompasses ≈95% of the distribution of region-averaged currents. d) Plot
of the uniformity of the dierent regions using 2s/x̄ as a metric for the uniformity: for example, our results state that ≈95% of the 50-nm regions in
the low-conductance state have conductance within 25% of the mean value. The confidence intervals represent the standard deviation of (2s/x̄) across
three c-AFM images for the low-conductance state and four images for the high-conductance state. e) Physical modelling confirms the uniformity of
the switching layer in bulk-RRAM as a result of diusion and configurational entropy when the temperature is uniform, even as the initial distribution
of
V
O
·· defects is nonuniform. The arrows indicate uniform oxygen vacancy flux. f ) In filamentary devices, the filaments form around these initial non-
uniformities which act as nucleation seeds. Due to localized temperature increases and positive thermal feedback, defect migration is concentrated
around a ≈2-nm filament, where
V
O
·· flux is very high.
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We next seek to elucidate and quantify the switching and
retention properties using model bulk-RRAM cells fabricated
on single-crystal YSZ substrates (100–1000 µm thick, see
supporting information for device fabrication details). Cyclic
voltammetry between contacts 1 and 3 shows a strong hysteresis
typical of electrochemical systems.[52] The conductance of the
switching layer (measured through contacts 2 and 3) increases
as O
··
V
is inserted (Figure S8a, Supporting Information), sug-
gesting that Ti4+ ions are reduced to Ti3+ and creating two
mobile polarons (
′
Ti
Ti ) for every O
··
V
inserted. At negative cur-
rents, the process is reversed. The electronic conductivity of the
switching layer increases with temperature (Figure S8b, Sup-
porting Information), characteristic of polaron conduction.[53]
Because the devices are not cooled between weight update
pulses, this behavior must be considered when converting ana-
logue weights at dierent temperatures (see Supporting Infor-
mation). Despite appreciable electronic conductance, the Ti3+
concentration at the surface is below the detection threshold of
X-ray photoelectron spectroscopy (Figure S8c, Supporting Infor-
mation). Linear current-voltage curves confirm that our weight
updates arise from bulk compositional modulation rather than
interfacial eects at the Pt/TiO2−X interface (Figure S8d, Sup-
porting Information).
Figure3a shows the analogue switching behavior of a device
with a 100 µm-thick electrolyte. The TiO2−X layers were more
chemically reduced during fabrication to enable the bulk-
RRAM cell to operate at dierently designed conductance
levels. The switching accuracy is 99% (Figure3b). The conduct-
ance change is linearly proportional to the write voltage and
the pulse time (Figure S9a,b, Supporting Information); this dif-
fers from the exponential (voltage) and logarithmic (time) rela-
tionship observed in metal-oxide-ECRAM,[55] which were not
heated, and suggests fundamentally dierent switching mecha-
nisms. An even higher density of analogue conductance states
is obtained by reducing the write pulse time (Figure S9c–f, Sup-
porting Information) without loss of accuracy.
In Figure3c we plot the write time as a function of electro-
lyte thickness and temperature. The results are fitted to the
simple model τW= DLρ(T), where D= 80 ± 20nF cm−2 (95%
confidence interval) is the common fit parameter, ρ(T) is the
temperature-dependent ionic resistivity of the YSZ electro-
lyte plotted in Figure3d, and L is the thickness of YSZ. Our
results show that write time can be faster by decreasing L and
by increasing T. The rate-limiting step is the resistance of the
YSZ electrolyte, which is over 800 times thicker than the TiO2−X
layers. Reducing the electrolyte thickness from >100 µm to
<1µm can be used to decrease the series ionic resistance and
the write time: as shown in Figure1f, a 400-nm thick thin-film
electrolyte results in devices ≈2 µs write times. The excellent fit
across all fabricated devices suggests minimal device-to-device
variation.
Next, we consider the long-term information retention of
the device. Like other types of RRAM, bulk-RRAM harnesses
the reduced mobility of O
··
V
at lower temperatures (Figure3d)
to “freeze” the information state. This contrasts strongly with
other types of ECRAM cells, which also have three terminals
but that need electronic switches to isolate the gate from the
channel.[40–50] We plot the memory loss over time (Figure4a)
when shorting the base and switching layers after setting the
device to a high-conductance state. The switching layer decay
time strongly depends on temperature: at room temperature, it
decays less than 0.3% after one week. Devices in both high- and
low-conductance states relax to equilibrium in a manner con-
sistent with an RC circuit model with a similar time constant
(Figure S11, Supporting Information). The first-order exponen-
tial fit suggests that the relaxation time constant is not strongly
dependent on the conductance state.
In Figure 4b we plot the retention time τR, defined as the
time for the conductance to drop by 2%, as a function of tem-
perature. The trendline fit is given by a simple RC circuit
model τR= BLρ(T), with B fitted to 1.4± 0.5 µF cm−2 (95% con-
fidence interval), and relates to the chemical capacitance.[56–58]
The thin-film devices from Figure4b retain state longer than
predicted, which suggests that O
··
V
transport in the electrolyte is
not rate-limiting. Bulk-RRAM retains state for periods of days
to weeks due to low O
··
V
mobility at or near room temperature,
sucient for neuromorphic computing.[1,3] Materials with higher
Arrhenius activation energy can be used to achieve longer retention
Figure 3. Switching behavior in model bulk-RRAM devices fabricated on single-crystal YSZ. a) Analogue switching of a device fabricated on a 100-µm
YSZ electrolyte substrate shows linear and symmetric switching. b) The switching distribution shows an even higher switching accuracy than the
thin-film YSZ devices. Over 99% of the SET and RESET pulses switch in the correct direction. c) The switching time needed to achieve 100 analogue
states within a 3× change in conductance for dierent electrolyte thickness and temperatures. All results are fitted using a common fit parameter
D = 80 ± 20nF cm−2 (95% confidence interval). d) Ionic resistivity of the YSZ electrolyte as a function of the temperature shows an activation energy ≈1.1eV,
comparable to high-temperature results from Ahamer etal.[54] Representative Nyquist impedance plots are shown in Figure S10, Supporting Information.
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(Figure 4c) by increasing the temperature dependence of the
ionic resistivity. This is especially crucial to achieve sucient
retention time when other components in an integrated circuit
need to operate above room temperature.
We now consider how bulk-RRAM would retain state when
scaled to smaller lateral dimensions. We assume that the reten-
tion time is proportional to an RC time constant (τRC), where C
is the chemical capacitance[56] of the switching layer while R is
the total ionic resistance of the device. A size-independent τRC
is obtained because the chemical capacitance decreases propor-
tionally with the area while the ion resistance increases at the
same rate (Figure4d). A τRC of 107 s, ≈4 months, is computed
when each layer in the stack is 100 nm thick.
Whereas bulk-RRAM cells retain state by immobilizing
O
··
V
and blocking ion migration, ECRAM cells that operate at
constant temperature instead use electronic switches to block
electron migration between the gate and channel.[40–50] This
method does not scale well for smaller devices: ROFF is con-
stant and depends on the properties of the switch while C
decreases proportionally with the area (Figure 4e). Assuming
that ROFF≈ 1013Ω (ref. [60]), this scheme provides long τRC
for relatively large areal devices (>10 µm)2, but τRC decreases
drastically for smaller devices, yielding only ≈10 s for scaled
(100nm)2 devices, many orders of magnitude lower than for a
similarly sized bulk-RRAM device (Figure4d). We note that the
bulk-RRAM cells can also utilize an electronic switch for short-
term information retention when the devices are heated at its
elevated write temperature (Figure S12a,b, Supporting Informa-
tion). Unlike ECRAM based on Li+ and H+, bulk-RRAM also
possess long-term information storage mechanisms by immo-
bilizing oxygen vacancies using temperature.
The significant improvements in stochasticity of non-
filamentary bulk-RRAM ultimately arise from using a solid elec-
trolyte to suppress localized joule heating and eliminate the
dominant conducting filament. Instead, the temperature of
bulk-RRAM is uniform and controlled externally, so the defects
are homogeneously distributed in the bulk as a solid solu-
tion. Without a dominant filament, the statistical ensemble
behavior of all defects controls the resistance and analogue
information state. This results in deterministic, predictable,
and linear behavior for the bulk-RRAM devices, essential for
analogue neural network applications, and compensates for
the lower information density and higher complexity of using
three-terminal devices. While we anticipate higher stochas-
ticity for smaller devices with fewer defect sites, bulk-RRAM
should be more deterministic than filamentary-RRAM because
the switching layer’s volume is always larger than the fila-
ment’s volume, and stochasticity usually scales with the square
root of the number of defects based on probability theory.[33]
The switching layer’s geometry can also be designed through
Figure 4. Retention of bulk-RRAM at various temperatures when the bulk and switching layers are shorted without an electronic switch. a) Conductance
decay over for a device constructed on 100-µm single-crystal YSZ. Retention time increases significantly at lower temperatures as the electrolyte resist-
ance rises. b) The retention time τR, defined as 2% change in conductance, as a function of temperature (T) and electrolyte thickness (L), with a single
fit parameter B = 1.4± 0.5 µF cm−2 (95% confidence interval) fitted to all the single-crystal YSZ results c) Computed ionic resistance normalized to the
resistance at 150 °Cfor dierent activation energies; the retention time is expected to be proportional to the ionic resistance. d) RC time constants for
bulk-RRAM do not depend on the device size because the ionic resistance increases at the same rate that the chemical capacitance decreases. Reten-
tion is achieved when the top and bottom contacts are shorted. We assume each layer is 100-nm thick, the specific chemical capacitance is 1000 F cm−3
(ref. [57,59]) and the ionic resistance is 1014Ω cm from Figure3d. e) The RC time decreases significantly with device size in ECRAM cells that use an
electronic switch to isolate the top and bottom contacts. As chemical capacitance decreases with size, the switch’s resistance does not decrease and
assumed to be 1013Ω here, resulting in drastic decrease in τR.
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lithography, whereas the size of the filament is sensitive to the
material’s mass, heat, and electron transport properties, and
likely cannot exceed 10 nm. We hypothesize that bulk storage
also makes these devices less sensitive to impurities and vari-
ations in oxide thickness, and not require extensive process
control as in filamentary memristors.[11] Our ability to achieve
deterministic switching is not specific to the properties of the
materials used here and is generalizable to many mixed-con-
ducting transition metal oxides,[38] opening up new opportuni-
ties for materials research.
Interfacial memristors[18,29] that switch by modulating the
defects near the interface should be less stochastic than fila-
mentary devices because of the higher number of defects at a
2D interface. However, bulk-RRAM has even more defect sites
by using the 3D bulk. Furthermore, although interfacial[18,29]
and three-terminal memristors[61,62] without a solid electro-
lyte may not contain filaments, they rely upon internal joule
heating,[29] which leads to nonlinear and asymmetric switching
behavior because the temperature and defect mobility would
depend strongly on the present resistance state.
Another class of analogue memory with significant recent
research is ECRAM[40–50] based on bulk transport of Li+ or H+
defects. Our statistical ensemble analysis also explains why
these ECRAM switch more linearly and deterministically than
filamentary devices. Bulk-RRAM is a type of ECRAM that uses
oxygen vacancies, and has significantly better retention for
smaller devices by immobilizing defects using temperature,
as opposed to using switches to electronically isolate the gate
and channel in past ECRAM cells (Figure 4d,e). Moreover,
there are wide numbers of CMOS-compatible materials that
conduct oxygen vacancies at elevated temperatures, including
many transition metal oxides. ECRAM that switches at room
temperature must utilize more mobile defect ions like Li+ in
metal oxides,[41,44,46] H+ in electroactive polymers,[42,45] or O2− in
ionic liquids,[40,48] which often necessitates CMOS-incompatible
materials.
Finally, we consider the energy of reading and switching
in an array. Read energies are low when bulk-RRAM is engi-
neered to have high electronic resistances; our devices already
achieved several megaohms (Figure 1f) and can be further
improved to tens to hundreds of megaohms using “square”
geometries. High read resistances not only minimize the read
current but also enables larger (>106 devices), more energy-
ecient crossbar arrays that conduct ≈1014 inference operations
per joule.[4,8,34] For training accelerators, it is necessary to con-
sider the energy costs for switching. The direct electrical energy
cost of writing is very low, on the order of 10−17 J for a (100-nm)3
scaled device (see supporting information). To account for the
thermal energy needed to heat the chip to ≈150 °C, the energy
cost per switching event is estimated to be ≈10−14 J for scaled
devices that switch in parallel (see Supporting information and
Figure S12a), compared to ≈10−12 for filamentary memristors.[22]
When weight updates are sporadic, such as for inference, a
simpler selector-free configuration can also be constructed
(Figure S12c, Supporting Information). We propose a device
density of 8F2, where F is the feature size (Figure S12d, Sup-
porting Information).
Bulk-RRAM solves major challenges of filamentary-RRAM
for analogue computing. By eliminating the dominant filament
and instead of storing information through the bulk O
··
V
concen-
tration, bulk-RRAM switches deterministically rather than
stochastically by harnessing the defects’ statistical ensemble
behavior. The bulk-RRAM provides a generalizable approach
towards enabling the predictable analogue memory element for
enable energy-ecient neuromorphic computing, and inspires
the use of bulk point defects to control the stochasticity of
nanoelectronic systems.
Experimental Section
The devices containing thin-film YSZ were fabricated by using optical
photolithography and electron beam lithography to define the bottom
Ti/Pt contacts on a Si/SiO2 substrate, then sputtering consecutive layers of
TiO2 switching layer (DC-reactive), YSZ electrolyte (RF), TiO2−X base layer
(DC-reactive), and TiOX (DC-reactive) top contact using shadow masks
(Figure S2, Supporting Information). All sputtering was conducted at
room temperature. The bottom TiO2 and YSZ layers were crystallized
by annealing at 700 °C (Figure S3, Supporting Information), previously
shown to be sucient to crystallize sputtered thin-film YSZ[63] and
TiO2,[46] but not high enough to support significant cation intermixing at
the interface (Figures S4,S5, Supporting Information). The TiO2−X base
layer and top contact were not annealed. Energy dispersive spectroscopy
suggests that the Y:Zr ratio is 12% ± 3% (Supporting Figure 4f ),
slightly lower than expected based on the target composition, but with
sucient defects to support oxygen vacancy conduction.[64] The model
devices containing single-crystal YSZ were fabricated by sputtering TiO2,
annealing at 600 °C to form anatase, and evaporating Pt contacts on
the opposite side of a single-crystal YSZ substrate. Oxygen vacancies
were introduced into TiO2 by reducing in a 2 bar H2 environment at
400°C for 2 h. Device testing was conducted using a Bio-logic SP-300
bipotentiostat or a National Instruments Data Acquisition Device
(DAQ-6358) system controlled by the LabVIEW program. More details on
device fabrication, measurements, physical modeling, and atomic force
microscopy calculations can be found in the supporting information.
Supporting Information
Supporting Information is available from the Wiley Online Library or
from the author.
Acknowledgements
The work at Sandia National Laboratories was supported by the
Laboratory-Directed Research and Development (LDRD) Programs,
including the Harry Truman Fellowship Program (Y. Li). Sandia National
Laboratories is a multimission laboratory managed and operated by
National Technology and Engineering Solutions of Sandia, LLC, a
wholly owned subsidiary of Honeywell International Inc., for the U.S.
Department of Energy’s National Nuclear Security Administration under
contract DE-NA-0003525. This paper describes objective technical results
and analysis. Any subjective views or opinions that might be expressed in
the paper do not necessarily represent the views of the U.S. Department
of Energy or the United States Government. The authors thank W. York,
P. Wijeratne, M. Bonner, and S. Agarwal at Sandia National Laboratories
for assistance with focused ion beam cross-section, X-ray diraction,
microfabrication, and Crossbar simulations; C. Baumer and D. Mueller
at Forschungszentrum Juelich for discussions on oxygen vacancy
transport; S. Ambrogio at IBM research for discussions on stochastic
switching; K. Lim, D. Chen, and H. Li at Stanford University for
diraction analysis and electrochemical measurements; and J. Gold at
Nanolabs (a Eurofins Company) for assistance with X-ray photoelectron
spectroscopy measurements, analysis, and general discussion.
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Conflict of Interest
The authors declare no conflict of interest.
Keywords
analogue switching, neuromorphic computing, point defects, resistive
switching, RRAM
Received: June 11, 2020
Revised: July 29, 2020
Published online:
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