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Multiple-Output Switched-Capacitor DC-DC Combination Converters for IoT Applications
... Step However, to facilitate the integration of all blocks, other type of DC-DC converters are used, like Switched-Capacitor (SC) based DC-DC converters, because they allow monolithic substrate integration due to the reduction of silicon surface required and size, and contribute towards reduced electromagnetic effects and power losses. As an example, in [153], Multiple-Output Switched-Capacitor DC-DC Combination Converters are presented, for use in SoC focusing IoT applications. ...
Multiple-output DC–DC converters are essential in a multitude of applications where different DC output voltages are required. The interest and importance of this type of multiport configuration is also reflected in that many electronics manufacturers currently develop integrated solutions. Traditionally, the different output voltages required are obtained by means of a transformer with several windings, which are in addition to providing electrical isolation. However, the current trend in the development of multiple-output DC–DC converters follows general aspects, such as low losses, high-power density, and high efficiency, as well as the development of new architectures and control strategies. Certainly, simple structures with a reduced number of components and power switches will be one of the new trends, especially to reduce the size. In this sense, the incorporation of devices with a Wide Band Gap (WBG), particularly Gallium Nitride (GaN) and Silicon Carbide (SiC), will establish future trends, advantages, and disadvantages in the development and applications of multiple-output DC–DC converters. In this paper, we present a review of the most important topics related to multiple-output DC–DC converters based on their main topologies and configurations, applications, solutions, and trends. A wide variety of configurations and topologies of multiple-output DC–DC converters are shown (more than 30), isolated and non-isolated, single and multiple switches, and based on soft and hard switching techniques, which are used in many different applications and solutions.
... Changing the no-load voltage is generally achieved by modifying the switching signals according to the desired output voltage. The challenge of this approach is to maximize the number of available output voltage levels for a given number of elements [22]- [25]. To produce multiple no load voltages, some designs suggested converters with multiple unequal voltage sources [24]- [26]. ...
The efficiency of a switched capacitor converter can be represented as the ratio of the output voltage to open-circuit voltage. Switched capacitor converters with adjustable gain are designed with multiple no-load voltages to obtain higher efficiency over the voltage control range. This paper aims to realize the maximum resolution of a switched capacitor converter. A graphical representation of the output voltages formation has been proposed. The voltage composition diagram reveals a switching pattern of the multiphase operation cycle that leads to the desired output voltage. The proposed method has been applied to determine all possible output voltage levels that lead to maximum resolution. A three-capacitor converter has been controlled with the proposed scheme. The simulation results show that the output voltage follows the reference voltage closely. The converter provides 60% more output voltage steps compared to the nearest comparable design in the literature.
A high efficiency all-CMOS switched-capacitor DC-DC converter (SC DC-DC) with frequency, switch size and interleaving scaling is proposed in order to achieve high efficiency for wireless sensors and internet of things (IOTs) applications. According to the output load current, decision making unit adjusts the frequency, switch size and number of interleavers to match the required current profile and reach steady state. 4-equally-phased clocks are utilized in the design of the SC DC-DC converter. The converter is implemented in 65nm CMOS process with a peak efficiency of 85% at 600μA load current. It can supply output current ranging from 20μA to 5mA with efficiency higher than 75%. The converter can be configured into 3 different gain topologies to support nominal output voltages of 1.1V, 1.65V and 2.2V, from a 3.3V input supply. Total area of the converter is 0.725mm2.
Switched-capacitor (SC) converters are a type of variable structure systems.SC converters have been typically furnished with open-loop control or some linear feedback controls. However, these approaches provide slow dynamic response, small operation region, and large voltage ripple. Some new nonlinear control methods have been proposed in the literatures to overcome these barriers, however, such control methods are only useful for applications involving low power SC converters because the limitation of theses control methods. This paper presents a nonlinear Constant On Time Variable Frequency One-Cycle Control (CVFOCC) method based on dynamic capacitor ampere-second balance transient calculation (CASBTC) modeling method and one-cycle control (OCC) technique for high power SC converters. This method successfully addresses the regulation issue in high power SC converters. Using high power two-switch boosting switched-capacitor (TBSC) converters as examples, simulation and experiment results demonstrated that CVFOCC method significantly improved the dynamic response for TBSC converter and achieved excellent line and load regulation in a wide operation range.
This paper describes a new application of SEPIC (Single Ended Primary Converter) and Cuk converter for DC bipolar network. A DC-DC converter configuration based on a combination of both converters is proposed. In the resulting topology the switching node is shared by the SEPIC and Cuk converter, since they have the same instantaneous duty cycle. The main advantage of this topology is that synchronization of various switches is not required and control terminal is connected to ground which simplifies the design of the gate drive. On the other hand, this configuration allows the connection of renewable energy sources to microgrids type bipolar DC link and to cover the current needs of new distributed generation units with efficient, economical and easy way. To verify its performance a prototype was designed. Experimental results show as this combination of two converter topologies with appropriated modulation schemes are adequate to use in DC microgrid (MG).
This paper presents a highly efficient switched capacitor (SC) DC-DC converter, which is implemented in a 65nm low power CMOS process to enable SoC integration. The converter supplies a nominal output current of 30mA with an efficiency of 95%. The buck converter operates with a constant input voltage of 1.83V and produces an output voltage of 1.2V. The charge is transported in two phases from the input supply to the output capacitor. Therefore, a network consisting of switches and two so-called flying capacitors are used. This converter is intended to be used in power management units for mobile devices and to substitute complex and expensive inductor based DC-DC converters. A test chip was designed in collaboration with Infineon Technologies Austria AG. The measurement results are presented and give for an output current of 10mA a peak efficiency of 97%.
Ultra-low-power strategies have a huge importance in today's integrated circuits designed for internet of everything (IoE) applications, as all portable devices quest for the never-ending battery life. Dynamic voltage and frequency scaling techniques can be rewarding, and the drastic power savings obtained in subthreshold voltage operation makes this an important technique to be used in battery-operated devices. However, unpredictability in nanoscale chips is high, and working at reduced supply voltages makes circuits more vulnerable to operational-induced delay-faults and transient-faults. The goal is to implement an adaptive voltage scaling (AVS) strategy, which can work at subthreshold voltages to considerably reduce power consumption. The proposed strategy uses aging-aware local and global performance sensors to enhance reliability and fault-tolerance and allows circuits to be dynamically optimized during their lifetime while prevents error occurrence. Spice simulations in 65nm CMOS technology demonstrate the results.
Human-Computer Interaction (HCI) applications need reliable hardware and the development of today’s sensors and cyber-physical systems for HCI applications is critical. Moreover, such hardware is becoming more and more self-powered, and mobile devices are today important devices for HCI applications. While battery-operated devices quest for the never-ending battery, aggressive low-power techniques are used in today’s hardware systems to accomplish such mission. Techniques like Dynamic Voltage and Frequency Scaling (DVFS) and the use of subthreshold power-supply voltages can effectively achieve substantial power savings. However, working at reduced power-supply voltages, and reduced clock frequency, imposes additional challenges in the design and operation of devices. Today’s chips face several parametric variations, such as PVTA (Process, power-supply Voltage, Temperature and Aging) variation, which can affect circuit performance and reliability is affected. This paper presents a performance sensor solution to be used in cyber-physical systems to improve reliability of today’s chips, guaranteeing an error-free operation, even with the use of aggressive low-power techniques. In fact, this performance sensor allows optimize the trade-off between power and performance, avoiding the occurrence of errors. In order to be easily used and adopted by industry, the performance sensor is a non-intrusive global sensor, which uses two dummy critical paths to sense performance for the power-supply voltage and clock frequency used, and for the existing PVTA variation. The novelty of this solution is on the new architecture for the sensor, which allows the operation at VDDs’ subthreshold voltage levels. This feature makes this global sensor a unique solution to control DVFS, even at subthreshold voltages, avoid performance errors and allow optimizing circuit operation and performance. Simulations using a SPICE tool allowed characterizing the new sensor to work at sub-threshold voltages, and results are presented for a 65 nm CMOS technology, which uses a CMOS Predictive Technology Models (PTM) technology. The results show that the sensor increases sensibility when PVTA degradations increase, even when working at subthreshold voltages.
Current imbalance is a major problem in multistring LED lighting systems. Significant research efforts have been directed to solve the problem by either active or passive approach. However, in view of some system requirements or other emerging lighting applications, independent control of different LED strings is getting more important to obtain different desirable brightness and/or colour spectrums. The existing active and passive approaches have their limitations to perform current balancing and independent control simultaneously, thus posing another great challenge for the design of LED drivers. In this paper, a fully switched-capacitor-controlled LCC resonant converter is designed to address this challenge. With the replacement of all fixed capacitors in the resonant tank of the LCC converter with switch-controlled capacitors (SCCs), the regulation of the common AC bus voltage, current balancing and individual current control of LED strings can be readily achieved with a single LED driver by varying the effective capacitances of the SCCs under constant switching frequency. In this way, the circuit complexity can be greatly reduced while the circuit performances can be significantly improved. An experimental prototype of driving LED growth light for indoor farming applications is designed and constructed to verify the idea.
This paper introduces an efficient reconfigurable, multiple voltage gain switched-capacitor dc-dc buck converter as part of a power management unit for wearable electronics. The proposed switched-capacitor converter has an input voltage of 0.6 V to 1.2 V generated from an energy harvesting source. The switched-capacitor converter utilizes pulse frequency modulation to generate multiple regulated output voltage levels, namely 1 V, 0.8 V, and 0.6 V based on two reconfigurable bits over a wide range of load currents from 10 μA to 800 μA. The switched-capacitor converter is designed and fabricated in 65-nm low-power CMOS technology and occupies an area of 0.493 mm
2
. The design utilizes a stack of MIM and MOS capacitances to optimize the circuit area and efficiency. The measured peak efficiency is 80% at a load current of 800 μA and regulated load voltage of 1 V.
This work presents a fully integrated 4-to-1 DC-DC symmetric ladder switched-capacitor converter (SLSCC) for voltage stacking applications. The SLSCC absorbs inter-layer load power mismatch to provide minimum voltage guarantees for the internal rails of a multicore system that implements four-way voltage stacking. A new hybrid feedback control scheme reduces the voltage ripple across stacked voltage layers for high levels of current mismatch, a condition that exacerbates voltage noise in conventional SC converters. Furthermore, the proposed SLSCC dynamically allocates valuable flying capacitor resources according to different load conditions, which improves conversion efficiency and supports more power mismatch between the layers. Implemented in TSMC's 40G process, the SLSCC converts a 3.6 V input voltage down to four stacked output voltage layers, each nominally at 900 mV.
This article presents a methodology that allows the development of new converter topologies for single-input, multiple-output (SIMO) from different basic configurations of single-input, single-output dc-dc converters. These typologies have in common the use of only one power-switching device, and they are all nonisolated converters. Sixteen different topologies are highlighted, and their main features are explained. The 16 typologies include nine twooutput-type, five three-output-type, one four-output-type, and one six-output-type dc-dc converter configurations. In addition, an experimental prototype of a three-output-type configuration with six different output voltages based on a single-ended primary inductance (SEPIC)-Cuk-boost combination converter was developed, and the proposed design methodology for a basic converter combination was experimentally verified.
This paper proposes a new 48-V dc-fed dimmable LED driver based on a resonant-switched-capacitor topology (RSCT), where the analog-based dimming feature is accomplished by means of a variable inductor (VI). The proposed topology is based on the classic RSCT step-up double mode converter and it provides a simple and cost-effective solution while guaranteeing a wide dimming range. In order to implement an analog-based dimming, the control of the dc current in the LED lamp is required. This technique proposes to replace the resonant inductor by a VI, which will control the rms value of the resonant current, and, therefore, the mean value of the LED lamp current. In order to evaluate the feasibility and performance of this method, a 22-W LED lamp and driver prototypes were built. The most relevant experimental results are presented and briefly described.
Automotive embedded electronic systems have been increasing in power and complexity and, therefore, more advanced power electronic converters are necessary in these vehicles. Several dual voltage (42V/14V) bidirectional converter architectures have been proposed for automotive systems in recent years. However, most of them, or have low efficiency or are based in series and parallel configurations with large number of semiconductors and magnetics devices. Therefore, in this paper is proposed a bidirectional highefficiency converter with lower number of components. This converter was created by merging a switched capacitor converter and a conventional bidirectional converter, resulting in a hybrid topology. The voltage across the semiconductors of the proposed converter is equal to half of the highest voltage source value. Furthermore, the topology is composed of only one inductor to control the power flow between the two voltage sources. To verify all the mentioned features, a prototype was implemented experimentally, reaching a maximum efficiency of 97.5%.
A fully integrated switched capacitor voltage regulator (SCVR) with on-die high density MIM capacitor, distributed across a 14 KB register file (RF) load is demonstrated in 22 nm tri-gate CMOS. The multi-conversion-ratio SCVR provides a wide output voltage range of 0.45–1 V from a fixed input voltage of 1.225 V. It achieves 63–84% conversion efficiency and supports a maximum load current density of 0.88 A/mm 2 . The area overhead of the dedicated SCVR on the load is 3.6%. Measured data is presented on various performance indices in detail. Subsequent learning on tradeoffs between various factors like capacitance characteristics, conversion efficiency and current density are delineated and, correlated with theoretical estimates. Performance of RF array shows comparable results when powered with the SCVR and the external rail. The all-digital, modular design allows efficient spatial distribution across the load and hence robust power delivery. The extremely fast response times in the order of few nanoseconds is targeted to benefit agile power management. This work evinces voltage regulator technology as a standard homogenous CMOS component, which can proliferate DVFS domains for maximum energy and area benefits.
A new approach to a low ripple-noise switching converter is
presented. The starting circuit is a basic switched-capacitor (SC)
converter cell from which several types of low ripple-noise switching
converters are generated. Two generated converters are employed for
switching regulators hybridized by copper thick films on alumina
substrates to realize low ripple noise. As a result, the ripple noise in
the output voltages is reduced to less than 5 mVpp. Finally, this
approach enables design of an ideal switching converter with zero input
and output current ripple
The theoretical performance limits of two-phase switched-capacitor
(SC) DC-DC power converters are discussed in this paper. For a given
number of capacitors k, the complete set of attainable DC conversion
ratios is found. The maximum step-up or step-down ratio is given by the
kth Fibonacci number, while the bound on the number of
switches required in any SC circuit is 3k-2. Practical implications,
illustrated by several SC power converter examples, include savings in
the number of components required for a given application, and the
ability to construct SC power converters that can maintain the output
voltage regulation and high conversion efficiency over a wide range of
input voltage variations. Limits found for the output resistance and
efficiency can be used for selection and comparison of SC power
converters
A switched capacitor DC-DC power converter topology which consists
of n stages of semiconductor switches and capacitors is
described. The switches connect the capacitors across the input source
during the charging phase and then across the load during the discharge
phase to step down the input voltage by a nominal ratio n .
Further control of the output voltage is possible via current,
resistive, or duty-ratio control. Based on the observation that the
ripple on the capacitor voltages is generally linear in practice,
state-space averaging is used to derive the average state-space
equations for a generalized n -stage switched capacitor
converter circuit. Both exact and approximate equations which are useful
for design are derived for the practical performance parameters. A
design procedure based on these equations is described. The analytical
results have been verified by extensive simulation by PSPICE
A new type of switching-mode power supply containing no inductors or transformers is proposed. The controlled transfer of energy from a unregulated DC source to a regulated output voltage is realized through a switched-capacitor (SC) circuit. A duty-cycle control is used; the driving signals of the transistors in the SC circuit are determined by the feedback circuit. The absence of magnetic devices makes possible the realization of power converters of small size, low weight and high power density, able to be manufactured in IC technology. High efficiency, small output voltage ripple and good regulation for large changes in the input voltage and/or load values are other positive features of the new type of DC-to-DC power converter. The input-to-output voltage conversion ratio is flexible; the same converter structure can provide a large range of constant desired values of the output voltage for a given input voltage, by predetermining the steady-state conversion ratio. The frequency response shows good stability of the designed converter. The experimental results obtained by using a prototype of a step-down SC-based DC-to-DC converter confirmed the theoretical expectations and the computer simulation results.
- S V Cheong
- H Chung
- A Ionovici
S. V. Cheong, H. Chung, and A. Ionovici: Inductorless DG t oDC
Converter with High Power Density, IEEE Tran. on Industrial
Electronics, vo1.41, No.2, April 1994.
An 85%-efficiency reconfigurable multiphase switched capacitor DC-DC converter utilizing frequency, switch size, and interleaving scaling techniques
- A Shady
- Hakan Mohammed
- Dogan
Inductorless DG t oDC Converter with High Power Density
- S V Cheong
- H Chung
- A Ionovici