Resistance modulation in Ge2Sb2Te5

Abstract

Chalcogenide based phase change random access memory (PCRAM) holds great promise for high speed and large data storage applications. This memory is scalable, requires a low switching energy, has a high endurance, has fast switching speed, and is nonvolatile. However, decreasing the switching time whilst increasing the cycle endurance is a key challenge for this technology to replace dynamic random access memory. Here we demonstrate high speed and high endurance ultrafast transient switching in the SET state of a prototypical phase change memory cell. Volatile switching is modeled by electron-phonon and lattice scattering on short timescales and charge carrier excitation on long timescales. This volatile switching in phase change materials enables the design of hybrid memory modulators and ultrafast logic circuits.

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Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
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Research
Article
Resistance
modulation
in
Ge2Sb2Te5
Jitendra
K.
Beheraa,∗,
WeiJie
Wangb,
Xilin
Zhoua,
Shan
Guanc,
Wu
Weikangc,
Yang
A.
Shengyuanc,
Robert
E.
Simpsona
aACTA
Lab,
Singapore
University
of
Technology
and
Design
(SUTD),
8
Somapah
Road,
487372,
Singapore
bInstitute
of
Microelectronics,
A*STAR,
2
Fusionopolis
Way,
138634,
Singapore
cResearch
Lab
for
Quantum
Materials,
Singapore
University
of
Technology
and
Design
(SUTD),
8
Somapah
Road,
487372,
Singapore
a
r
t
i
c
l
e
i
n
f
o
Article
history:
Received
4
December
2019
Received
in
revised
form
6
January
2020
Accepted
19
January
2020
Available
online
19
March
2020
Keywords:
Phase
change
memory
Transient
resistance
Volatile
Scattering
Charge
carrier
excitation
Large
endurance
a
b
s
t
r
a
c
t
Chalcogenide
based
phase
change
random
access
memory
(PCRAM)
holds
great
promise
for
high
speed
and
large
data
storage
applications.
This
memory
is
scalable,
requires
a
low
switching
energy,
has
a
high
endurance,
has
fast
switching
speed,
and
is
nonvolatile.
However,
decreasing
the
switching
time
whilst
increasing
the
cycle
endurance
is
a
key
challenge
for
this
technology
to
replace
dynamic
random
access
memory.
Here
we
demonstrate
high
speed
and
high
endurance
ultrafast
transient
switching
in
the
SET
state
of
a
prototypical
phase
change
memory
cell.
Volatile
switching
is
modeled
by
electron-phonon
and
lattice
scattering
on
short
timescales
and
charge
carrier
excitation
on
long
timescales.
This
volatile
switching
in
phase
change
materials
enables
the
design
of
hybrid
memory
modulators
and
ultrafast
logic
circuits.
©
2020
Published
by
Elsevier
Ltd
on
behalf
of
The
editorial
office
of
Journal
of
Materials
Science
&
Technology.
1.
Introduction
Phase
change
data
storage
materials
can
be
rapidly
and
reversibly
switched
between
the
covalently
bonded
disorder-
amorphous,
and
resonantly
bonded
crystalline
structural
phases
[1,2].
Switching
between
two
different
states
produces
substan-
tial
contrast
in
both
electrical
and
optical
properties,
therefore,
enabling
practical
application
in
optical
and
electronic
memories
[3–8].
In
addition
to
the
memory
application,
phase
change
mate-
rials
are
emerging
as
an
important
material
in
active
photonics
[9–17].
In
pore-like
PCRAM
cell
designs,
Ge2Sb2Te5is
often
used
as
the
active
phase
change
material
[18,19].
The
switching
is
usu-
ally
achieved
by
Joule
heating
the
amorphous
material
above
its
crystallisation
temperature,
150 ◦C,
with
a
current
pulse
to
create
a
conductive
state.
This
is
known
as
the
SET
operation.
The
highly
resistive
amorphous
state
is
achieved
by
melting
the
crystalline
material
at
the
temperature
above
625 ◦C
[20]
and
subsequent
quenching.
This
is
known
as
the
RESET
operation
[21].
The
rapid
SET
↔
RESET
operation
is
based
on
a
melt-quench
thermal
pro-
cess,
which
in
turn
leads
to
an
abrupt
change
in
the
Ge2Sb2Te5
density.
Therefore,
a
considerable
amount
of
thermo-mechanical
stress
[22,23]
is
induced
inside
the
memory
cell
and
this
can
limit
∗Corresponding
author.
E-mail
address:
jitendra
behera@dlut.edu.cn
(J.K.
Behera).
the
cycle
endurance
of
the
memory
cell
to
106write-erase
cycles
[24–28].
In
addition
to
this
issue,
the
current
phase
change
mem-
ory
technology
faces
other
challenges
such
as
phase
segregation,
atomic
migration,
and
resistance
drift.
All
of
which
limit
the
lifetime
of
the
memory
devices
[8,29,30].
Recently,
phase
change
material
research
has
concentrated
on
increasing
the
switching
speed
and
decreasing
the
switching
energy
of
phase
change
memory
cells.
To
this
end,
an
ultrafast
crystallisation
process
was
demonstrated
on
picosecond
timescales
using
a
pre-pulse
incubation
electric
field
[31].
Interfacial
phase-
change
materials
(iPCM)
were
designed
to
achieve
both
fast
phase
transitions
and
low
energy
consumption
by
limiting
the
melting
process
[32–34];
as
a
result,
GeTe
layers
in
the
iPCM
disorder,
whilst
the
Sb2Te3layers
remain
crystalline.
Moreover,
strain
engi-
neering
in
the
iPCM
structures
can
reduce
the
switching
time
and
the
switching
energy
[35–37].
Furthermore,
theoretical
and
experimental
results
show
that
the
optical
properties
of
resonantly
bonded
crystalline
phase
change
materials
are
very
sensitive
to
electric-field
driven
and
thermal
distortions
[38,39].
Indeed,
the
optical
properties
of
crystalline
Sb2Te3-based
materials
momentar-
ily
exhibit
amorphous-like
transmissivity
when
short
laser
pulses
are
used
to
heat
the
film
[40].
That
is,
the
optical
properties
can
be
modulated
without
melting.
Here,
we
extend
this
work
by
examin-
ing
non-melting
electrical
resistance
transients
in
memory
devices.
We
also
find
that
these
volatile
resistance
changes
are
not
due
to
structural
transitions.
https://doi.org/10.1016/j.jmst.2020.03.016
1005-0302/©
2020
Published
by
Elsevier
Ltd
on
behalf
of
The
editorial
office
of
Journal
of
Materials
Science
&
Technology.

172
J.K.
Behera
et
al.
/
Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
Fig.
1.
(a)
Schematic
of
the
resistance
modulation
(volatile
switching)
of
Ge2Sb2Te5in
a
PCRAM
device
in
its
SET
state.
(b)
A
quarter-cut
diagram
of
the
pore-like
PCRAM
cell.
(c)
Schematic
diagram
of
a
transient
resistance
measurement
setup.
(d)
Post-pulse
resistance
of
the
PCRAM
cell
as
a
function
of
voltage
with
different
pulse
duration.
The
blue
regions
represent
the
amorphous
state
(RESET),
and
the
red
region
represents
the
crystalline
state
(SET)
of
the
materials
during
the
RESET
process.
(e)
Typical
colour
map
of
voltage-time-electrical
resistance
dependence
of
the
PCRAM
cell.
The
colour
scale
represents
the
change
in
resistance
of
the
PCRAM
cell.
The
plot
has
three
distinct
regions:
1,
high
resistance
state
(red);
2,
intermediate
resistance
state
(green);
and
3,
low
resistance
state
(blue).
To
increase
the
switching
performance
of
phase
change
mem-
ory
cells,
an
alternate
form
of
electrical
switching
in
a
PCRAM
memory
cells
is
demonstrated.
This
is
achieved
by
modulating
the
electrical
resistance
of
a
memory
cell
in
the
SET
state
without
switching
it
to
the
RESET
state.
Time-resolved
electrical
resis-
tance
measurement
of
the
memory
cells
show
that
the
crystalline
state
exhibits
three
volatile
resistive
states
within
a
single
volt-
age
pulse
excitation,
we
call
this
a
“non-phase
change
switching”
effect.
We
further
demonstrate
that
the
volatile
change
in
electri-
cal
resistance
occurs
during
the
initial
stages
of
the
applied
voltage
pulse.
Our
analysis
reveals
the
effect
is
due
to
a
combination
of
electrical
and
thermal
excitation,
which
is
further
modelled
by
electron-phonon
and
lattice
scattering
on
short
timescales
and
charge
carrier
excitation
on
long
timescales.
This
volatile
resis-
tance
switching
is
due
to
a
change
in
electrical
transport
rather
than
a
crystal-to-crystal,
crystal-to-amorphous,
or
any
other
struc-
tural
transition.
We
propose
that
this
effect
should
be
exploited
in
new
high-speed
random
access
memory
and
ultrafast
logic
devices.
Thus,
we
believe
that
this
volatile
switching
mechanism
may
lead
to
highly
cyclable
volatile
DRAM
operations
within
a
nonvolatile
material.
2.
Experimental
2.1.
Device
fabrication
Pore
structure
PCRAM
cells
were
fabricated
on
SiO2on
Si
substrates
using
conventional
lithography
and
nano-patterning
techniques.
First,
a
200
nm
thick
TiW
layer
was
sputter-deposited
and
patterned
to
serve
as
the
bottom
electrode,
followed
by
a
50
nm
thick
SiO2layer
for
thermal
and
electrical
insulation.
Afterwards,
a
90
nm
wide
diameter
pore
was
formed
by
e-beam
patterning
and
subsequent
etching
of
the
SiO2layer.
Ge2Sb2Te5was
then
deposited
into
the
pore.
The
dimension
of
the
pore
defines
the
fea-
ture
size
of
the
active
layer
of
the
memory
cell
[41].
Finally,
another
200
nm
thick
TiW
was
patterned
and
deposited
as
the
top
elec-
trode
for
electrical
contact.
A
quarter
cross-section
schematic
of
the
PCRAM
pore
cell
is
shown
in
Fig.
1(b).

J.K.
Behera
et
al.
/
Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
173
2.2.
Determining
transient
temperature
of
PCRAM
cell
Finite
element
analysis
(FEA)
simulations
were
performed
to
calculate
the
temperature
of
the
Ge2Sb2Te5in
the
memory
cell
as
a
function
of
time.
A
two-dimensional
axial
symmetric
memory
cell
was
considered.
We
assumed
that
the
materials’
thermal
conduc-
tivity
was
constant
with
temperature.
COMSOL
Multiphysics
was
used
to
solve
the
time-dependent
Joule
heating
thermal
transfer
in
the
Ge2Sb2Te5layer
using
the
standard
heat
conduction
equation
[42]:
∇.(!∇T)
+
Q
=
"Cp∂T
∂t
Where
Cpis
the
specific
heat,
"
is
the
density,
!
is
the
thermal
con-
ductivity,
T
is
the
temperature,
t
is
the
time,
and
Q
is
the
Joule
heat
per
unit
volume
per
unit
time.
The
thermal
conductivities
of
the
contact
electrode,
TiW,
phase
change
materials,
Ge2Sb2Te5,
and
the
insulating
layer,
SiO2,
were
chosen
to
be
60,
0.58,
and
1.4
Wm−1K−1
respectively
[43,44].
The
SiO2was
modeled
as
a
perfect
insulator.
2.3.
DFT
simulation
The
change
in
the
electronic
band
gap
of
the
face-centred
cubic
(FCC)
Ge2Sb2Te5due
to
the
external
electric
field
was
calculated
using
the
projector
augmented
wave
(PAW)
method
within
the
Vienna
ab-initio
simulation
package
(VASP),
density
functional
theory
(DFT)
code
[45–47].
The
generalised
gradient
approximation
(GGA)
with
the
Perdew-Burke-Ernzerhof
(PBE)
exchange-correlation
functional
was
employed
for
the
calculation
[48].
The
valence
configurations
for
germanium,
antimony,
and
tellurium
of
4s24p2,
5s25p3,
and
5s25p4,
respectively
were
con-
sidered
for
the
pseudopotentials.
A
slab
with
the
thickness
of
27
atomic
layers
was
used
and
the
energy
was
calculated
using
7
×
7
×
1
Monkhorst-Pack
k-point
grid.
The
cut-off
energies
of
175
eV
and
atomic
force
threshold
for
relaxation
of
0.01
eV/Å
were
considered
for
the
calculation.
3.
Results
3.1.
Transient
resistance
measurements
of
the
SET
state
of
the
PCRAM
cell
A
volatile
electrical
switching
is
realised
in
the
PCRAM
memory
cell
in
its
SET
state
by
measuring
the
transient
electrical
resistance.
The
electrical
resistance
of
the
Ge2Sb2Te5in
its
crystalline
state
is
modulated
by
applying
ultrashort
voltage
pulses.
A
schematic
illustration
of
this
volatile
electrical
switching
(resistance
modu-
lation)
is
shown
in
Fig.
1(a).
The
resistance
of
the
PCRAM
cell
was
measured
during
the
switching
pulse
using
an
ultrafast
electrical
characterisation
system
[31,49].
A
quarter
cross-section
schematic
of
the
PCRAM
pore
cell
and
the
ultrafast
electrical
tester
are
shown
in
Fig.
1(b)
and
(c).
Fig.
1(d)
shows
the
post-pulse
resistance
for
the
memory
cell.
Initially,
the
memory
cell
was
in
a
low
resis-
tance
state
of
∼5
k$
(SET
state).
A
voltage
pulse
was
applied
across
the
PCRAM
cell
to
switch
from
low
resistance
to
a
high
resistance
state
of
∼150
k$.
As
can
be
seen,
for
pulses
shorter
than
10
ns,
the
amplitude
of
the
pulse
needs
to
be
at
least
3.4
V
to
trigger
the
RESET
state.
On
increasing
the
pulse
time,
the
threshold
volt-
age
value
decreases.
Moreover,
the
memory
cell
still
remains
in
the
SET
state
when
a
2.5
V,
60
ns
pulse
was
applied.
Thus,
a
60
ns
pulse
was
used
to
study
the
transient
electrical
resistance
measure-
ment.
The
devices
were
initialised
by
first
amorphising
with
a
4.2
V,
40
ns
pulse,
and
then
the
cells
were
recrystallised
with
a
1.2
V,
900
ns
voltage
pulse.
A
DC
voltage
pulse
of
200
mV
was
used
to
read
the
SET
state
resistance
of
the
memory
cell.
The
transient
resis-
tance
measurement
consisted
of
four
steps:
(1)
A
constant
voltage
pulse
passed
from
a
pulse
generator
through
the
whole
circuit,
(2)
the
voltage
pulse,
VD,
was
measured
before
passing
it
through
the
memory
cell
and
a
reference
resistor.
The
voltage
drops
across
the
reference
resistor,
VR,
was
measured
as
a
function
of
time
whilst
the
voltage
pulse
was
applied,
see
Fig.
1(c).
(3)
The
voltage
drop
across
the
memory
cell
was
then
calculated
by
taking
the
differ-
ence
between
the
voltages
measured
at
VDand
VR.
(4)
The
transient
current
through
the
reference
resistor
was
calculated
from
VR,
thus
allowing
the
transient
resistance
of
the
memory
cell
to
be
calcu-
lated.
Volatile
switching
was
observed
in
the
Ge2Sb2Te5pore-like
PCRAM
devices.
60
ns
voltage
pulses
with
varying
amplitude
from
0.2
V
to
2.6
V
with
increments
of
0.2
V
were
applied
and
the
resis-
tance
of
the
memory
cell
was
measured
as
a
function
of
time.
A
matrix
of
the
applied
voltage,
time,
and
resistance
was
used
to
form
the
voltage-time
dependent
electrical
resistance
change
plot
shown
in
Fig.
1(e).
The
colour
represents
the
electrical
resistance
change
of
the
memory
cell.
Red
represents
the
high
resistance
state
while
blue
represents
the
low
resistance
state.
There
are
three
dif-
ferent
volatile
electrical
resistive
states
at
the
different
time
scales
within
a
single
voltage
pulse,
which
are
marked
as
region
1,
2,
and
3
in
Fig.
1(e).
These
three
regions
are
namely:
(1)
High
resistance,
where
the
cell
sharply
increases
by
1400
$
during
the
first
5
ns.
(2)
An
intermediate
resistance
state,
between
5
ns
and
20
ns,
where
the
resistance
of
the
memory
cell
decreases
but
remains
800
$,
higher
than
the
initial
crystalline
state.
The
intermediate
state
exists
for
20
ns
during
which
the
cell
resistance
remains
constant.
After
20
ns,
the
memory
cell
transits
from
the
excited
state
to
the
initial
low
resistance
state.
(3)
Low
resistive
state,
the
resistance
drops
back
to
300
$,
which
is
the
crystalline
state.
After
application
of
the
60
ns
pulse,
the
memory
cell
resistance
returned
to
that
of
the
crystalline
SET
state.
The
memory
cell
did
not
RESET
into
a
highly
resistive
amorphous
state.
The
same
measure-
ment
was
carried
out
by
replacing
the
memory
cell
with
a
known
5
k$
reference
resistor.
We
found
that
a
constant
resistance
was
obtained
during
the
pulse
time.
For
equivalent
circuit
for
the
elec-
trical
measurement
set-up,
shown
in
Fig.
1(b),
the
voltage
drop
on
PCRAM
memory
cell
is
calculated
by
the
equation
[50]:
VPCRAM =
VD×RPCRAM
RRef +
RPCRAM
×
e[−(t
%)]
Where
VDis
the
applied
voltage
from
the
pulse
generator,
RPCRAM
is
the
resistance
of
the
Ge2Sb2Te5in
the
SET
memory
cell,
RRef =
50
$,
is
the
reference
resistor,
t,
is
the
time,
%
=
RPCRAM ×
C,
is
the
characteristic
time,
and
C
is
the
equivalent
capacitance
of
the
mem-
ory
cell.
The
capacitance
of
the
memory
cell
was
calculated
by
C
=
!0!stA,
where
ε0=
8.854
×
10−12 Fm-1,
is
the
dielectric
constant
of
free
space,
εst=
33,
the
static
dielectric
constant
of
the
Ge2Sb2Te5
[51–54],
A
=
1
"m
×
1
"m,
is
the
overlapping
surface
area
of
the
con-
tact
electrodes,
and
d
=50
nm,
is
the
thickness
of
the
phase
change
materials
and
is
found
to
be
5.8
±
0.3
fF.
Considering
SET
state
resistance
of
the
memory
cell,
RPCRAM
=300
$,
the
characteristic
time
#
was
calculated
to
be
1.8
±
0.1
ps.
The
time
constant,
#,
is
much
smaller
than
the
measurement
time,
whilst
the
volatile
switching
is
observed
on
a
nanosecond
timescale.
This
confirms
that
the
volatile
change
in
resistance
is
specific
to
the
PCRAM
device
and
is
not
an
artefact
of
the
test
cir-
cuit
or
due
to
capacitive
effects.
Similarly,
the
amorphous
state
of
the
memory
cell
did
not
exhibit
this
transient
behaviour
which
con-
firms
the
transient
switching
is
due
to
the
crystalline
structure
of
Ge2Sb2Te5.
Even
when
a
voltage
pulse
of
2.5
V
was
applied,
the
memory
cell
does
not
switch
and
remains
in
the
crystalline,
SET
state.
Hence,
amorphisation
does
not
take
place.
Therefore,
we
call
this
volatile
increase
in
resistance
a
non-phase
change
switching
effect
in
the
PCRAM
cell.
We
hypothesised
that
the
variation
of

174
J.K.
Behera
et
al.
/
Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
Fig.
2.
(a)
The
atomic
layer
sequence
for
FCC
Ge2Sb2Te5in
a
hexagonal
setting.
Electronic
band
structure
of
the
crystalline
Ge2Sb2Te5slab
in
the
FCC
phase
(b)
without
electric
field
(E-field
=
0
eV/Å),
and
(c)
with
electric
field
(E-field
=
0.01
eV/Å).
The
electric
field
has
no
significant
effect
on
band
gap.
resistance
levels
in
the
three
different
regions
(1),
(2),
and
(3)
of
the
memory
cell
(see
Fig.
1(e))
is
due
to
either
the
electric
field
or
thermal
energy
or
due
to
both.
3.2.
Electric-field
effect:
DFT
computations
We
used
DFT
to
compute
the
effect
of
an
electric
field
on
the
crystal
structure
and
electronic
band
structure
of
FCC
Ge2Sb2Te5.
A
hexagonal
simulation
cell
was
used
with
the
Ge,
Sb,
Te
atoms
and
vacancies
placed
according
to
a
FCC
stacking
sequence
[55].
The
simulation
cell
had
lattice
constants
of
a0=
4.26
Å,
c0=
52.3
Å
[55];
the
layer
sequence
of
the
structure
is
shown
in
Fig.
2(a).
A
5
nm
thick
slab
model
of
27
atomic
layers
of
crystalline
Ge2Sb2Te5
was
used
for
computation.
This
Ge2Sb2Te5slab
was
then
relaxed
with
no
external
electric
field,
and
with
an
electric
field
of
0.01
eV/Å
applied
in
the
direction
perpendicular
to
the
slab
plane.
This
electric
field
is
equivalent
to
5
V
being
applied
to
the
memory
cell,
which
has
a
500
Å
layer
of
Ge2Sb2Te5.
The
electronic
band
structures
for
the
two
structures
were
calculated
with
and
without
the
E-field,
shown
in
Fig.
2(b)
and
(c).
The
crystal
structure
and
the
electronic
band
structure
do
not
change
after
applying
this
E-field.
The
calcu-
lated
band
gap
remains
0.40
eV.
This
result
shows
that
when
voltage
pulses
up
to
5
V
are
applied
the
memory
cell,
the
generated
static
field
does
not
cause
any
changes
to
the
crystal
and
electronic
struc-
ture
of
Ge2Sb2Te5.
However,
in
reality,
the
voltage
pulses
cause
an
electric
current
to
flow,
and
therefore,
Joule
heating
is
possible.
Therefore,
it
is
likely
that
the
volatile
resistance
switching
shown
in
Fig.
1(e),
has
a
thermal
origin.
For
this
reason,
it
is
necessary
to
know
the
temperature
of
the
Ge2Sb2Te5during
the
observed
transient
change
in
resistance.
3.3.
Transient
temperature
We
investigate
the
role
of
temperature
on
the
Ge2Sb2Te5resis-
tance
transient
using
FEA.
The
results
are
shown
in
Fig.
3.
The
FEA
simulation
shows
that
for
an
electric
pulse
of
60
ns
and
0.5
V,
the
peak
temperature
of
the
Ge2Sb2Te5layer
increases
to
392
K,
which
is
substantially
lower
than
the
melting
temperature
of
907
K
[20].
Further
increasing
the
voltage
to
1.5
V
and
2.0
V,
increases
the
peak
temperature
to
510
K
and
675
K
respectively,
as
shown
in
Figs.
3(b)
and
3(c).
The
peak
temperature
rises
to
885
K
for
pulses
of
2.5
V,
see
Fig.
3(d).
These
models
indicate
that
the
crystalline
structure
of
the
Ge2Sb2Te5does
not
melt
for
the
voltage
pulses
used
in
the
switching
experiment.
However,
considering
the
small
band
gap
of
crystalline
Ge2Sb2Te5of
0.5
eV
[56,57],
this
temperature
range
will
thermally
excite
charge
carriers
across
the
band
gap.
Hence,
the
large
volatile
increase
in
resistance
shown
in
Fig.
1(e),
is
a
result
of
Ge2Sb2Te5being
in
an
out
of
thermal
equilibrium
state.
4.
Discussion
The
volatile
electrical
resistance
is
unlikely
to
be
due
to
the
local
structural
changes,
because
we
would
expect
these
changes
to
be
non-volatile.
The
DFT
and
FEA
models
suggest
that
the
sharp
volatile
increase
in
the
resistance
during
the
first
5
ns
of
the
volt-
age
pulse
is
mainly
due
to
heat.
The
electric
field
effect
is
weak
and
has
no
effect.
Fig.
4(a)
shows
that
a
memory
cell
can
have
dif-
ferent
resistive
states
at
different
times
during
the
voltage
pulse,
without
undergoing
a
phase
transition.
On
longer
timescales,
the
memory
cell
relaxes
back
to
the
equilibrium
crystalline
state
with
the
lower
resistance
of
300
$,
see
region
3
of
Fig.
1(e).
To
establish
the
influence
of
temperature
on
the
memory
cell
resistance
during

J.K.
Behera
et
al.
/
Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
175
Fig.
3.
Simulated
temperature
profile
of
the
half
cross-section
of
a
planer
pore
struc-
ture
PCRAM
cell.
Temperature
profiles
of
the
cell
with
different
applied
voltages:
(a)
0.5
V
(b)
1.5
V
(c)
2.0
V,
and
(d)
2.5
V
after
a
60
ns
pulse.
The
peak
temperature
of
the
phase
change
component
Ge2Sb2Te5was
calculated
in
the
SET
state.
the
voltage
pulse,
we
plot
the
measured
electrical
resistivity
of
the
of
the
Ge2Sb2Te5as
a
function
of
the
modelled
temperature.
The
temperature
was
obtained
from
the
FEA
calculation
and
the
results
are
shown
in
Fig.
3.
We
found
that
the
resistivity
of
the
Ge2Sb2Te5
in
the
memory
cell
increases
with
temperature
up
to
a
temperature
of
500
K,
which
is
metallic
behaviour.
Upon
further
increasing
the
temperature,
the
resistivity
of
the
Ge2Sb2Te5gradually
decreases.
This
indicates
semiconductor
behaviour.
Ge2Sb2Te5is
a
p-type
semiconductor
[58].
The
resistivity
of
a
semiconductor
depends
on
the
number
of
carriers
and
mobility,
which
is
defined
as
"
=1
q(np'p).
Where
"pis
the
hole
mobility,
npis
the
hole
concentration,
and
q
is
the
electron
charge.
Both
the
parameters,
npand
"p,
are
temperature
dependent,
and
with
increasing
temperature,
the
number
of
carriers
increases
expo-
nentially.
However,
there
is
also
a
concomitant
reduction
in
hole
mobility
due
to
lattice
scattering.
The
semiconductor
band
gap,
Eg
was
calculated
from
Fig.
4(b)
by
fitting
a
temperature
dependent
electrical
resistivity
function
[59]:
$(T)
=1
Ae
−[( Eg
2!ˇT)]
+
BT −3
2
Where
"
is
the
resistivity,
T
is
the
room
temperature,
%&is
the
Boltz-
mann’s
constant,
A
and
B
are
the
fitting
constants
that
relates
to
the
ground
state
resistivity.
The
resistance-temperature
plot
was
fit-
ted
with
above
equation
and
the
Egwas
found
to
be
0.58
±
0.03
eV.
The
modeled
fitting
electronic
band
gap
is
similar
to
the
band
gap
Fig.
4.
(a)
Time-dependent
resistance
change
of
the
PCRAM
cell
when
a
voltage
pulse
of
2.4
V,
60
ns
is
applied
in
the
crystalline
state.
(b)
Resistivity
change
as
a
function
of
the
memory
cell’s
temperature.
The
inset
image
shows
the
modelled
time-dependent
temperature
of
the
memory
cell
of
a
2.4
V,
60
ns
voltage
pulse.
reported
for
crystalline
Ge2Sb2Te5material
experimentally
[60]
and
this
gives
us
some
confidence
in
the
accuracy
of
our
model.
Interestingly,
recent
angular
resolved
photoelectron
spec-
troscopy
of
FCC
Ge2Sb2Te5showed
that
the
valence
band
maximum
is
100
meV
below
the
Fermi
energy
level,
Ef[61].
Disordered
vacan-
cies
in
the
cubic
Ge2Sb2Te5lead
to
broad
valence-band
electron
energy
states.
The
tail
of
the
valence-band
electron
energy
overlaps
with
Efthus
allowing
a
level
of
conduction
despite
the
average
elec-
tron
energy
in
the
valence
band
maximum
being
100
meV
below
Ef.
The
temperature
dependent
resistivity
of
FCC
Ge2Sb2Te5in
the
PCRAM
cell
shows
two
parallel
processes
when
a
short
voltage
pulse
is
applied.
For
the
short
timescale
<5
ns,
the
temperature
of
the
active
layer
is
<500
K.
In
this
regime,
the
electron-phonon
and
lattice
scattering
dominates
over
the
memory
cell
resistance.
Since
some
charge
carriers
have
energy
above
the
Ef,
phonon
scat-
tering
causes
these
to
scatter.
Due
to
the
large
scattering
effect,
the
mobility
of
the
charge
carries
decreases
faster
than
the
car-
rier
concentration
increases.
i.e. ∂'p
∂T≫∂np
∂T,
where
"pis
the
hole
mobility
and
npis
the
hole
concentration.
As
a
consequence,
the
overall
resistivity
of
FCC
Ge2Sb2Te5increases
and
it
shows
a
metal-
lic
behaviour
[62].
In
contrast,
on
longer
time
scale
>10
ns,
the
temperature
increases
above
500
K.
The
charge
carriers
are
ther-
mally
excited,
and
a
large
number
of
carriers
contribute
to
the
conduction
process.
The
carrier
concentration
increase
rate
is
larger
than
the
mobility
change.
i.e. ∂np
∂T≫∂'p
∂T.
This
results
in
a
decrease

176
J.K.
Behera
et
al.
/
Journal
of
Materials
Science
&
Technology
50
(2020)
171–177
Fig.
5.
(a)
Schematic
of
the
ultrashort
voltage
pulse
train
applied
to
the
memory
cell.
(b)
Endurance
measurement
of
the
SET
phase
of
a
PCRAM
cell
of
the
voltage
pulse
of
1.2
V,
10
ns
with
a
1
"s
of
pulse
separation.
The
memory
cells
are
reversibly
switched
up
to109cycles
with
three
times
resistance
ratio.
in
the
resistivity
with
temperature;
a
semiconductor
behaviour,
see
Fig.
4(b).
Therefore,
we
conclude
that
the
volatile
resistance
switching
in
the
PCRAM
cell
is
due
to
the
trade-off
between
scattering
and
carrier
concentration.
The
resistance
of
the
memory
cell
initially
increases
due
to
the
scattering
of
electrons
with
energies
above
Ef.
Upon
further
increasing
the
temperature,
electrons
below
the
Ef
are
promoted
into
the
conduction
band,
consequently,
decreasing
the
memory
cell
resistance
[62].
The
electrical
switching
measure-
ments
and
FEA
simulations
provide
strong
evidence
of
volatile
resistive
electrical
switching
in
phase
change
memory
cells
with-
out
a
structural
transition.
In
the
Fig.
1(d),
we
show
that
the
pulse
voltages
greater
than
2.8
V
and
60
ns
are
required
to
switch
the
material
into
the
amorphous
state.
However,
here,
the
maximum
voltage
pulse
that
we
applied
was
2.5
V
and
the
RESET
switch
to
the
amorphous
state
cannot
occur.
We
expect
that
transport
mea-
surements
at
elevated
temperatures
would
confirm
that
the
FCC
state
can
exhibit
momentary
increases
in
resistance.
However,
this
is
challenging
due
to
crystallisation
into
the
hexagonal
state.
More-
over,
time-resolved
structural
data
during
the
excitation
would
further
show
that
the
structural
transition
does
not
occur.
4.1.
Application:
high
endurance
switching
The
electrical
resistance
measurements
during
a
voltage
pulse,
the
transient
temperature
simulations,
and
the
DFT
models
suggest
that
the
non-phase
change
switching
is
a
consequence
of
the
bal-
ance
between
electron-phonon
lattice
scattering
and
increases
in
the
charge
carrier
density
in
the
memory
cell.
However,
to
demon-
strate
the
true
potential
of
this
concept,
cyclability
of
the
non-phase
change
switching
in
the
SET
phase
of
PCRAM
cell
was
performed.
The
PCRAM
cell
was
set
into
the
crystalline
state.
A
1.2
V,
10
ns
pulse,
which
is
below
the
PCRAM
RESET
voltage
of
4.2
V
was
cycli-
cally
applied.
The
voltage
pulses
were
separated
by
1
"s.
To
confirm
the
structural
state
of
the
Ge2Sb2Te5before
and
after
the
volt-
age
pulse,
the
resistance
of
the
memory
cell
was
measured
with
a
DC
voltage
of
200
mV.
The
transient
resistance
in
the
SET
state
of
PCRAM
cell
was
measured
and
plotted
against
the
number
of
switching
cycles,
as
shown
in
Fig.
5(b).
The
memory
cell
resistance
in
the
excited
state
is
called
a
high
resistance
state
(HRS)
and
in
the
relaxed
state
is
called
a
low
resistance
state
(LRS).
The
endurance
plot
clearly
shows
that
the
HRS
and
LRS
are
well
separated
by
sev-
eral
hundreds
of
ohms.
Most
interestingly,
we
found
that
the
device
performs
ON↔OFF
successfully
more
than
109cycles
without
fail-
ure.
We
only
terminated
the
experiment
due
to
time
constraints.
Failure
in
PCRAM
devices
is
a
common
problem
and
shows
an
endurance
typically
in
the
order
of
106-to-108[58].
Indeed,
devices
with
a
similar
architecture
have
an
endurance
up
to
106SET-RESET
cycles
[19].
However,
in
the
non-phase
change
volatile
electrical
resistance
change,
which
is
reported
here,
the
switching
cycles
is
a
lot
greater.
In
theory,
we
believe
this
effect
allows
for
infinite
cyclability
because
no
structural
changes
take
place.
Hence,
the
stress
in
the
materials
and
the
memory
cell
is
minimised.
This
non-
phase
change
switching
of
109cycles
is
achieved
with
a
voltage
pulse
width
of
10
ns,
which
is
similar
to
the
DRAM
speed
[63].
This
demonstrates
that
PCRAM
can
achieve
a
higher
number
of
volatile
cycles
than
non-volatile
phase
change
memory
based
on
Ge2Sb2Te5.
5.
Conclusions
We
successfully
demonstrated
a
volatile
electrical
switching
process
in
the
SET
state
of
PCRAM
cells.
We
showed
that
the
electri-
cal
resistance
change
in
Ge2Sb2Te5can
occur
without
a
structural
transition.
Additionally,
we
have
demonstrated
that
the
switching
effect
has
a
high
endurance.
Apply
a
voltage
pulse
below
that
nec-
essary
for
amorphisation
causes
a
temporary
three-fold
increase
in
the
memory
cell’s
electrical
resistance
for
a
period
less
than
5
ns.
Our
analysis
shows
that
a
combined
effect
of
Joule
heating
induced
electron-phonon
lattice
scattering
and
carrier
excitation
can
explain
this
increase.
This
volatile
resistance
switching
effect
in
Ge2Sb2Te5devices
does
not
require
a
structural
transition.
The
next
step
should
be
to
design
phase
change
materials
which
are
engineered
to
have
even
larger
changes
in
transient
resistance
on
nanosecond
timescales.
This
concept
can
be
employed
to
design
future
high-speed
universal
memories,
volatile
logic
devices,
and
non-von
Neumann
computing
process
system.
Acknowledgements
The
research
presented
herein
was
funded
by
the
Singapore
Ministry
of
Education
(MOE)
with
a
Tier-2
grant
(MOE2017-T2-1-
161).
JKB
is
grateful
for
his
PhD
presidential
graduate
fellowship
and
acknowledges
support
from
the
MOE.
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