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A Timed-Value Stream Based ESL Timing and Power Estimation and Simulation Framework for Heterogeneous MPSoCs

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Kim Grüttner at German Aerospace Center (DLR)
Kim Grüttner
Philipp A. Hartmann at Apple Inc.
Philipp A. Hartmann
Tiemo Fandrey
Tiemo Fandrey
Tiemo Fandrey
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Kai Hylla
Kai Hylla
Kai Hylla
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Abstract and Figures

Consideration of an embedded system’s timing behavior and power consumption at system-level is an ambitious task. Sophisticated tools and techniques exist for power and timing estimations of individual components such as custom hard- and software as well as IP components. In this article we present an ESL framework for timing and power aware virtual system prototyping of heterogeneous MPSoCs consisting of software, custom hardware and 3rd party IP components. In virtual platform, previously only used for functional software verification, our proposed timed value streams enable a hierarchical and composable power model. Our proposed ESL framework supports the integration of a broad range of system-level timing and power models into virtual platform. Power and timing models can either be generated from a functional C/C++ description or include state-machine based power models to existing functional and timed virtual platform (black-box) components. Our timed value stream based power model supports the run-time analysis of different platform power management strategies with configurable temporal abstraction, supporting simulation speed and accuracy trade-offs. This work evaluates timing and power back-annotation and power state machine based approaches with timed value streams in two use-cases: An MP3 decoder, compared to a power-aware ISS and gate-level simulation, and an FPGA based many-core architecture against measurements. Finally, the simulation time overhead of the proposed stream based power model is analyzed and discussed.
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Vol.:(0123456789)
International Journal of Parallel Programming (2020) 48:957–1007
https://doi.org/10.1007/s10766-020-00656-0
1 3
A Timed‑Value Stream Based ESL Timing andPower
Estimation andSimulation Framework forHeterogeneous
MPSoCs
KimGrüttner1· PhilippA.Hartmann1· TiemoFandrey1· KaiHylla1·
DanielLorenz1· StefanHauck‑Stattelmann2· BjörnSander3·
OliverBringmann4· WolfgangNebel1,5· WolfgangRosenstiel4
Received: 28 May 2015 / Accepted: 14 February 2020 / Published online: 5 March 2020
© Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract
Consideration of an embedded system’s timing behavior and power consumption
at system-level is an ambitious task. Sophisticated tools and techniques exist for
power and timing estimations of individual components such as custom hard- and
software as well as IP components. In this article we present an ESL framework for
timing and power aware virtual system prototyping of heterogeneous MPSoCs con-
sisting of software, custom hardware and 3rd party IP components. In virtual plat-
form, previously only used for functional software verification, our proposed timed
value streams enable a hierarchical and composable power model. Our proposed
ESL framework supports the integration of a broad range of system-level timing and
power models into virtual platform. Power and timing models can either be gen-
erated from a functional C/C++ description or include state-machine based power
models to existing functional and timed virtual platform (black-box) components.
Our timed value stream based power model supports the run-time analysis of differ-
ent platform power management strategies with configurable temporal abstraction,
supporting simulation speed and accuracy trade-offs. This work evaluates timing
and power back-annotation and power state machine based approaches with timed
value streams in two use-cases: An MP3 decoder, compared to a power-aware ISS
and gate-level simulation, and an FPGA based many-core architecture against meas-
urements. Finally, the simulation time overhead of the proposed stream based power
model is analyzed and discussed.
Keywords ESL timing and power instrumentation· Power state machine· Timed
value stream power model
* Kim Grüttner
kim.gruettner@offis.de
Extended author information available on the last page of the article
Content courtesy of Springer Nature, terms of use apply. Rights reserved.
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