Design, Modeling, and Simulation of a Bidirectional Three-Phase PWM AC/DC Converter

Abstract

With increased integration of renewable resources into the power distribution system,
bidirectional ac/dc converters are gaining popularity in interfacing the utility grid and
energy storage systems. This thesis presents design and modeling of a three-phase
bidirectional PWM ac/dc converter with high power factor, low current THD, and high
efficiency. Design expressions for the passive components based on current ripple,
voltage ripple, and load transients will be proposed. A mathematical model to represent
the dynamic behavior of the converter will be derived using a Switched model and the
Generalized Averaging Method. A cascaded control system with an outer voltage
controller, an inner hysteresis current controller, and a phase-locked loop algorithm will
be designed utilizing the derived converter transfer functions. The designed system will
be set up and simulated using PLECS simulation platform. Simulation results will be
presented to validate the design and to analyze the system performance during
steady-state, start-up, load-transients, and grid-distortion conditions.

Full text

Design, Modeling, and Simulation of
a Bidirectional Three-Phase PWM
AC/DC Converter
A Master’s Thesis
Submitted to the Faculty of
The Department of Electrical and Computer Engineering
Villanova University
By
Victor Paduani
In Partial Fulfillment
of the Requirements for the Degree of
Master of Science in Electrical Engineering
April 29, 2019

Copyright 2018 by Victor Paduani
All Rights Reserved
ii

iii
Villanova University
Electrical and Computer Engineering Department
ECE 9031&9032: MASTER’S THESIS
APPROVAL FORM
Student’s Name:Victor Daldegan Paduani
Title of Thesis:Design, Modeling, and Simulation of a
Bidirectional Three-Phase PWM AC/DC Converter
Date Submitted: April 26, 2019
Approving Signatures:
Nisha Kondrath, Ph.D.
Thesis Committee Chair and Primary Advisor
Pritpal Singh, PhD
Faculty Advisor
Mahmoud Kabalan, PhD
Faculty Advisor
Bijan G. Mobasseri, Ph.D.
ECE Department Chair
A copy of this thesis is available for research purposes at ProQuest.com
Bijan G. Mobasseri
Digitally signed by Bijan G. Mobasseri
Date: 2019.04.29 09:48:46 -04'00'

Acknowledgment
I would first like to thank my thesis advisor Dr. Nisha Kondrath for our long
discussions and her diligent attention when reviewing my writting. Her office’s door
was always open whenever I needed assistance, and her friendly supervision greatly
alleviated the challenges of the graduate school life.
I wish to thank Dr. Mahmoud Kabalan at the University of St. Thomas as a
committee member of this thesis. I am gratefully indebted to him for his assistance and
support during my masters.
I also wanted to express my sincere gratitude and appreciation for Dr. Pritpal Singh,
for his candid guidance, advice and support throughout my research at Villanova
University.
I am grateful for my family members Clederson, Ana Maria, and Ana Laura for their
eternal love and long-distance encouragement, and for Meghan Cioci, for all her love
and support.
I thank the Department of Electrical & Computer Engineering and College of
Engineering at Villanova University for the funding support I received throughout my
Masters program. I also wish to thank Enersys.Inc for their valuable input and
sponsorship of this project.
Finally, I thank every member of our research group from Sustainable Energy Research
Group. I could not have picked a better group to interact and share a workspace with.
v

Abstract
With increased integration of renewable resources into the power distribution system,
bidirectional ac/dc converters are gaining popularity in interfacing the utility grid and
energy storage systems. This thesis presents design and modeling of a three-phase
bidirectional PWM ac/dc converter with high power factor, low current THD, and high
efficiency. Design expressions for the passive components based on current ripple,
voltage ripple, and load transients will be proposed. A mathematical model to represent
the dynamic behavior of the converter will be derived using a Switched model and the
Generalized Averaging Method. A cascaded control system with an outer voltage
controller, an inner hysteresis current controller, and a phase-locked loop algorithm will
be designed utilizing the derived converter transfer functions. The designed system will
be set up and simulated using PLECS simulation platform. Simulation results will be
presented to validate the design and to analyze the system performance during
steady-state, start-up, load-transients, and grid-distortion conditions.
vii

ix
Contents
Acknowledgements v
Abstract vii
1 Introduction 1
1.1 History of Power Converters .......................... 5
1.2 Wide-Bandgap Semiconductors ......................... 6
1.3 Motivation ..................................... 8
1.4 Objectives ..................................... 8
2 Review of Related Literature 11
2.1 Bidirectional AC/DC Converters ........................ 11
2.2 Current Controllers ................................ 13
2.3 Voltage Controllers ................................ 15
2.4 Grid Synchronization ............................... 16
2.5 Small-Signal Analysis ............................... 22
3 Bidirectional PWM AC/DC Converter Modeling and Design 25
3.1 Circuit Operation ................................. 25
3.2 Design of DC-Link Capacitor .......................... 28
3.2.1 Low-frequency ripple .......................... 28
3.2.2 High-frequency ripple .......................... 29
3.2.3 Energy storage for load transient .................... 30
3.3 Design of Grid-Side Inductors .......................... 30
3.4 Mathematical Modeling ............................. 31

x
3.4.1 Switched model .............................. 32
3.4.2 Generalized averaged model ...................... 37
3.4.3 Small-signal model ............................ 41
3.4.4 Converter Transfer functions ...................... 42
3.5 Design Parameters ................................ 42
4 Control System Design 45
4.1 Current Controller ................................ 45
4.1.1 Control-to-current transfer function Gc................ 46
4.1.2 Hysteresis block transfer function Gh................. 47
4.2 Voltage Controller ................................. 49
4.2.1 Current-to-voltage transfer function Gv................ 50
4.2.2 PI controller ................................ 52
4.3 Phase-Locked Loop ................................ 54
4.4 Digital Controller ................................. 56
4.5 Inverter Mode of Operation ........................... 60
5 Simulation 63
5.1 PLECS Simulation Model Setup ......................... 63
5.2 Steady-State Operation .............................. 66
5.3 Converter Operation at Start-up ......................... 71
5.4 Load Transients .................................. 74
5.5 Grid Distortion .................................. 78
6 Conclusions 81
6.1 Future Work .................................... 82
References 85

xi
List of Figures
1.1 Full record of CO2measurements in Mauna Loa ............... 3
1.2 CO2measurements last 300 years ........................ 3
1.3 CO2measurements last 800,000 years ..................... 4
2.1 Three-phase diode rectifier. From [15]. ..................... 12
2.2 Three-phase PWM converter. From [16]. .................... 12
2.3 Hysteresis current control in dq0 coordinates. From [19]. .......... 13
2.4 Hysteresis current control in abc coordinates. ................. 14
2.5 Control system for a single-phase PWM converter. From [24]. ....... 16
2.6 PLL block in a PWM rectifier control. From [29]. ............... 17
2.7 Dq0 PLL block. From [30]. ............................ 18
2.8 Direct Power Control. From [33]. ........................ 20
2.9 Voltage Oriented control. From [37]. ...................... 21
2.10 Relation between models. From [52]. ...................... 24
3.1 Three-phase ac/dc converter diagram. ..................... 26
3.2 Behavior of the hysteresis current control for each phase. .......... 27
3.3 Equivalent circuits of the converter for different switched configurations. . 33
4.1 Current closed-loop. ............................... 46
4.2 Bode plots of Gc................................... 47
4.3 Bode plots of Gh.................................. 48
4.4 Bode plot of Gc
cl ................................... 49
4.5 Bode plot of Gc
cl from PLECS. .......................... 49

xii
4.6 Voltage closed-loop. ................................ 50
4.7 Bode plots of Gv.................................. 51
4.8 Bode plots of GvoL................................. 51
4.9 Bode plots of the controller’s effort ....................... 53
4.10 Step response of tuned system .......................... 53
4.11 Bode plots of Gv
cl .................................. 54
4.12 Block diagram of the standard PLL. ...................... 55
4.13 Block diagram of the DSOGI PLL. ....................... 57
4.14 Block diagram of the SOGI algorithm. ..................... 58
4.15 Block diagram including ADC & DAC conversions. ............. 59
4.16 Bode plots of Gv
cl in reversed operation. .................... 61
5.1 Three-phase ac/dc converter schematic in PLECS. .............. 64
5.2 Block diagram of the standard PLL. ...................... 65
5.3 Current controller for one phase. ........................ 65
5.4 Alternative current control block diagram. .................. 66
5.5 Steady-state grid-side current waveforms ................... 67
5.6 Voltage vaand current iawaveforms ...................... 69
5.7 Output current io................................. 69
5.8 DC-link voltage ripple. .............................. 70
5.9 Start-up of the converter period ......................... 73
5.10 Synchronization of the PLL with the grid during start-up .......... 74
5.11 DC-link voltage response to load transients .................. 75
5.12 Input current responses to load transients ................... 76
5.13 Step responses in MATLAB and PLECS .................... 77
5.14 PLL response under unbalanced three-phase source. ............. 79
5.15 PLL response under introduction of 3rd harmonics into the source. . . . . 79
5.16 System operating under strong 3rd harmonic. ................. 80

1
Chapter 1
Introduction
It has been said that solid-state electronics brought in the first electronics revolution,
whereas solid-state power electronics brought in the second [1]. Indeed, the advance-
ments of power semiconductor devices and control electronics from the past decades
has tremendously impacted our society by improving power converter technology in
terms of size, cost, reliability, and performance [2]. This not only improved the voltage
and current ratings of power semiconductor devices, but it also enabled the invention
of new topologies, control algorithms, and plug-and-play devices that could be easily
used for daily applications such as renewable energy harvesting.
The applicability of power converters is rapidly expanding in the residential, com-
mercial, and industrial fields. The potential of converting electric energy between ac
and dc sources, and the ability to set the voltage, current, and frequency to predeter-
mined values turned power converters into indispensable parts of today’s grid. Fur-
thermore, their importance goes beyond the scope of renewable energy. Besides their
role in wind and solar energy integration to the grid, they are also valuable as efficient
motor drives and battery chargers. It is estimated that electric motors account for be-
tween 43% and 46% of all global electricity consumption [3]. If variable speed drives
were used in air-conditioner/heat pump drives instead of thermostatically-controlled
systems, up to 30% of that consumed energy could be saved [1].
In addition to the technological progress and all the economic advantages that rose
with the enhancement of power converters, it is vital to also keep in mind their envi-
ronmental importance, since they are the key for a successful integration of renewables

2Chapter 1. Introduction
to the grid. In the last century, the population growth and the mass production of
electricity-based devices have led to a continuous increase of electric power demand.
Consequently, to maintain this increased demand under stable grid conditions tons
of fossil fuels have to be burned every day. Most individuals never even realize the
fragility of this rampant scenario.
This extensive use of fossil fuels presents a risk to ecosystems around the globe,
increasing the rate of natural disasters and exposing our delicate climate balance to
disturbances and conditions never experienced before. Catastrophes such as the sea
level rise, glacial loss, acid rain, and forest fires, and global warming have been proven
to be directly associated with the action of humans over the years [4]. Furthermore,
since the concentration of carbon dioxide in the atmosphere today has reached a peak
never experienced before, it is unknown until which point this process can be reversed.
Recent measurements in Mauna Loa, Hawaii, indicate that despite all the efforts
to substitute the consumption of fossil fuels with renewable resources, there is still a
steady rise in the concentration of carbon dioxide (CO2) in the atmosphere, which high-
lights the question of until when the accelerated global warming caused by the increase
of carbon dioxide can be stopped. A full record of all measurements obtained in the
observatory in Mauna Loa is displayed in Fig. 1.1. Clearly, the highest daily average
measured is being continuously increasing day by day. The latest data point added to
the graph corresponds to April 1st, 2019. By comparing the maximum point from Fig.
1.1 with the measurements from Fig. 1.2 and Fig. 1.3, it is obvious that the maximum
registered from Fig. 1.1 correspond to the highest value ever observed in the last 800,000
years. The reader is encouraged to visit the Keeling Curve website [5] to compare the
current carbon dioxide measurements with the ones presented in this thesis.
To counteract this unrelenting increase in carbon dioxide emissions, creative alter-
natives have to be further pursued. At first, nuclear energy appeared to be a viable
solution, but up to now the associated safety risks of nuclear power plants, and the
uncertainty of how to deal with nuclear waste are strong drawbacks that oppose their
expansion. For the moment, one of the most effective alternatives to counter the fossil

Chapter 1. Introduction 3
FIGURE 1.1: Full record of CO2measurements in Mauna Loa [5].
FIGURE 1.2: Last 10,000 years [6].

4Chapter 1. Introduction
FIGURE 1.3: Last 800,000 years [7].
fuel consumption is the substitution of thermal power stations for clean emission-free
renewable resources such as solar, wind, and hydroelectric energy. Yet, these sources
are known for their uncertain and unreliable characteristics, which impose a challenge
for their implementation to the grid. It is then up to researchers and engineers to devise
solutions that are economically feasible, and reasonably practical so that these alterna-
tive methods can be accepted in today’s competitive market.
This chapter contains an overview of the history behind the surging of power con-
verters, the type of converter typology studied, a review of the kind of semiconductor
chosen, the motivation to study the topic, and the objectives of the present work. The
structure of the thesis is divided as follows: Chapter 1 introduces the reader to the
topic. Chapter 2 features the literature review, stating the most popular techniques to
deal with each problem, and interesting approaches attempted by previous authors.
Chapter 3 explains the design of the passive components and the mathematical mod-
eling of the converter. Chapter 4 discusses the control system design, including Bode
plots and transfer functions of the state-space variables. Chapter 5 presents the simula-
tion results, and Chapter 6 summarizes the main contributions and conclusions of the

1.1. History of Power Converters 5
work.
1.1 History of Power Converters
Until half a century ago, there was only one possible type of power system structure,
with large scale generation, transmission, and distribution systems. In that model, the
generation was performed by huge synchronous machines in thermal power plants fed
by fossil fuels, or hydro-power in hydro power plants, both located far away from the
consumer. Transmission systems would be coordinated to properly transport in high
voltage the bulk of electric power between substations, and distribution systems would
be responsible to adjust the energy to low voltage levels, ensuring a reliable and safe
supply of power to the consumer. However, with the invention of the transistor and
other power electronic devices, there was a new possible way of supplying the load, by
generating energy in low voltage at the consumer level, avoiding transmission losses,
and reducing the carbon footprint. In the new grid, energy does not need to be always
generated far away from the consumer. It can be produced and consumed locally with
renewable energy resources. This kind of local generation is defined as Distributed
Generation (DG).
Unlike the isolated power plants, a DG system may be located in proximity to the
load. However, most sources of renewable energy produce electric energy in a form that
cannot be directly integrated to the grid. For example, the photovoltaic effect observed
in solar panels can be represented as a dc current source. In contrast, induction-motor-
based wind turbines generate electricity as ac voltage sources with variable frequencies.
It is evident that it would be impossible to connect both systems directly into an ac grid
designed to operate at fixed voltage and frequency. A solution to this problem requires
a mechanism capable of converting energy from one form to another.
Such conversions were extremely inefficient in their early stages, with two rotating
machines coupled by the same axis so that electrical energy would be converted into
mechanical form, and then into electrical form again. It was only with the invention of

6Chapter 1. Introduction
the transistor, and the development of semiconductor technology that a new approach
was created. Semiconductor devices were fabricated to operate as easily controllable
electrical switches, enabling a new form of energy conversion that could be accom-
plished solely in the electrical domain. This new method was found to be so much
better than the previous ones that soon it became an industry standard, and the devices
responsible for its execution were named as power converters.
A power converter is capable of controlling the flow of energy from a given source
by supplying voltages and currents in a form that is optimally suited for user loads
[8]. The different types of power converters include ac-dc converters (rectifiers), dc-ac
converters (inverters), dc-dc converters, and ac-ac converters based on the source and
load types. Besides enabling the electrical connection between various sources, power
converters can also change voltage and current magnitudes, regulate frequency values,
and in some cases include a galvanic isolation between load and source.
At their early stages, power converters were designed so that the power flow would
be unidirectional, i.e., from the source side to the load side only. Nevertheless, with the
concept of a smart grid, a growing interest in grid-tied models that could either pur-
chase or sell energy back to the grid emerged; which requires power flow from the grid
to the load side and vice versa. Bidirectional converters facilitate the required bidirec-
tional power flow in this case. For example, a bidirectional ac/dc converter operates
as a rectifier when charging a battery from the grid and as an inverter when the bat-
tery supplies power back to the grid. Another example of this mode of operation is
the regenerative braking of an electrical motor, which nowadays is ubiquitous in hy-
brid/electric vehicles.
1.2 Wide-Bandgap Semiconductors
SiC and GaN have a relatively large bandgap when compared to Si. Silicon has a
bandgap of 1.1 electronvolt (eV), whereas wide-bandgap materials have bandgaps in
the range of 2 - 4 eV [9]. The search for silicon substitutes came from the continuous

1.2. Wide-Bandgap Semiconductors 7
increase of industry demands for higher breakdown voltages, switching frequencies,
and efficiency. In the last decades, advances in wide-bandgap technologies reduced the
production cost, which allowed such devices to become competitive alternatives for sil-
icon. When analyzing what would be the trend for wide-bandgap semiconductors in
the future, Tolbert et al. suggested that diamond-based devices will become dominant
in the next 20-50 years, but that until then the transition material will be SiC [10]. Al-
though silicon has been the basic raw material for power semiconductor devices for a
long time; SiC, GaN and diamond display significant future promise, and it is expected
that eventually most silicon-based power devices will disappear from the market [1].
Being the most researched and developed wide-bandgap material, SiC has been
greatly improved by CREE Inc., founded in 1987. Due to its increased bandgap energy,
SiC-based devices are able to operate at higher temperatures and frequencies, which
significantly reduces the sizing of transformers, filter components, and thermal man-
agement systems.
Emerging silicon carbide MOSFET power devices promise to replace silicon IGBTs
in most applications by enabling superior efficiency and power density, as well as ca-
pability to operate at higher temperatures [11]. With the expectations of SiC becoming
the transient material between Si and diamond, and the advantages of SiC MOSFETs
over Si IGBTs, the power converter in this thesis will utilize SiC high power MOSFET
devices.
Due to their practicability, the presence of power converters in the market has as-
cended to the point where even small improvements in their efficiency translates into
enormous savings in electric energy consumption. Until a few decades ago, the main
material for the fabrication of semiconductor was silicon (Si). Its technology for power
devices is well established and is near to its theoretical physical limitations [12]. Re-
cently, researchers started to study a new series of semiconductors, composed by wide-
band gap materials such as Silicon Carbide (SiC) and Gallium Nitride (GaN), due to
their better performance when compared to silicon.

8Chapter 1. Introduction
1.3 Motivation
Recently, there has been an increased interest in the concept of a smartgrid. Among
some of the most trending topics within that concept, is the creation of interconnected
microgrids, designed to increase reliability under disturbances and enable an intelligent
integration of renewables and energy storage, and the increase of electric vehicles, able
to be used as reserve power for peak-shaving and to trade an energy surplus when not
in use. In both scenarios, it is evident that efficient methods to exchange energy between
energy storage units and the grid is essential.
Bidirectional ac/dc power converters enable not only the obvious bidirectional flow
of energy between their ac and dc sides, but also a highly efficient operation, display-
ing insignificant distortion to the grid by achieving almost unity power factor values.
Therefore, they are optimal for applications involving the exchange of energy between
dc energy storage units and the ac grid. With this in mind, this thesis presents an easy to
understand step-by-step modeling of a bidirectional ac/dc converter that can be built to
operate with unity power factor and low current total harmonic distortion (THD). The
analysis includes the performance of the model under discrete conditions to facilitate a
future implementation with digital controllers.
1.4 Objectives
The objective of this thesis was to design a grid-connected three-phase bidirectional
ac/dc converter that could be used for energy storage applications. The system should
be able to supply power to a dc load, or output power back to the grid based on a higher
order control signal. In order to do so, the following set of steps were followed:
1. Obtain a mathematical model for the converter.
2. Design the passive components for filtering and transient stability.
3. Develop a control system in the s-domain to ensure stability under expected op-
erating conditions.

1.4. Objectives 9
4. Account the sampling delay and digital-to-analog conversion to enable a future
implementation of a digital controller in a microcontroller.
5. Simulate the designed system using Piecewise Linear Electrical Circuit Simulation
(PLECS) system-level circuit simulator to validate the developed theory.

11
Chapter 2
Review of Related Literature
The topic of ac/dc power converters has been deeply studied in the past decades. Mod-
els presenting advantages over previous ones are constantly presented in the literature.
Among the main operational characteristics improved, it can be mentioned: power fac-
tor, total harmonic distortion (THD), start-up transient, efficiency, simplicity, and cost.
Over the years, researchers have focused their work on developing alternative con-
verter topologies, control algorithms, grid synchronization schemes, and input/output
filters to upgrade the characteristics cited above. This chapter overviews some of the
most relevant and interesting proposed techniques, highlighting their advantages and
drawbacks.
2.1 Bidirectional AC/DC Converters
In the early stages of the technology, ac/dc rectifiers were composed of full-wave diode
bridges connected to a dc-link capacitor designed to filter the 60Hz harmonics (Fig.
2.1). Such converters are now considered unsuitable because of the considerable input
current harmonic imposed to the grid [13]; thus power factor correction (PFC) recti-
fiers based on pulse-width modulation (PWM) were developed. PWM rectifiers are
obtained by replacing the diodes in a diode bridge rectifier with controllable switches
with antiparallel diodes. This modification allows the converter to operate in the rec-
tifier mode or in the inverter mode, in which the mode of operation is chosen by the
control algorithm. Furthermore, PWM rectifiers offer the advantage of converting ac

12 Chapter 2. Review of Related Literature
FIGURE 2.1: Three-phase diode rectifier. From [15].
FIGURE 2.2: Three-phase PWM converter. From [16].
voltage signals to dc while extracting a nearly sinusoidal current waveform from the
grid. They present high power factor and low total harmonic distortions, and enable
a rectification process in accordance with the IEEE-1547 rigorous standards [14]. The
typology of a bidirectional three-phase PWM ac/dc converter is shown in Fig. 2.2.
Use of a controllable switch with an antiparallel diode also enables bidirectional
power flow, allowing the ac/dc converter to be a bidirectional converter. When the
power flows from the ac to the dc side the converter operates as a rectifier. It can also
supply power to the ac side when needed, and the converter operates as an inverter.
Bidirectional converters are widely used in electric vehicles (EV) applications, so that
power can flow from a battery to the motor during motoring mode, and from motor
to battery during regenerative braking mode. They can also operate connected to the
main grid, in distributed energy resources (DER) or energy storage systems (ESS). Such
examples can be found in both single-phase and three-phase models.

2.2. Current Controllers 13
FIGURE 2.3: Hysteresis current control in dq0 coordinates. From [19].
2.2 Current Controllers
To synchronize the input current with the input voltage and improve the power factor,
PWM ac/dc converters require a current controller. Current control methods have been
developed to enforce a sinusoidal shape for the input ac current in abc, αβ, or dq0 co-
ordinates, depending on the implemented control algorithm [17]. The current control
in dq0 coordinates has the advantage of eliminating the steady-state error, since it op-
erates on dc quantities. However, in that case the model requires a digital controller.
Furthermore, in the rotating reference frame there is a need for voltage feedforward
and a cross-coupling of the dq components [18], which increases the complexity of the
system. In contrast, the stationary frame controller operating with abc coordinates is
simpler and can even be implemented with analog circuitry, at the cost of a steady-state
error. A typical current controller in the rotating reference frame receives a current er-
ror signal and outputs a duty-cycle reference that will try to adjust the error to zero.
The duty-cycle is then sent to a PWM block that generates the gate signals necessary to
recreate a current waveform with the adjusted amplitude values. This type of system
can be seen in Fig. 2.3. An alternative approach is the hysteresis current control, which

14 Chapter 2. Review of Related Literature
FIGURE 2.4: Hysteresis current control in abc coordinates.
uses a comparator to work directly on the switches, instead of converging to a duty-
cycle value based on an input error. In [19], a comparison of this method with other
alternative methods is made.
Hysteresis current control in abc coordinates is known as a robust and easy to im-
plement technique. In [20], this method is implemented to increase the power factor of
a motor driver by shaping the input current to follow the input voltage in either motor-
ing or regenerative mode, with the current set 180° out of phase from the input voltage
in the regenerative mode. The principle of operation is based on maintaining a fixed
error band between the measured input inductor current and a given reference. Fig. 2.4
illustrates the hysteresis current control algorithm in abc coordinates.
Its main drawback is its variable switching frequency, which increases the complex-
ity of the design of the filter passive components, and impose challenges to digital im-
plementations. The drawback of a variable switching frequency can be bypassed with
the implementation of an adaptive band at the cost of higher complexity [21]. There-
fore, the use of a dead-beat controller with a delay compensation is sometimes preferred
instead [22]. It is also interesting to observe that in PWM converters all current paths
involve an inductor, since the power factor correction operation requires an input in-
ductor, similar to a buck-boost topology. This input inductor helps to reduce any sharp
transients from fault currents [23]. However, for the same reason, these types of con-
verters only function properly once the dc-link voltage is higher than the output voltage

2.3. Voltage Controllers 15
of a basic uncontrolled diode rectifier. For three-phase PWM ac/dc converters, the sys-
tem will be able to operate as long as the dc side voltage is higher than a minimum
value given by (2.1).
VDC,min =3√3
πVm'1.654 Vm(2.1)
Although known for its simplicity, application of hysteresis current control in three-
phase systems is not explored in the literature. This thesis will implement and test
hysteresis current control along with a PID voltage controller to improve the dynamic
performance of a bidirectional three-phase ac/dc converter.
2.3 Voltage Controllers
During the PWM rectifier operation, the dc side voltage needs to be controlled. In ad-
dition to the current controllers to maintain high power factor at the ac side, voltage
controllers are employed to maintain transient stability and power quality at the dc
side. Fig. 2.5 displays a control block diagram including current and voltage controllers
for a single-phase PWM ac/dc converter [24].
One potential disadvantage of grid-connected single-phase models is the presence
of a double-line frequency ripple in the dc-bus capacitor voltage (also present in three-
phase unbalanced systems) [25]. In order to avoid the propagation of the low-frequency
ripple into the control system, the voltage controller of the dc-link is usually designed
with a small bandwidth, which causes the control system to be undesirably slow [18]. In
[24], a fast voltage controller is designed for a single-phase bidirectional ac/dc converter
to counter the poor transient performance of the dc-link voltage. The authors opt for
a LCL filter to eliminate high-frequency harmonics, highlighting the faster attenuation
of LCL filters (-60 dB/dec) when compared to L filters (-20 dB/dec). Another way to
filter the second-order harmonics from the control systems would be with a resonance
controller, which can be tuned to act as a notch filter (band-stop filter) [26].

16 Chapter 2. Review of Related Literature
FIGURE 2.5: Control system for a single-phase PWM converter. From
[24].
A review of the state of the art of bidirectional rectifiers with reduced harmonics
and improved power factor is presented in [27], where PWM rectifiers are classified as
voltage source rectifiers (VSR) or current source rectifiers (CSR). VSRs are built with
inductors at the ac side, and filter capacitors at the dc side, while CSRs need a capacitor
at the ac side and an inductor at the dc side. For VSRs, the most common modulation
methods are periodic sampling, hysteresis band, triangular carrier, and space vector
modulation, the latter only available with dq0 components. In the other hand, CSRs can
utilize the same carrier-based modulation techniques from VSRs, or selective harmonic
elimination [27]. In VSRs, a PI voltage controller is usually used to fix the dc-link voltage
to a given reference. In [28], the author defines two inequalities that should be followed
when tuning the proportional and integral gains of the voltage controller from VSRs.
2.4 Grid Synchronization
Another essential aspect of PWM rectifiers is the need for grid synchronization. If the
phase angle of the ac source voltage is not detected, the PWM rectifier system can be
damaged [29].
One of the most common grid synchronization algorithms found in the literature is
the phase-locked loop (PLL). The PLL is used to predict the phase angle of single-phase
or three-phase ac signals in real time to properly synchronize the ac current wave with
the grid, necessary for power factor correction (PFC) methods. An example of a PLL
block for a three-phase PWM rectifier is presented in Fig. 2.6. Here, two line voltages

2.4. Grid Synchronization 17
FIGURE 2.6: PLL block in a PWM rectifier control. From [29].
(vab and vcb) are measured from the grid by sensors, and the third one is predicted from
the other two, supposing that the system is balanced.
PLL algorithms can be implemented in the stationary or the rotating reference frame,
and they can only be executed by digital controllers. Nevertheless, there are alternative
ways in analogic circuitry to track the source voltages. For instance, Texas Instruments
offers microchips able to measure the grid voltage in real time to output a normalized
reference to be used in current control algorithms. A thorough comparison between
PLL techniques is available in [30]. Basically, PLL strategies can be performed in abc, αβ,
or dq0 coordinates. When in abc coordinates, the need for three PLL blocks considerably
increases the computational effort, unless only one phase is tracked, but in that case the
system becomes very sensitive to distortions, and is considered unreliable. When in dq0
coordinates, the PLL block tracks the grid phase by setting the quadrature component
to zero. This is done with a PI controller that outputs an angular frequency that when
integrated gives the rotating reference frame phase angle. Once the PI sets its input to
zero, the angle is in phase with the grid. An example of this technique is demonstrated
in Fig. 2.7.
An even more effective PLL in dq0 coordinates is the Dual Synchronous Reference

18 Chapter 2. Review of Related Literature
FIGURE 2.7: Dq0 PLL block. From [30].
Frame PLL (DSRF-PLL) [31]. The voltage signal is divided into two opposing rotating
vectors, later filtered by a LPF, enabling a faster convergence. Best results were found
when the LPF cut-off frequency was set to ω/√2 [17]. One of the most reliable PLL
models proposed so far is the Dual Second Order Generalized Integrator (DSOGI) PLL,
done in αβ reference frame. It is an enhancement from the SOGI PLL proposed by
Ciobotaru et al. in [32]. It is based on a generalized integrator tuned with a resonance
frequency equal to the grid’s frequency. The main characteristic to be noticed is that
as the gain K is increased, the bandwidth of the transfer function increases, improving
dynamic performance, but leaving the system more susceptible to harmonics from the
grid. The difference between SOGI and DSOGI is that in the latter, both Vαand Vβ
signals obtained from the grid voltage are filtered, which increases the robustness of
the tracking system.
As mentioned before, to perform power factor correction in ac/dc converters it is
necessary to synchronize the system with the grid voltage. In order to do so, informa-
tion about the voltage and current input values need to be measured by voltage and
current sensors. Much research has been done in the past years focused on reducing
the cost of PWM rectifiers by means of sensorless control. This section reviews the most
popular methods.
A typical PWM rectifier requires the following sensor units:
• 2 ac voltage sensors, to track the mains phase
• 2 ac current sensors, for the current controller and over-current protection

2.4. Grid Synchronization 19
• 1 dc voltage sensor, for the voltage controller and over-voltage protection
It is evident that the ac current sensors and dc voltage sensors are fundamental for
the secure operation of a converter. Yet, the only need for ac voltage sensors is for grid
synchronization. Multiple methods were published presenting line voltage estimators
that bypass the need for grid voltage sensors. Among the most popular ones, Voltage
Oriented Control (VOC) and Direct Power Control (DPC) can be highlighted.
Direct Power Control
Based on direct torque control, DPC was first introduced decades ago in [33], and it
consisted of an algorithm that estimates the grid voltage values by using input current
measurements and information about the states of each switch. A block diagram of
the method is illustrated in Fig. 2.8. As can be seen in the block diagram, measured
current values and the switches’ states are used to predict instantaneous active (p) and
reactive (q) powers. Then, the estimated values are compared to reference values, and
the error is used by a hysteresis controller to turn the switches on or off. Notice that
this causes the system to operate with variable switching frequencies. Once the error
between the reference and measured powers is set to zero, the estimated voltage values
can be considered as the actual grid voltages. With the voltage values, an optimized
switching table is used to synchronize the current with the voltage, enabling then a
power factor correction that does not require voltage sensors to track the mains phase.
Because the switching is defined by a switching table, there is no PWM modulation.
An alternative DPC including modulation is presented in [34]. It enables a DPC
with constant switching frequency by means of a space-vector modulation (SVM). A
similar strategy of DPC with SVM was given in [35]. The authors proposed a DPC
model that is based on average voltage vector using a predictive control algorithm,
making instantaneous active and reactive powers equal to their reference values at each
sampling instant, which allows the model to operate with a fixed switching frequency.

20 Chapter 2. Review of Related Literature
FIGURE 2.8: Direct Power Control. From [33].
Voltage Oriented Control
Blaabjerg F., et al. first introduced voltage oriented control (VOC) in [36]. While di-
rect power control is performed in the stationary reference frame, VOC uses rotating
coordinates. Although similar to DPC, this method does not involve a switching table.
Fig. 2.9 displays the VOC block diagram. The algorithm works as follows. First, the
instantaneous active and reactive powers are calculated from the direct and quadrature
components. Next, the measured input currents and the estimated power values are
used to predict the inductor voltage drop. Then, grid voltages are estimated by adding
the rectifier reference voltages to the estimated inductor voltages.
In [38], DPC and VOC strategies were simulated with the SABER software tool, and
a comparison between them was presented. Both methods were found to perform well
even under unbalanced and pre-distorted conditions. DPC has a simpler algorithm,
a higher power factor, but requires a high sampling frequency. On the other hand, the
VOC algorithm is more complicated, and presents a lower power factor, but can operate

2.4. Grid Synchronization 21
FIGURE 2.9: Voltage Oriented control. From [37].
with a switching frequency close to one tenth of the DPC’s. The authors concluded that
conventional VOC schemes are preferred for standard industrial purposes.
In [39], a sensorless control for converters connected to generators is proposed. The
authors highlight that most literature regarding sensorless algorithms ignore the fact
that the voltage estimation of these methods has a slow convergence, which in prac-
tical applications can cause an over-current big enough to trip the protection systems.
Their proposed method provides a smooth startup of the PWM rectifier by setting the
integrators’ initial conditions to specific values. The paper discards the grid reactor usu-
ally used for PFC, and uses the generator’s inductance instead. However, the model is
focused only on converters interfaced with generators.
The aforementioned schemes assumed to have precise information about the grid
impedance at the point of common connection (PCC). However, the distribution sys-
tem parameters fluctuate, which would deteriorate the performance of control algo-
rithms tuned to predetermined values. In [40], this issue is addressed. A combination

22 Chapter 2. Review of Related Literature
of two neural networks is presented to estimate both the distribution system parameters
and the grid voltage vector. The method includes a dq0-PLL to extract the angle of the
estimated grid voltage, and a deadbeat controller instead of a hysteresis one. As previ-
ously mentioned, deadbeat control is also a type of predictive current control method,
just as hysteresis control, but it presents the advantage of a fixed switching frequency
at the expense of the need for a modulator [41]. Other sensorless synchronization tech-
niques have been derived from these techniques including: virtual flux oriented control
(VFOC) [42], adaptive space vector modulation (ASVM) [43], and virtual flux based di-
rect power control (VFDPC) [44]. A comprehensive analyses of these recent models can
be found in [38].
2.5 Small-Signal Analysis
In frequency domain control design, controllers are implemented to adjust the dynamic
behavior of a system based on the transfer function of the controllable variables. Those
transfer functions are derived from the small-signal models obtained by the lineariza-
tion of large-signal models at the determined operating points [45]. Unquestionably,
once a large-signal model is achieved, the task of defining the set of transfer func-
tions correlating the state-space variables becomes straightforward. However, due to
the semiconductor switches present in power converters, alternative methods able to
account for the discrete and non-linear properties of the switches were required.
One possible approach that emerged was called the sampled-data model [46], which
analyzes the system throughout specified discrete periods that simplify the plant by dis-
cretizing it. Instead of studying the switching inputs, this technique divides the prob-
lem into operating cycles that repeat during the steady-state activity of the converter
[47]. It is based on the fact that the switching signals are also discrete values, and it
is used in many applications. However, one of its main drawbacks is that it does not
contain any information about the state-variables in between samples.
The most basic model to describe the behavior of converters is the switched model

2.5. Small-Signal Analysis 23
[48]. It depicts the circuit configuration based on instantaneous input switching sig-
nals. Even though it cannot be used for control design purposes, it can be adopted as
an initial approach for the further development of an averaged method, which is used
to obtain an average equivalent of a given circuit. Its main advantage is the removal
of the switch input signal, since the average operation is independent of its value. This
method became particularly valuable for the analysis of dc/dc converters [49]. A study
comparing the averaged, and sampled-data was presented in [50]. Despite the propi-
tious use of the averaged method for dc/dc converter applications, it was not possible
to implement it for ac/dc converters, due to the zero average of ac signals. Thus, the
generalized averaging method was created, which enabled the analysis of ac signals by
decomposing them into multiples of their fundamental frequencies with Fourier series
[51].
Evidently, all these methods shared the common goal of determining a model that
could represent a phenomenon, which in this case was the operation of power convert-
ers. An interesting relation between different models and how to transform one model
into another is available in Fig. 2.10. In order to apply linear-control techniques, small-
signal averaged or small-signal sampled models need to be used.

24 Chapter 2. Review of Related Literature
FIGURE 2.10: Relation between models. From [52].

25
Chapter 3
Bidirectional PWM AC/DC
Converter Modeling and Design
This chapter is divided as follows. First, the principle of operation of the converter is
reviewed, and the differential equations of the corresponding energy storage devices
are presented. Next, it discusses the sizing of the passive components and the main
concerns that were addressed during the design of those elements. Then, large and
small-signal models are developed so that a set of transfer functions that represent the
behavior of the circuit are obtained.
3.1 Circuit Operation
The circuit schematic of a three-phase pulse-width modulated boost-type ac/dc con-
verter is displayed in Fig. 3.1. The ac side is connected to a three-phase source Vabc,
representing the grid, while the dc side is connected to a load that could be expressed
either as a resistance RL, or a current source. In this analysis, the load will be rep-
resented as a resistive load. The inductors Labc connected to the voltage sources are
designed to filter and reduce the input current ripple, while the capacitor Cin paral-
lel with the load is introduced to reduce the output voltage ripple. The internal ohmic
losses of the inductors are included by Rabc, while viabc correspond to the voltages af-
ter the voltage drop across the inductors. During all times, the controlled three-phase
bridge between the ac and dc sides is responsible for supplying or demanding power

26 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
FIGURE 3.1: Three-phase ac/dc converter diagram.
to or from the grid with a nearly unity power factor while maintaining an input current
waveform with low THD.
As discussed in the literature review, there are a myriad possible control methods
applicable for the operation of ac/dc converters. In this thesis, the three-phase ac/dc
converter will utilize hysteresis current control to attain nearly unity power factor. This
method is similar to a boost-type dc/dc converter, in which the input inductors are con-
stantly exchanging energy with the dc-link capacitor throughout the switching cycles.
For instance, if the input signal u2is turned on (which means that u1will be off), the
input current iawill find a short-circuit path through La, and it will not flow to the load.
Naturally, this short-circuit path will cause the current to increase, and as a consequence
the stored energy in the inductor’s magnetic field will also increase. Once the current is
higher than a predefined threshold, the signal u1turns on (u2turns off), and iawill flow
through the load. Each current is controlled independently, based on its magnitude and
its respective ac voltage source. The operation of the current for each phase is displayed
in Fig. 3.2. If this graph represents phase a, t1and t3correspond to the moments when
u1turns on, and the inductor from phase a is connected to the load, while t2and t4
correspond to when u2turns on, and the inductor is short-circuited. Hence, iais main-
tained within a current band ∆ibaround the reference during each hysteresis period T

3.1. Circuit Operation 27
FIGURE 3.2: Behavior of the hysteresis current control for each phase.
equal to the switching period Ts.
It is evident that in order for this system to work, the ac currents need to be success-
fully tracked. This can be performed either by two current sensors1, or by sensorless
algorithms. However, since current sensors are also useful for over-current protection,
sensorless methods are usually implemented for the ac voltages instead.
Notice that each switch in Fig. 3.1 contains anti-parallel Schottky diodes, which
are included in case of any unexpected failures as well as for the staged start-up, as
explained later in this report. However, due to the higher internal resistance and lower
nominal current of these devices, they are not part of the standard circuit operation.
In short, the converter is designed so that the currents iabc are always flowing either
through the top or bottom MOSFETs.
By applying KVL and KCL to the circuit of Fig. 3.1, and considering the fundamental
equations that describe the relation between voltages and currents in passive compo-
nents, the following set of differential equations that describe the dynamic behavior of
this system are obtained:
dia
dt =va−via −iaRa
La
(3.1)
dib
dt =vb−vib −ibRb
Lb
(3.2)
1If the system is balanced, two phases can be used to predict the third phase.

28 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
dic
dt =vc−vic −icRc
Lc
(3.3)
and
dvC
dt =ioRL−vC
(RL+rc)C(3.4)
Later in this chapter these equations will be used to analyze the stability of this
system during steady-state operation.
3.2 Design of DC-Link Capacitor
There are three main concerns to be addressed in the sizing of the dc-link capacitors of
three-phase boost-type ac/dc converters:
1. Low-frequency ripple from the 360Hz ripple in the output current io.
2. High-frequency ripple originating from the inductors’ current ripple.
3. Enough energy storage inertia to alleviate oscillations during load steps.
In this section these problems will be studied separately so that three different equa-
tions for the sizing of the capacitance value are obtained.
3.2.1 Low-frequency ripple
It is known that in single-phase ac/dc converters there is a considerable dc-link voltage
ripple at twice the grid’s frequency of 60Hz. If in a single-phase system there is a small
phase displacement φbetween Vsand Is, the power flow from the ac side to the dc-link
will be given by2.
Pdc =Pocos(φ)+Pocos(2ωt−φ)(3.5)
2From Pdc =Vscos(ωt)Iscos(ωt−φ)

3.2. Design of DC-Link Capacitor 29
The second term in (3.5) is the dc-link power ripple, and it represents a continuous
exchange of power between the capacitor and the grid, given by Vdc ×iripple. This ripple
originating from irippl e is responsible for the voltage ripple across the capacitor. There-
fore, in single-phase ac/dc converters, the maximum output voltage ripple is defined
by (3.6) [25].
Cdc =Po
4πf VdcVmax
ripple
(3.6)
This ripple at twice the grid’s frequency is assuaged in three-phase systems due to the
sum of the three balanced phases. However, similar to the single-phase analysis, the
dc-link voltage ripple in the case of a three-phase converter is also caused by a current
ripple through the dc-link.
Despite the PWM action of the converter, the rectified current through the dc-link
will contain a ripple at six times the grid’s frequency, with a waveform similar to the
voltage ripple from a basic three-phase full-bridge diode rectifier. In a grid operating at
60Hz (3.7),
∆Vo=1
4√3f CR L
, (3.7)
where RLis the load resistance, fis the frequency of the source, and Cis the dc-link
capacitor.
3.2.2 High-frequency ripple
As previously mentioned, the principle of operation of this converter is similar to a
boost dc/dc converter. The high-frequency ripple the modeling of the dc-link capaci-
tor can follow the design proposed by [15]. Therefore, the minimum required dc-link
capacitance to address the high-frequency ripple introduced by a variable frequency
hysteresis control is given by (3.8),
Cdc =DIo
∆Vofs
(3.8)

30 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
which is based on the duty-cycle, switching frequency, output current of the converter,
and the voltage ripple of the output capacitor.
3.2.3 Energy storage for load transient
During a load transient, the energy stored in the dc-link capacitor can be seen as the
inertia of the output voltage. The bigger the capacitor, the more instantaneous energy
will be available to counter the load disturbance. Therefore, the capacitance of the dc-
link capacitor is given by [53]
Cdc =2Potd
(V2
1−V2
2), (3.9)
where Pois the output power to a dc load, V1and V2represent the capacitor voltages
at the start and end of the transient, and tdis the transient duration. It is important
to notice that this equation does not include the action of the voltage controller. Thus,
in order for it to be properly used, the transient time of the disturbance should take
account of the step response of the control system. A conservative approach would be to
set the transient duration based on the bandwidth of the closed-loop system. However,
this will cause an overestimation since it supposes the control system to stay inactive
until it reaches the new reference. A good estimation of the maximum voltage drop due
to a load step was observed when tdwas defined between one fourth to one fifth of the
rise time of the compensated system. Naturally, the faster the voltage controller is, the
less the load transient experienced by the capacitor will be.
3.3 Design of Grid-Side Inductors
As mentioned before, the PWM operation of the three-phase ac/dc converter is very
similar to that of a PWM dc/dc boost converter. Therefore, the ac-side inductors can be
designed based on the inductor current ripple. A variable switching frequency hystere-
sis current control is used to simplify the construction of a future prototype; however,

3.4. Mathematical Modeling 31
it should be highlighted that there are alternative methods available which are capable
of achieving a fixed switching frequency [21], [54].
Multiple analyses were carried in the past to quantify the band of hysteresis current
controllers. The simplest modes of hysteresis current control utilize a current band set
as a constant or as a sinusoidal variable. For this work, a constant band will be used.
The relation between the width of the current band and the switching frequency was
defined by [55]
fs=Vdc −|Vs|
9∆ibL, (3.10)
where fsis the switching frequency, Vdc is the dc-link voltage, L is the ac side inductor,
∆ib=∆iL
2is the hysteresis control band, and Vsis the ac side voltage.
Once the maximum switching frequency, dc-link voltage, and ∆ibare defined (at
Vs= 0), the minimum required inductance of the ac side inductors can be obtained.
Notice that the restriction factor for the switching frequency is its highest value, not its
minimum, since the band will be kept constant at all times. When delimiting the switch-
ing frequency of the system, it is important to remember that the converter switching
frequency and the sample frequency of the microcontroller should satisfy the Nyquist
criterion ( fsam ple >2×fsmax). Furthermore, the system exhibits a maximum switching
frequency when the grid voltage sinusoidal signal Vsis zero, and a minimum when Vs
is at its peak.
3.4 Mathematical Modeling
In order to properly design the voltage controller responsible for maintaining the dc-
link voltage at its reference, it is necessary to obtain the set of transfer functions that
describes the dynamic behavior of the system. Therefore, this section will cover the
procedure of obtaining the large and small-signal models of the converter. During this
analysis it will be supposed that the dc output voltage is supplying a dc current Io
defined as Vo
RL. Nevertheless, it will be seen that this system can also be controlled to

32 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
supply energy to the grid by defining RLas a negative load, or by setting a negative
current to an output current source connected in parallel to the dc-link capacitor.
The intrinsic differential equations of the inductors’ currents (iabc) and the dc-link
capacitor’s voltage (vC) were defined by (3.1)-(3.4). Those are the state-variables of
the system. Notice that variables viabc and ioare transitional variables, and they will be
affected by the instantaneous states of the switches. A switched model of the converter
will be obtained by applying the switched model algorithm proposed by [56] to the
differential equations of each state variable.
3.4.1 Switched model
The objective of this section is to obtain a set of differential equations that describe the
behavior of the system in function of the input switch signals. First, a generic state-
space equation that represents the system including the intermediate variable viabc and
iowill be developed.
Since the model was designed to only conduct current through the MOSFETs, the
gate signals to the top and bottom MOSFETs in each phase will be complementary.
Thus, the possible configurations created by signals u1to u6can be summarized by
control signals µ1,µ2, and µ3, respective to u1,u3and u5. Evidently, there will be eight
possible configurations for the topology of this model, as can be seen in Fig. 3.3. The
state-space for each configuration can be described by (3.11), where vsis the source
input voltages.









˙
ia
˙
ib
˙
ic
˙
vC









=Ai









ia
ib
ic
vC









+Bi[vs](3.11)
The system is considered perfectly balanced, so L=La=Lb=Lcand rL=Ra=Rb=
Rc. With (3.11), the following set of eight state-space equations are obtained.

3.4. Mathematical Modeling 33
(A) Circuit when µ123 = [0 0 0] (B) Circuit when µ123 = [1 0 0]
(C) Circuit when µ123 = [0 1 0]. (D) Circuit when µ123 = [0 0 1].
(E) Circuit when µ123 = [1 1 0]. (F) Circuit when µ123 = [1 0 1].
(G) Circuit when µ123 = [0 1 1] (H) Circuit when µ123 = [1 1 1]
FIGURE 3.3: Equivalent circuits of the converter for different switched
configurations.

34 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
For µ123 = [0 0 0] (Fig. 3.3A), and µ123 = [1 0 0] (Fig. 3.3B)
A1=










−rL
L0 0 0
0−rL
L0 0
0 0 −rL
L0
0 0 0 −X










A2=









Υ0 0 Λ
0−rL
L0 0
0 0 −rL
L0
X0 0 −X









For µ123 = [0 1 0] (Fig. 3.3C), and µ123 = [0 0 1] (Fig. 3.3D)
A3=









−rL
L0 0 0
0Υ0Λ
0 0 −rL
L0
0X0−X









A4=









−rL
L0 0 0
0−rL
L0 0
0 0 Υ Λ
0 0 X−X









For µ123 = [1 1 0] (Fig. 3.3E), and µ123 = [1 0 1] (Fig. 3.3F)
A5=









ΥrcΛ0Λ
rcΛ Υ 0Λ
0 0 −rL
L0
RLX RLX0−X









A6=









Υ0 0 Λ
0−rL
L0 0
0 0 Υ Λ
RLX0RLX−X









For µ123 = [0 1 1] (Fig. 3.3G), and µ123 = [1 1 1] (Fig. 3.3H)
A7=









−rL
L0 0 0
0ΥrcΛ Λ
0rcΛ Υ Λ
0RLX RLX−X









A8=









ΥrcΛrcΛ Λ
rcΛ Υ rcΛ Λ
rcΛrcΛ Υ Λ
RLX RLX RLX−X









B1−8=









1/L
1/L
1/L
0









For simplicity, the following notations were used.
Λ=−1
L1+rc
RL

3.4. Mathematical Modeling 35
Υ=−rL
L+rcΛ
X=1
(RL+rc)C
According to [56], an equivalent state-space model ‘ ˙
X’ can be created by including
all possible configurations, where a configuration variable ‘h’ is associated with the
input signals µ123 (3.12). ‘N’ is the number of possible configurations and ‘E’ is the
source input of each case. The system does not contain multiplications of constants and
inputs, so in this case b123 =0.
˙
X=
N
∑
k=1
(AkX+BkE)hk(3.12)
˙
X=Ax + (B1x+b1)µ1+ (B2x+b2)µ2+ (B3x+b3)µ3(3.13)
A=










−rL
L0 0 0
0−rL
L0 0
0 0 −rL
L0
0 0 0 −X










B1=









φ φµ2φµ3−φ
rc
φµ2000
φµ3000
RLX000









B2=









0φµ10 0
φµ1φ φµ3−φ
rc
0φµ30 0
0RLX0 0









B3=









0 0 φµ10
0 0 φµ20
φµ1φµ2φ−φ
rc
0 0 RLX0









d=









va/L
vb/L
vc/L
0









φ=−rc
L(1+rc
RL)
Because (3.13) contains the product of input signals such as µ1µ2, it is considered a
trilinear system, and it is not suitable for the design of control systems [52]. However,

36 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
in [57] it is mentioned that a solution for this problem would be to introduce a new set
of input signals, in a way that the products of input signals are represented by a new
set of input variables. This would considerably raise the complexity of the system, at
the benefit of creating a more precise model.
This product of input signals originated from the introduction of the capacitor’s ESR
component into the model. This issue occurs because the capacitor resistance rcslightly
reduces the output current io. This causes the inductor currents iabc to become depen-
dent on the output current (due to iorcterms), which will change based on the switch
input signals. In short, this crossed relation makes iadependent on instantaneous iband
icvalues, which are dependent on their own input signals, and that is why the system
becomes trilinear.
If we suppose that the output current iois not reduced by losses in the ESR compo-
nent of the dc-link capacitor, then the complexity of the system considerably reduces; it
becomes a bilinear system, and can be used for control design purposes. (If rc= 0, the
dc-link voltage will be the capacitor voltage vC=vO), and (3.13) becomes the following
state-space model.
A=










−rL
L0 0 0
0−rL
L0 0
0 0 −rL
L0
0 0 0 −1
RLC










B1=









0 0 0 −1
L
0 0 0 0
0 0 0 0
1
C0 0 0









B1=









0 0 0 0
000−1
L
0 0 0 0
01
C0 0









B3=









0 0 0 0
0 0 0 0
0 0 0 −1
L
0 0 1
C0










3.4. Mathematical Modeling 37
d=









va/L
vb/L
vc/L
0









b123 =0
Once the system is simplified, the state-space model from (3.13) becomes the dif-
ferential equations (3.14)-(3.17). This form is called the switched model, because it
includes the instantaneous values of the input signals of the switches.
dia
dt =va−iaRa−µ1vO
La
(3.14)
dib
dt =vb−ibRb−µ2vO
Lb
(3.15)
dic
dt =vc−icRc−µ3vO
Lc
(3.16)
dvO
dt =(µ1ia+µ2ib+µ3ic)−vO
rL
C(3.17)
3.4.2 Generalized averaged model
By applying the Averaged Method [58] to switched models, it is possible to obtain a
set of steady-state functions that take the duty-cycle of the switches instead of instan-
taneous gate signals. The averaged method is a solution to obtain the large and small-
signal models of dc/dc converters [59]. However, this method is not applicable for ac
systems on account of the zero average value of ac variables. Hence, the Generalized
Averaged Method (GAM) has to be used instead [60]. GAM is based on the represen-
tation of periodic signals into harmonics of the fundamental frequency with Fourier
series. In order to apply GAM to the switched model, the two following properties are
used.

38 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
dhxik
dt =dxk
dt −jkωhxik(3.18)
hxyik=∑
−n≤k−i≤n
−m≤i≤m
hxik−ihyii(3.19)
where ‘n’ is the highest harmonic of x, ‘m’ is the highest harmonic of y, and hxik
represents the average of the kth order harmonic of x. If n=m=1, for example, by the
second property:
hxyi0=hxi1hyi1+hxi0hyi0+hxi−1hyi1
hxyi1=hxi1hyi0+hxi0+hyi1
By applying GAM to the switched model, and considering only the first harmonic
of each ac variable, we obtain:
dhiai1
dt =−jωhiai1+hvai −hµ1vOi1− hiai1rL
L(3.20)
dhibi1
dt =−jωhibi1+hvbi − hµ2vOi1− hibi1rL
L(3.21)
dhici1
dt =−jωhici1+hvci − hµ3vOi1− hici1rL
L(3.22)
dhvOi0
dt =hµ1iai0+hµ2ibi0+hµ3ici0−hvOi0
RL
C(3.23)
To solve (3.20) - (3.23), the following averaging properties were taken into account
[52]:
1. If x is an ac signal, hxi0=0
2. If x is a dc signal, hxik=0 for every k 6=0

3.4. Mathematical Modeling 39
3. If vabc are phasors with constant magnitude Vsdisplaced by 2π
3from each other in
space, and va=Vssin(ωt):
•hvai1=−jVs
2
•hvbi1=−√3Vs
4+jVs
4
•hvci1=√3Vs
4+jVs
4
4. hiabci1and hµ123 i1are complex numbers that can be represented by a+bj
5. If there is an input signal µkthat depends only on the value of a state variable,
hµki1=2
jπejφ, where φis a delay between the state variable and the origin.
6. hxi1hyi−1+hxi−1hyi1=2hRehxi1Rehyi1+Imhxi1Imhyi1i
7. If y(t)is an ac signal, and x1=Re(y)and x2=Im(y), y can be approximated by
its first order harmonic as y(t) = 2x1cos(ωt)−x2sin(ωt).
The Clarke-Park transform is used to move the three phase ac signals iabc and µ123
from abc coordinates to dq0 coordinates. For the control design, the system is supposed
to be perfectly balanced, and so the zero terms will not be considered in this analysis.
idq0=KCP ×iabc (3.24)
KCP =KP×KC=





cos θsin θ0
−sin θcos θ0
0 0 1





×r2
3






1−1
2−1
2
0√3
2−√3
2
√2
2
√2
2
√2
2






By property 4, the averaged values of the first harmonics of the ac variables can be
represented as:
hiai1=x1+jx2hµ1i1=a1+ja2
hibi1=y1+jy2hµ2i1=b1+jb2

40 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
hici1=z1+jz2hµ3i1=c1+jc2
By property (7) from the previous page, these ac signals can be approximated by
their first order harmonics as follows:
ia=2x1cos(ωt)−2x2sin(ωt)u1=2a1cos(ωt)−2a2sin(ωt)
ib=2y1cos(ωt)−2y2sin(ωt)u2=2b1cos(ωt)−2b2sin(ωt)
ic=2z1cos(ωt)−2z2sin(ωt)u3=2c1cos(ωt)−2c2sin(ωt)
With (3.24), it is possible to express those real and imaginary variables by the direct
and quadrature components in the rotating reference frame:
x1=1
2iqy1=−1
4iq−√3
4idz1=−1
4iq+√3
4id
x2=−1
2idy2=−√3
4iq+1
4idz2=√3
4iq+1
4id
a1=1
2βqb1=−1
4βq−√3
4βdc1=−1
4βq+√3
4βd
a2=−1
2βdb2=−√3
4βq+1
4βdc2=√3
4βq+1
4βd
Hence, after solving the averaged terms of (3.20) - (3.23), the following set of dif-
ferential equations for the large-signal model of the three-phase ac/dc converter is ob-
tained. βdand βqrepresent the direct and quadrature terms of the three-phase input
signals µ123.
did
dt =ωiq+Vs−vOβd−rLid
L(3.25)
diq
dt =−ωid+−vOβq+rLiq
L(3.26)

3.4. Mathematical Modeling 41
dvO
dt =3
2C(idβd+iqβq)−vO
RC (3.27)
3.4.3 Small-signal model
The small-signal model of the converter is obtained when the set of equations above
is linearized around an equilibrium point. The equilibrium values of the state-space
and input variables are respective to the moment when the differential equations of the
large-signal model are equal to zero. After linearizing the system around the equilib-
rium points, the following small-signal model is found.






˙
∆id
˙
∆iq
˙
∆vo






=





−rL
Lω−βde
L
−ω−rL
L−βqe
L
3βde
2C
3βqe
2C−1
RC












∆id
∆iq
∆vo






+





−voe
L0
0−voe
L
3ide
2C
3iqe
2C









∆βd
∆βq


(3.28)
∆y=C





∆id
∆iq
∆vo






(3.29)
Matrix C defines which variable is the output of the system. The transfer functions
between outputs and inputs can be obtained with ∆Y
∆U=C(sI −A)−1Bonce the Laplace
transform has been applied to the small-signal model. The equilibrium points of the
input signal βde and βqe are described by (3.30) and (3.31).
βde =2voe
3RLide
(3.30)
βqe =−ωide L
voe
(3.31)
The hysteresis control will try to enforce the converter to operate with an unitary
power factor at all times. This means that when operating at steady-state, we want the

42 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
equilibrium point of the quadrature current iqe =0. Hence, for the design of this con-
verter βqe is not necessary, and the second input of the system is considered as always
zero. This allows the system to be reduced to a second-order state-space model.



˙
∆id
˙
∆vo


=

−rL
L−βde
L
3βde
2C−1
RC





∆id
∆vo


+

−voe
L
3ide
2C


∆βd(3.32)
∆y=C


∆id
∆vo


(3.33)
3.4.4 Converter Transfer functions
With the linearized model from (3.32), it is possible to obtain the transfer functions
between ∆βd-∆idand ∆id-∆vo. These linear equations can be used to design the
voltage controller responsible to input the current reference (i∗
d) into the system.
∆id
∆βd
=voe
Ls +rL
(3.34)
∆vo
∆id
=1.5βde
Cs +1
RL
(3.35)
Notice that the plant of the converter (3.35) changes with the output load. A trace
of the eigenvalues of the linearized system with the load can help define what is the
maximum load step that will ensure system stability.
3.5 Design Parameters
The following parameters were selected for the steady-state operation of a 3.6kW three-
phase ac/dc converter.
Vs=120 Vrms Vdc =390 V
Is=10 Arms Idc =9.2 A

3.5. Design Parameters 43
To maintain low current THD values, it was decided that the hysteresis band ∆ib
should to be lower than 0.3A. With a maximum switching frequency set as 50kHz, the
minimum inductance value to hold the determined hysteresis band at steady-state can
be found with (3.10).
L=Vdc
9fs∆ib
=2.9 mH
Considering the availability of inductor values in the market, an inductor of 3 mH
was selected. Notice that once the current band and the inductance values are fixed, the
maximum switching frequency will occur at |Vs|= 0, while the lowest occurs when the
grid’s voltage waveform is at its peak. With 3 mH inductors, the switching frequencies
will range from 27,197 to 48,148 Hz.
The maximum output voltage low-frequency ripple of the converter was designed
to be 1 V peak-to-peak, thus the minimum capacitance is given by (3.7). The output
load is set as 42.4 Ω.
Cdc =1
4√3×60 ×1×42.4 =56.74 µF
The minimum capacitance required to maintain a maximum high-frequency voltage
ripple of 2 V is given by (3.8). Notice that because of the hysteresis current control, the
duty-cycle of this model is not constant. Nevertheless, by supposing that the input
current idis able to successfully track its reference value, it is possible to assume that
the system contains an average duty-cycle ‘d’ approximate to the duty-cycle of a boost
dc/dc converter, which is given by (3.36).
Vdc
Vs
=1
1−d(3.36)
After obtaining the average duty-cycle, and estimating the minimum possible switch-
ing frequency, the minimum capacitance to maintain the low-frequency ripple within
2.5 V is found as

44 Chapter 3. Bidirectional PWM AC/DC Converter Modeling and Design
Vabc 120 Vrms
Iabc 10 Arms
Vdc 390 V
Idc 9.2 A
Labc 3 mH
Cdc 90 µF
RL42.4 Ω
Rabc 44 mΩ
TABLE 3.1: Basic components
Cdc =0.5648 ×9.2
2.5 ×27, 200 =76.5 µF
For the design based on the energy storage of the capacitor, it is considered that the
minimum Vdc should be 1.654 ×Vsfrom (2.1). Thus, the final transient voltage before
the response of the control system will be V2=281 V. The capacitor is designed to
withstand a load transient equal to 100% of the nominal power (3600 W). A conserva-
tive approach is carried, so the transient duration is defined by the bandwidth of the
voltage controller. Typical voltage controllers cascaded with current controllers should
be designed with a bandwidth around 1/10 to 1/20 of the current controller’s band-
width, in order for its reference to be properly tracked. Therefore, it is supposed that
the voltage controller bandwidth ωv
bis 2 ×π×500 Consequently, the minimum dc-link
capacitance will be defined by (3.9).
Cdc =2×3600
2×π×500 ×(3902−2902)=33.71 µF
Clearly, the most demanding factor in the sizing of the dc-link capacitor is the high-
frequency voltage ripple caused by the current ripple in the output current io, which
requires a capacitance of 76µF. However, in the following chapters it will be seen that a
delay in the current feedback loop of the control system can affect the minimum switch-
ing frequency of the model. Thus, a capacitor of 90µF will be selected. Table 3.1 sum-
marizes the magnitudes of the components of the ac/dc converter.

45
Chapter 4
Control System Design
The objective of the control system is to maintain the dc-link voltage at a given refer-
ence while synchronizing the three-phase input currents with the three-phase voltages,
maintaining high power factor and low THD. The system is designed to follow the in-
put reference with negligible overshoot and fast convergence during load steps, which
are seen as a disturbance. In order to accomplish that, first the steady-state operation of
the system is used to obtain the open and closed loop transfer function and respective
Bode plots of the state-space variables. Simplifications are undertaken to mathemat-
ically represent the effect of the hysteresis current control in the closed-loop model.
Next, a PI voltage controller is devised to maintain the dc-link at its reference during
steady-state conditions. Then, to account for the delays caused by the sampling of the
output of the voltage and current sensors, Padé approximations of the sampling delay
and the zero-order hold are used to obtain an equivalent transfer functions of the digital
controller in the z-domain that can be implemented in a microcontroller.
4.1 Current Controller
As previously mentioned, the three-phase input currents should be synchronized with
the grid voltage for the system to operate with an unity power factor. This is performed
with a hysteresis current controller that will short-circuit the inductors whenever the
current is less than a specified reference value, and reconnect the inductors to the load
whenever the current is higher than the reference. Consequently, instead of a typical PI

46 Chapter 4. Control System Design
FIGURE 4.1: Current closed-loop.
controller, the current closed-loop has a hysteresis block that receives the current error
signal and outputs a duty-cycle to the current plant. Fig. 4.1 displays the block diagram
of the current closed-loop system. The current reference i∗
dis a dc variable located in the
dq0 reference frame. Since the system exchanges only active power with the grid, iqis
implicitly set to zero, and the magnitude of the three-phase input currents is defined by
id. The closed loop transfer function is given by (4.1), where Ghis the hysteresis block,
and Gcis the plant transfer function for current control.
Gc
cl =GhGc
1+GhGc
(4.1)
4.1.1 Control-to-current transfer function Gc
The transfer function of the current plant is obtained from (3.34). The input control sig-
nal βdrepresents the duty-cycle sent by the hysteresis block, while voe is the equilibrium
point of the output voltage. Using the parameters from Table 3.1, the following transfer
function is obtained for Gc.
Gc=390
0.003s+0.044
Fig. 4.2 displays the Bode plots of Gc. The datapoint notes the 3-dB frequency of the
system.

4.1. Current Controller 47
FIGURE 4.2: Bode plots of Gc.
4.1.2 Hysteresis block transfer function Gh
It is important to highlight the fact that the hysteresis block displayed in Fig. 4.1 is
but an approximation. The real hysteresis block is actually performed for each of the
three-phase currents, by comparing the error between each reference i∗
aand ia. The
reference for each phase is obtained by applying the inverse Clarke-Park transform to
i∗
d. It is assumed that the current idis able to track its input reference so that the average
duty-cycle and the transfer function from (3.34) can be used to define id.
Nevertheless, if it is supposed that idsuccessfully tracks i∗
d, the delay derived from
the switching of the hysteresis control should be accounted. From Fig. 3.2 it can be seen
that when keeping the current within the hysteresis band ∆ib, an average current equal
to the reference will be achieved after a period equal to the switching period Ts. Thus,
a delay variable This assigned to the transfer function of Gh, where the delay is found
with fsfrom (3.10). The transfer fuction for the hysteresis block is then given by (4.2).

48 Chapter 4. Control System Design
FIGURE 4.3: Bode plots of Gh.
Gh=1
sTh+1(4.2)
Th=9L∆ib
Vdc −|Vs|=36.77 µs
Fig. 4.3 displays the Bode plots of Gh. After specifying Gh, the current closed-loop
transfer function Gc
cl is obtained with command feedback in MATLAB.
Gc
cl =390
1.103e−7s2+0.003s+390
A Bode plot for the current closed-loop is illustrated in Fig. 4.4. In order to validate
the mathematical modeling developed in Chapter 3 to define the transfer function of
the current loop, a small-signal analysis was executed using the PLECS software tool.
Due to the presence of noise in the graph from PLECS, the trace’s data was uploaded to
Excel, and a moving average was used to filter part of the noise from the plot. Fig. 4.5
reveals the resultant Bode plot from the PLECS model. More details about the software

4.2. Voltage Controller 49
FIGURE 4.4: Bode plot of Gc
cl .
FIGURE 4.5: Bode plot of Gc
cl from PLECS.
modeling will be discussed in Chapter 5.
4.2 Voltage Controller
The block diagram of the closed-loop dc-link voltage controller is exhibited in Fig. 4.6.
It contains an inner current closed-loop that sets the actual output current of the system
to the reference generated by the voltage controller. The output of the current closed-
loop goes through Gv, which is the transfer function between ioand voobtained from

50 Chapter 4. Control System Design
FIGURE 4.6: Voltage closed-loop.
the small-signal analysis. The voltage control is performed by a standard proportional-
integral controller GPI that is tuned to optimally set the dc-link voltage voto the ref-
erence v∗
o. The transfer function of the PI controller is given by (4.3). Once GPI ,Gc
cl ,
and Gvare defined, it is possible to describe the behavior of the system by the voltage
closed-loop transfer function Gv
cl .
GPI =sKp+Ki
s(4.3)
Gv
cl =vo
v∗
o
=GPI Gc
cl Gv
1+GPI Gc
cl Gv
(4.4)
4.2.1 Current-to-voltage transfer function Gv
The transfer function of the converter was defined in the previous chapter by (3.35).
The equilibrium value of the input control signal βde is set to the average duty-cycle
of the converter. This means that the transfer function will correspond specifically to
the steady-state operation of the converter. With the components from Table 3.1,Gvis
found. Its Bode plots are displayed in Fig. 4.7. With (4.5) it is then possible to obtain the
Bode plots of the plant of the system, given by the open-loop transfer function Gvol=
Gccl×Gv. Fig. 4.8 demonstrates the Bode plots of Gvol.
Gv=7252
s+262.1 (4.5)

4.2. Voltage Controller 51
FIGURE 4.7: Bode plots of Gv.
FIGURE 4.8: Bode plots of GvoL.

52 Chapter 4. Control System Design
4.2.2 PI controller
Once the open-loop transfer function of the system is obtained, the PID tuner software
available in MATLAB was used to properly set the gains of the PI controller. When
tuning the PI, the frequency separation between the inner and outer control loops was
preserved, so that the inner current loop successfully tracked the reference given by the
voltage controller. In this case, since the voltage controller is tracking a DC component
v∗
o, its bandwidth is set to a very low value to reduce noise.
In order to protect the semiconductors and passive components from overcurrent,
preference was given to robustness instead of speed during the PI design process. Thus,
the controller converter was modeled to display no overshoot during increasing load-
steps. Its bandwidth was set to 100 Hz, with a rise time of 3.51 ms, and a settling time
of 6.37 ms. Notice that this rise time can be used with (3.9) to determine the maximum
voltage drop during load transients. With the delay transient determined as one fourth
of the rise time, it is possible to predict the voltage drop during a load step of 50% of
the nominal voltage.
V2=sV2
1−2Potd
Cdc '342 V
Fig. 4.9 shows the controller’s effort, while Fig. 4.10 shows the step response of the
tuned system. The transfer function of the tuned controller is displayed below.
GPI =0.08681s+22.44
s
With GPI it is possible to define Gv
cl .
Gv
cl =22.1s+5712
9.928e−12s4+2.727e−7s3+0.03517s2+31.3s+5712
The Bode plots of the voltage closed-loop that represents the transfer function be-
tween voand v∗
ois exhibited in Fig. 4.11. The high phase margin of the tuned system

4.2. Voltage Controller 53
FIGURE 4.9: Bode plots of the controller’s effort
FIGURE 4.10: Step response of tuned system

54 Chapter 4. Control System Design
FIGURE 4.11: Bode plots of Gv
cl .
contributes to a step response without any overshoot, while the low bandwidth consid-
erably reduces the noise perceived by the PI, which contributes to a smoother response.
4.3 Phase-Locked Loop
The phase-locked loop block is responsible for synchronizing the entire system with
the grid. It receives the three-phase voltage signals from the voltage sensors, and out-
puts a phase rotating in synchronism with its input.To reduce processing cost, a single
PLL actuating in dq0 coordinates is used. The PLL block is for the implementation of
the Clarke-Park transform since the transform requires the instantaneous angle of the

4.3. Phase-Locked Loop 55
FIGURE 4.12: Block diagram of the standard PLL.
rotating reference frame (RRF). Two distinct PLL algorithms were tested in this thesis:
the standard abc-dq0 PLL, and the α-βDSOGI. Their performance is compared in the
next chapter, where the simulation results are discussed. The block diagram of the ba-
sic algorithm is demonstrated in Fig. 4.12. This figure was taken from the simulation
software tool PLECS, which will be introduced in the next chapter.
First, the instantaneous voltage values measured by the voltage sensors are moved
to the rotating reference frame; however, only the quadrature component vqis used.
Next, the quadrature component is compared to a reference equal to zero, and the error
is sent to a PI controller. The output of the controller is integrated, and the resultant an-
gle is continuously used in the Clarke-Park transform. As the error converges to zero,
the output of the PI converges to the angular frequency of the system. In order to ac-
celerate convergence and reduce undesired start-up transients, the expected nominal
angular frequency of the system is added to the output of the PI controller. The fol-
lowing values were set for the gains of the PI controllers. These values were selected
by trial and error, and the design of PI controllers for PLL algorithms is still an area in
development.
KPLL
p=0.45 KPLL
i=20

56 Chapter 4. Control System Design
The block diagram of the DSOGI PLL is displayed in Fig. 4.13. As previously men-
tioned, this algorithm is superior to the preceding one because it presents two main ad-
vantages: a faster convergence, and better performance under unbalanced or distorted
conditions since it is frequency adaptive. Yet, it has the drawback of higher processing
cost.
Initially, instead of moving the three-phase voltages to the RRF, the voltage signals
are first moved to the stationary reference frame in αβ coordinates. The first half of
the algorithm consists of two second order generalized integrators that receive the es-
timated angular frequency of the grid and the αβ components as inputs. Each SOGI
works as a band-pass filter with a band regulated by a gain K, used to filter unwanted
harmonics of the nominal frequency. The SOGI outputs a signal vaand a signal in
quadrature qva. Pairs of v and qv signals are used to generate signals vαand vβ. The
other half of the DSOGI PLL block diagram is identical to the basic PLL. The SOGI block
diagram is shown in Fig. 4.14. The respective transfer functions of the output signals
generated by the SOGI algorithm are given by (4.6) and (4.7), where the estimated ωis
constantly updated by the PI controller.
KSOGI =√2
2
Hd=v0
v=Kωs
s2+Kωs+ω2(4.6)
Hq=qv0
v=Kω2
s2+Kωs+ω2(4.7)
4.4 Digital Controller
As technology improves and the complexity of control algorithms increase, microcon-
trollers are becoming more popular in implementing control schemes for PWM con-
verters. In that case, analog controllers need to be transformed into digital controllers

4.4. Digital Controller 57
FIGURE 4.13: Block diagram of the DSOGI PLL.

58 Chapter 4. Control System Design
FIGURE 4.14: Block diagram of the SOGI algorithm.
so that the delays originating from the discrete domain are accounted for.
When designing control systems for a digital controller, it is necessary to account
for the delays caused by analog-to-digital (ADC) and digital-to-analog (DAC) conver-
sions. There are multiple transformations available to move a system from the s to the
z-domain. Among the most common ones, are the impulse-invariant, the zero-order
hold (also known as the step-invariant), the first-order hold (ramp-invariant), and the
tustin (bilinear) method. Once the sampling frequency is set to extremely high values,
these methods will converge to the very similar results. Nevertheless, higher sampling
rates might considerably complicate other aspects of the engineering, thus it is benefi-
cial to choose the most suitable method. The zero-order hold transformation is more
appropriate for dealing with step-signals (thus the alternative name, step-invariant),
and it is the chosen method for this project. The delay caused by a zero-order hold
(ZOH) is given by
ZOH =1−esTs
sTs
, (4.8)
where Tsis the sampling period. In order to express the zero-order hold as a rational
polynomial, a Padé approximation is necessary. The 1st order Padé approximation of
(4.8) is given by:

4.4. Digital Controller 59
FIGURE 4.15: Block diagram including ADC & DAC conversions.
Gzoh =1
sTs+1(4.9)
While the zero-order hold affects the open-loop transfer function, a sampling delay
e−sT from the voltage and current sensors affects the feedback of the closed-loops. The
Padé approximation of a typical delay is demonstrated in (4.10). Including the zero-
order hold and the sampling delays, a new block diagram of the closed system can be
found. In Fig. 4.15, where the blue arrows correspond to digital signals, and red ones
to analog signals.
Hd=1−sTs
2
1+sTs
2
(4.10)
Both the zero-order hold and the sampling delay within the inner current closed-
loop can be accounted for when designing the PI voltage controller. For an even further
accuracy in the design of the control system, the delay effect exhibited by the MOSFETs
should also be included in the voltage transfer function Gv. Since the simulations in
this work did not include the delay effect from the MOSFETs, they were disregarded in
this control system design. In this project, it is assumed that a sampling frequency of
250kHz will be used. With (4.9) and (4.10), the feedback command is used in MATLAB
to obtain a new Gc
cl 1.
1When obtaining this transfer function, the values of 8.825e−19s4and 6.859e−13s3in the denominator
were approximated to zero.

60 Chapter 4. Control System Design
Gc
cl =−3.12e−9s2+0.00078s+390
1.622e−7s2+0.002222s+390
In order to obtain the same step-response displayed in Fig. 4.9, the gains of the PI
controller had to be readjusted from Kp=0.08681 and Ki=22.44 to the following
values.
Kp=0.08671 Ki=22.57
The similarity of the new calculated gains with the previous ones is due to the high
stipulated sampling frequency. As Tsincreases, its impact on the control system could
be enough to destabilize its operation in case the delay was not included in the con-
troller design.
4.5 Inverter Mode of Operation
This far, only one operation of the model was analyzed, in which power flows from
the grid to the dc side. As will be seen in the simulations chapter, when operating in
the reversed mode, when power flows to the grid from the dc side, the step-response
of the control system will not respond as expected. This is because when the model
operates as an inverter, the transfer functions describing the dynamic relation of the
state-space variables changes. By following the same procedure as in from Chapter 3, a
final small-signal model may be deduced.
When supposing the model from Fig. 3.1 to operate with current flowing from the
dc-link to the ac grid the differential equation (3.4) is modified as follows, where rcis
set to zero.
dvC
dt =−ioRL−vC
RLC(4.11)
After following the same procedure from Chapter 3, a linear equation similar to
(3.35) is found. It represents the plant of the converter operating in reverse mode. The

4.5. Inverter Mode of Operation 61
FIGURE 4.16: Bode plots of Gv
cl in reversed operation.
Bode plots of the voltage closed-loop of the converter in the reverse mode is exhibited
in Fig. 4.16. Notice that the graph includes the effect of the sampling delay in the outer-
loop.
∆vo
∆id
=1.5βde
Cs −1
RL
(4.12)
A PI controller was tuned with MATLAB tool pidTuner for the reverse operation
of the converter. In the reverse operation, it was not possible to achieve a controller
operating with zero overshoot while maintaining the same bandwidth from the forward
operation. The controller was designed to operate with a rise time of 1.61ms, a settling
time of 19.2ms, and an overshoot of 53.2%. The final proportional and integral gains of
the controller were tuned as follows.
Kp=0.09264 Ki=9.456

62 Chapter 4. Control System Design
It is interesting to notice that both sets of gains designed for the PI voltage controller
follow the inequalities proposed by [28], given by (4.13) and (4.14).
Ix≤CVo
3KpLs
(4.13)
Ix≤KpVx
2RKp+LsKi
cos(ϕ)(4.14)
where Vxis the rated rms voltage source, Vois the rated dc voltage, Cis the dc-link
capacitance, Rand Lare the input resistance and inductance, and Ixis the rated rms
input current.

63
Chapter 5
Simulation
The bidirectional converter designed in Chapter 3 and its control system designed in
Chapter 4 was simulated using PLECS system simulator tool. PLECS is a software tool
for system-level simulations of electrical circuits developed by Plexim. One of the main
advantages of this tool is the simplicity with which it handles the interaction of electrical
circuits with control systems. More information about this software can be found in [61].
The simulation results including the system performance during steady-state, start-up,
load-transients, and grid-distortion conditions will be presented in this chapter.
5.1 PLECS Simulation Model Setup
The simulation model is divided into the following main parts:
• Three-phase AC/DC Converter
• Voltage Controller
• Current Controller
• Phase-Locked Loop
The PLECS model of the three-phase bidirectional ac/dc converter is shown in Fig.
5.1. The internal parameters of the semiconductors were set equal to the parameters
from MOSFETs C2M0080120D and antiparallel diodes C4D20120D from the evaluation
kits KIT8020CRD8FF1217P-1 from CREE, Inc. [62]. These devices were selected due

64 Chapter 5. Simulation
FIGURE 5.1: Three-phase ac/dc converter schematic in PLECS.
to their low internal losses, wide range of switching frequencies, and high breakdown
voltage. The internal losses of the semiconductor devices were also included in the
simulations. There are five sensor units: Vaand Vbto track the grid’s voltage for the
PLL, Iinaand Iincto track input currents for the current controller, and Vdc to measure
the dc-link voltage used in the voltage controller. The Analog-to-digital and Digital-
to-Analog conversions are performed by the sampling delay blocks and the zero-order
hold, respectively. The DAC is located within the current controller block diagram. A
constant current source is set at the dc-link to represent an energy source that is either
receiving or sending energy from or to the three-phase ac grid. Unless stated otherwise,
the source voltages are supposed to be ideally balanced with no distortions.
The block diagram of the dc-link voltage controller is shown in Fig. 5.2. As pre-
viously explained, the controller receives the error between the voltage reference and
the actual dc-link voltage, and outputs a respective current reference (i∗
d) necessary to
reduce the error to zero. The current reference is then moved from the rotating refer-
ence frame to abc coordinates before being sent to each current controller. The system is
designed to work only with active power, so the reference of the quadrature component
of the current iqis set to zero. Notice that the voltage reference is set as a constant value
of 390 V throughout this work, but a variable reference could be used instead as long as
its bandwidth is lower than one-tenth of the bandwidth of the inner current controller.

5.1. PLECS Simulation Model Setup 65
FIGURE 5.2: Block diagram of the standard PLL.
FIGURE 5.3: Current controller for one phase.
Three identical current controllers are used to maintain the current within the spec-
ified current band. Diagram for phase a is found in Fig. 5.3. The gate signals are
programmed so that two MOSFETs (in the same phase) are never on at the same time,
but there is always one of them on, which prevents current from flowing through the
diodes. If it is desired to flow current through the MOSFETs and the diodes concomi-
tantly, the gate signals from the upper and lower bridge switches must be independent
from one another. For this purpose, two separate D Flip-flops fed by the same pulse
generator can be used. Fig. 5.4 illustrates the alternative model that enables the current
to be shared among MOSFETs and diodes. Notice that in this case the gate signals are
not complementary. Instead, the upper gate signals only turn on and off during the pos-
itive cycle of Ire f , and the lower gate signals only turn on and off during the negative

66 Chapter 5. Simulation
FIGURE 5.4: Alternative current control block diagram.
cycle of Ire f . For this work, it was decided that the anti-parallel diodes should be con-
tinuously off during expected operating conditions due to their higher internal losses.
It is important to highlight that the C2M0080120D MOSFETs from CREE Inc. also have
body diodes, but those present even higher losses than the Schottky diodes available in
the KIT8020CRD8FF1217P-1; thus, they will not be used and were not included in the
diagram.
The PLL block diagram was already presented in the previous chapter, but it is im-
portant to reiterate its importance in the current controller’s algorithm. The only reason
why the output of the voltage controller can be moved to dq0 coordinates with the
Clarke-Park transform is due to the successful detection of the instantaneous angle of
the rotating reference frame. As long as the PLL is working properly, the current ref-
erence will be a sinusoidal waveform in synchronism with the grid, which can then be
used for the comparator inside the hysteresis current controller.
5.2 Steady-State Operation
This section discusses the simulation results of the model when it operates at steady-
state. Table 5.1 summarizes the steady-state characteristics of the converter supplying
a nominal load of 9.2 A and -9.2 A in forward and reverse modes, respectively. The
current THD was found to be slightly higher in the forward mode, when power flows

5.2. Steady-State Operation 67
Rectifier Inverter
Vabc [V] 169.7 169.7
Iabc [A] 14.316 13.905
Vdc [V] 390.00 390.00
Io[A] 9.233 -9.154
Pin [W] 3,640.85 -3,538.07
Po[W] 3,588.02 -3,587.97
Qin [var] 14.15 -15.94
THD [%] 3.61 3.51
η[%] 98.55 98.61
TABLE 5.1: Basic components
(A) Three-phase currents iabc (B) Hysteresis current band ∆ib=∆iL/2
FIGURE 5.5: Steady-state grid-side current waveforms
from the lower voltage side to the higher voltage side. The active and reactive powers
were obtained with a low-pass filter applied to p=vdid+vqiqand q=vqid−vdiq.Pin
and Qin represent the active and reactive power flow from the grid to the converter.
From the passive components design of Chapter 3, the hysteresis current band of the
input three-phase currents should be around 0.3 A. Fig. 5.5(A) shows the three-phase
input currents at steady state. Fig. 5.5(B) is a zoom in of the region with highest ripple
current in one of the phases (at the crest of the current waveform) to analyze the mag-
nitude of the current ripple ∆ib. The maximum current ripple found is 0.63 A, which is

68 Chapter 5. Simulation
much higher than the designed value of 0.3A. This mismatch is caused by the inclusion
of the discrete components of the digital controller into the simulation. Indeed, before
the sampling delay, the zero-order hold and the discrete integrator were added, the sys-
tem operated at THD values close to 1.8%. As a matter of fact, the system’s performance
is mostly depreciated by the sampling delay block in the current feedback loop. For in-
stance, when the sampling frequency was increased from 250kHz to 500kHz, the current
band was 0.55A, and the THD was 2.5%. At a sampling frequency of 1MHz, the band
reduced to 0.41A, and the THD to 2.15%. However, too high sampling frequencies can
severely complicate the digital implementation of the model, since the microcontroller
will need to process the sampled data faster. Better solutions rely on predictive control
techniques, which can be used to compensate this feedback loop delay. Yet, these tech-
niques contain more advanced control systems, which will also increase the processing
requirements of the microcontrollers. The almost unity operating power factor of the
converter can be verified in Figs. 5.6(A) and 5.6(B), where the voltage and current wave-
forms of one of the phases from the grid are shown. The slightly higher THD found in
the forward mode is observed by the higher distortion around the peak of the current
in the first figure. When operating in reverse mode, the current is shifted 180 degrees
from the source voltage.
Figs. 5.7(A) and 5.7(B) display the waveforms of the output current ioin the for-
ward and reverse modes. Notice that this current feeds both the capacitor and the
output load, and its low-frequency current ripple is the origin of the low-frequency
voltage ripple of the dc-link. Figs. 5.8(A) and 5.8(B) show the maximum low and high
frequency voltage ripples of the dc-link under steady-state conditions. The maximum
low-frequency voltage ripple was found to be approximately 0.6 V, while the maximum
high-frequency voltage ripple was around 2.6 V. According to the equations defined in
Chapter 3, the maximum voltage ripples should be given by:
∆VLF =1
4√3×60 ×90µ×42.4 =0.6304 V

5.2. Steady-State Operation 69
(A) Forward mode (B) Reverse mode
FIGURE 5.6: Voltage vaand current iawaveforms
(A) Forward mode (B) Reverse mode
FIGURE 5.7: Output current io

70 Chapter 5. Simulation
(A) Low-frequency ripple. (B) High-frequency ripple
FIGURE 5.8: DC-link voltage ripple.
∆VHF =0.5648 ×9.2
90µ×27, 200 =2.12 V
The low-frequency ripple is predicted successfully, but the same does not happen
for the high-frequency case. This is because the delay introduced by the zero-order
hold and the sampling will expand the range of operating switching frequencies of
the system. The maximum switching frequency is still given by (3.10); however, the
estimated minimum switching frequency will be decreased due to the delays. A good
approximation to the new minimum switching frequency is defined as follows.
Tsmax =Th+Tzoh +Tsampling =44.77µs
fsmin =22, 336Hz
Hence, after the new minimum switching frequency is defined, the maximum high-
frequency voltage ripple is successfully calculated.
∆VHF =0.5648 ×9.2
90µ×22, 336 =2.59V

5.3. Converter Operation at Start-up 71
5.3 Converter Operation at Start-up
During the start-up of the system, the passive components have the highest risk of being
subject to overcurrent or overvoltage. One of the reasons is because the capacitor starts
with zero energy and has to charge up to the dc-link reference voltage. If the grid
is directly connected to the capacitor during start-up, a huge input current will take
place, which could severely damage the components. Even if the control system is
still disabled, current will flow through the diodes until the dc-link reaches a voltage
close to 1.654 times the peak voltage of one of the phases. This power input will not
occur with unity power factor, and an exchange of reactive power between the capacitor
and the grid will occur, accentuating even further the peak value of the inrush current.
Furthermore, if the control system is enabled from rest simultaneously with the inrush
current, the PLL block will not have synchronized its output phase with the grid yet,
which brings unwanted transients to the input currents.
In order to preserve the converter’s lifetime, start-up overcurrent and overvoltage
should be avoided at all costs. One solution would be to add a soft-starter between
the grid and the converter. These devices can control their output voltage so that it
gradually increases in a slow pace. However, many of these devices are not designed
to operate bidirectionally. In this work, overvoltage and overcurrent are avoided with
switches that are used to divide the start-up of the system into multiple stages. The
start-up should be divided into the following four stages:
1. Charging of the capacitor
2. Synchronization of the PLL
3. Enabling of the voltage control system
4. Connection to the load
During the charge-up of the capacitor, current flows solely through the diodes, and
the MOSFETs gate signals are disabled until the PLL has synchronized with the grid
and the capacitor has reached its maximum possible voltage without the PWM action.

72 Chapter 5. Simulation
Series resistances are added to each phase to reduce the current during this stage, which
are later short-circuited from the circuit. Once both the PLL and the capacitor have
stabilized, the voltage control system is enabled, and the system will behave as a PWM
rectifier to charge-up the capacitor to its final reference value. Right after the capacitor
is at the reference voltage, the load can be connected to the system.
Fig. 5.9 shows a comparison between the start-up with the proper separation into
stages and a start-up without it. The inrush currents and the dc-link voltage transients
experienced by the converter are displayed for each case. As seen in Fig. 5.9(A) and
5.9(B), without the protective switches and predetermined delay in between stages, the
inrush current of one of the phases rises up to 51 A (360.6% of its rated value), and the
dc-link voltage spikes at 538 V (137% of its rated value) .
Clearly, it is preferred to start up the system in stages. Figs 5.9(C) and 5.9(D) illus-
trate the behavior of the system throughout a staged start-up. Initially, the capacitor
charges via the diodes and the series resistances. For this model, series resistances of
10 Ωwere used. The peak of the inrush current reaches only 10.5 A, which is less than
the nominal current of the model. Meanwhile, the PI controller of the PLL is reaching
its steady-state of 377 rad/s. Once the synchronization is complete, the control system
is turned on at 0.05 s, and the PWM rectifier elevates the voltage of the capacitor to the
respective reference value. Another inrush current occurs during the second charging
of the capacitor, but since it was already partially charged, this second inrush current
increases only up to 10 A. Finally, the load is connected to the system at 0.06 s, and the
three-phase input currents rise to their steady-state values.
Fig. 5.10 shows the synchronization of the PLL with the grid. A faster convergence
is achieved due to the addition of the expected angular speed reference of the grid to the
output of the PI (Fig. 4.12). Both the standard and the DSOGI PLL synchronize equally

5.3. Converter Operation at Start-up 73
(A)iabc during start-up (C)iabc during staged start-up
(B) DC-link voltage during start-up (D) DC-link voltage during staged start-up
FIGURE 5.9: Start-up of the converter period

74 Chapter 5. Simulation
at balanced conditions without distortions.
FIGURE 5.10: Synchronization of the PLL with the grid during start-up
5.4 Load Transients
The behavior of the converter during load transients in both forward and reverse op-
eration will be presented in this section. Three main phenomena are observed during
load steps: the response of the dc-link voltage, the transient of the ac input currents,
and the action of the tuned PI controller.
As discussed in the previous chapter, the transfer function of the converter is af-
fected by its mode of operation. In order to maintain a fixed bandwidth of the controller
during both types of operation, the overshoot in the reverse mode was unavoidable in
this case. If the bandwidth had been increased for the reverse mode, it would have
been possible to reduce the step overshoot. Nevertheless, typical applications of this
kind of converter are focused on higher power ratings during the forward operation

5.4. Load Transients 75
(A) 50% of the rated load. (B) 100% of the rated load.
FIGURE 5.11: DC-link voltage response to load transients
than during the reverse mode, which is commonly used to sell energy back to the grid.
Thus, preference was given to maintain the same bandwidth characteristics for both
operations, instead of changing it to reduce the overshoot.
First, the voltage drop in the dc-link will be discussed. Figs. 5.11(A) and 5.11(B)
show the response of the dc-link voltage under load steps of 50% and 100% of the con-
verter’s rated power. The voltage remains above the minimum value required for the
PWM operation at all times. Moreover, the voltage reaches a minimum around 342V,
which is close to the value calculated in Chapter 4 for a step of 1800W. Results from
both cases complied with the voltage drops estimated with (3.9).
Next, the three-phase input current step response is analyzed. Figs. 5.12(A) and
5.12(B) show the iabc transients when the current is increased from 4.6 A to 9.2A, in the
forward mode, and from -4.6 A to -9.2A in the reverse mode. As seen from Fig. 5.12(A),
the controller is properly tuned for the forward mode of operation, with no overshoot
and fast response. However, with the same PI controller, some overshoot was observed
for the reverse mode of operation, in Fig. 5.12(B). This would also translate into voltage
transients in the dc link voltage.
To test the accuracy of the controller design from Chapter 4, input current responses
to a step change in load current were investigated. Fig. 5.13 shows step responses for

76 Chapter 5. Simulation
(A) 4.6 to 9.2A in the forward mode (B) -4.6 to -9.2A in the reverse mode
FIGURE 5.12: Input current responses to load transients
both forward and reverse modes of operation obtained using mathematical modeling
in MATLAB and circuit modeling in PLECS. A step was applied to the output current
source to increase its magnitude from 8.2 A to 9.2 A in both modes of operation. No-
tice that a step of magnitude 1 A in the output dc current corresponds to a step of
magnitude 1.5 A in the ac current references, due to the relation between the dc and
three-phase ac powers1. Figs. 5.13(A) and 5.13(B) show the step responses obtained for
the forward mode of operation using MATLAB and PLECS, respectively. Both results
were in agreement and displayed no overshoot. Figs. 5.13(C) and 5.13(D) show the
step responses in the reverse mode of operation using the same PI controller. Although
the results from MATLAB and PLECS modeling again matched, a significant overshoot
was observed in this case. The PI controller was then tuned for the inverter operation
and the resultant step responses are presented in Figs. 5.13(E) and 5.13(F). In all three
cases, transient characteristics such as rise time, settling time, and overshoot of the step
responses in PLECS matched the expected responses from MATLAB, which validates
the mathematical modeling and the control system design from Chapters 3 and 4.
13
2VsIs=Vdc Idc.

5.4. Load Transients 77
(A) Forward mode - MATLAB (B) Forward mode - PLECS
(C) Reversed mode - MATLAB (same PI)
(D) Reversed mode - PLECS (same PI)
(E) Reversed mode - MATLAB (tuned PI)
(F) Reversed mode - PLECS (tuned PI)
FIGURE 5.13: Step responses in MATLAB and PLECS

78 Chapter 5. Simulation
5.5 Grid Distortion
Until now only the standard PLL algorithm has been mentioned throughout the anal-
ysis of the simulation results. That is because up to this point the three-phase voltage
waveforms from the grid were supposed to be ideally balanced and with no distortions.
Nevertheless, non-linear loads and the saturation of magnetic devices in power systems
can severely impact the power quality of the grid. Furthermore, loads distributed in
between the three phases of the grid are never perfectly balanced, which can cause a
disparity in the amplitude of one of the phases in relation to the others. Hence, when
designing a system that will interact with the grid, it is important to consider how it
would react to the presence of harmonics in the source voltage, and how it would be-
have if the amplitudes of the source were not perfectly matching.
To compare the performance of the standard PLL algorithm with the DSOGI, the
output of each of them is measured during the start-up of an unbalanced system. Figs.
5.14(A) and 5.14(B) display the convergence of each PLL when the amplitude of one of
the phases is reduced from 120 Vrms to 100 Vrms. For the standard PLL, the amplitude of
the unbalanced phase is set back to 120 Vrms at 0.26 s, while for the DSOGI PLL, the sys-
tem is kept unbalanced. Undoubtedly, the second algorithm presents superior results.
In fact, the synchronization of the DSOGI under unbalanced conditions is similar to the
synchronization of the basic PLL for an ideally balanced grid (Fig. 5.10).
The advantages of the DSOGI algorithm are also visible when the system is oper-
ating under grid harmonic injections. For the second scenario, the three-phase voltage
source representing the grid was injected with 3rd order harmonics with magnitudes of
5%. The results are displayed in Figs. 5.15(A) and 5.15(B). In this case, the performance
of the DSOGI is still superior to the basic model; however the 3rd order harmonics were
able to affect the outputs of both algorithms.
Next, the 3rd order harmonics injection was increased from 5% to 10%, and the input
current and the dc-link of the converter were measured. Despite the oscillations in the
output of the phase-locked loop models due to harmonics, the system was still able
to operate within the minimum THD of 5%. For this scenario, the three-phase input

5.5. Grid Distortion 79
(A) Standard PLL. (B) DSOGI PLL.
FIGURE 5.14: PLL response under unbalanced three-phase source.
(A) Standard PLL. (B) DSOGI PLL.
FIGURE 5.15: PLL response under introduction of 3rd harmonics into the
source.

80 Chapter 5. Simulation
(A) Source vaand ia.(B) DC-link voltage.
FIGURE 5.16: System operating under strong 3rd harmonic.
currents were still able to supply the given load, displaying a maximum THD of 3.75%.
Yet, as can be seen in Figs. 5.16(A) and 5.16(B), the dc-link was deeply affected by the
3rd harmonics, and its low-frequency voltage ripple increased from 0.6 V to 20 V.

81
Chapter 6
Conclusions
With increased integration of renewable resources into the power distribution system,
bidirectional ac/dc converters are gaining popularity in interfacing the utility grid and
dc systems. This thesis presented design and modeling of a three-phase bidirectional
PWM ac/dc converter with high power factor, low current THD, and high efficiency. A
variable frequency hysteresis current control with constant current band was chosen as
the control scheme.
Passive components in the ac/dc converter need to be designed carefully to handle
the switching frequency, minimize the output voltage ripple, and hysteresis current
band. This work provides a compilation of approaches to the design of the dc-link
capacitor that included the low-frequency ripple, the high-frequency ripple, and the
energy-storage transients based on the rise time of the controller’s step response.
An accurate mathematical model of the converter is required to properly design
a feedback control system. Based on the differential equations of the energy-storage
components and the switching states, a switched model of the converter was derived.
Generalized average modeling technique was then used to obtain linearized and av-
eraged converter transfer functions. Using the derived converter transfer functions, a
hysteresis current control scheme with a constant current band was designed.
The designed bidirectional three-phase PWM ac/dc converter was set up and simu-
lated using PLECS simulation software. Mathematical models derived in Chapter 3 was
validated by a small-signal analysis tool in PLECS. The analog control system designed

82 Chapter 6. Conclusions
in Chapter 4 was also implemented and simulated using PLECS. One of the main chal-
lenges of hysteresis current control is the variable switching frequency and duty cycles
originating from the hysteresis block. However, it was possible to properly design the
control system by including the effects of the hysteresis block into the model as a delay,
and by supposing the system to operate with an average duty-cycle similar to that of a
boost dc/dc converter. Simulation results showed good agreement with the theoretical
analysis.
Discrete models of the control system for digital applications were also analyzed in
PLECS. It was found that due to the zero-order hold and feedback loop delays, the min-
imum switching frequency of the model was considerably lower than expected, and
this should be accounted for when the high-frequency voltage ripple of the dc side is
addressed. Simulations were developed to analyze the performance of the system after
including the internal losses of the semiconductors as well as the delays caused by the
analog-to-digital/digital-to-analog conversions in the discrete domain. At steady-state,
the system operated with a current THD of less than 5% in both modes of operation,
which is in accordance with IEEE-1547 standards for grid interconnection. The system
also displayed almost unity power factor and efficiency higher than 98.6% when op-
erating at nominal conditions with balanced three-phase source. System response and
effectiveness of the designed control system in response to load transients, unbalanced
three-phase source, and injection of 3rd harmonics into the source was also tested.
6.1 Future Work
The methodology presented in this thesis for the modeling of a bidirectional three-phase
ac/dc converter has but scratched the surface of the problem, and there is still much
that can be done to improve the performance of the system. Among the many steps
that could be followed for the enhancement of this model, it is worth mentioning:
1. Compensation of the feedback loop delay originating from the current sensors
sampling with predictive control.

6.1. Future Work 83
2. A comparison between different types of hysteresis current control including the
processing cost required by higher complexity adaptive band models.
3. A more accurate mathematical method to define the minimum switching fre-
quency of the fixed-band hysteresis current control under external delays.
4. Development of PLL techniques that are even more resistant to grid harmonics,
to reduce the impact of the 3rd harmonic on the dc-link.
5. Obtain the transfer functions of the converter including the capacitor equivalent
series resistance.
6. Validation of the simulation results with a hardware prototype.
7. Expansion of the converter into a multi-level topology operating with hysteresis
current control to improve even further the THD and efficiency.
8. An analysis of the behavior of a system composed of the proposed converter con-
nected to a dc/dc converter for battery charging applications.

85
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