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Fault Tolerant Online Condition Monitor of DC-Link Capacitor for Open-end Winding Machine
... A monitoring algorithm for capacitance estimation by injecting a zero-sequence current for an open-end winding permanent magnet synchronous machine (PMSM) is proposed in [63]. This monitoring algorithm only uses the measurements in the discharging period. ...
... At the beginning of the discharging process, the DC-link capacitor begins to discharge through the inverter when v dc < 0 and stops charging when v dc > 0. A zero-sequence current is injected to control the discharging capacitor current, when the machine is in the standstill condition. Thereafter, the discharging capacitor current is estimated by separately analyzing each individual phase, and the result is obtained using the superposition theory, as follows [63]: ...
... where i cap , i a , i b , i c , da 1U , da 2U , db 1U , d2 2U , dc 1U , and dc 2U are the capacitor current, a-phase current, b-phase current, c-phase current, and duty cycles of switches a 1U , a 2U , b 1U , b 2U , c 1U , and c 2U , respectively. Capacitance is estimated using the recursive least square method and is expressed as [63]: ...
Capacitors are critical components of power converter systems as they influence the cost, size, performance, and scale of such systems. However, capacitors exhibit the highest degeneration and breakdown rates among all power converter components due to their wear-out failures and short lifespans. Therefore, condition monitoring is a vital process to estimate the health status of capacitors and to provide predictive maintenance for ensuring stability in the operation of power converter systems. The equivalent series resistance (ESR) and the capacitance of the capacitor are two widely used parameters for evaluating the health status of capacitors. Unlike the ESR, the capacitance of a capacitor is suitable for the health monitoring of various types of capacitors; therefore, it is more preferable for large-scale systems. This paper presents an overview of previous research addressing this aspect of capacitors and provides a better understanding of the capacitance monitoring of capacitors utilized in power converter systems.
... Among three types of dual inverters, type II has the highest degree of fault tolerance as it is symmetrical [98], [99]. [98]. ...
Electric drives are an essential part of more electric aircraft (MEA) applications with ever-growing demands for high power density, high performance, and high fault-tolerant capability. High-speed motor drives can fulfil those needs, but their speeds are subject to the relatively low DC-link voltage adopted by MEA. The power inverters are thus expected to efficiently and effectively manage that limited voltage. A recently popular topology is represented by the dual inverters. They are featured by inherited fault tolerance, a high DC-link voltage utilization and an excellent output power profile. This paper aims to present a comprehensive review of different structures based on the dual inverter. To meet the stringent requirements of MEA applications, three performance aspects, including the voltage utilization, the inverter output quality and the fault-tolerant capability, are selected. Based on the chosen performance metrics, the key features of adopting dual inverter topologies against other converter selections are explicitly demonstrated. Finally, a practical guideline for choosing suitable dual inverters for different MEA applications is provided.
In this paper, a capacitance estimation method based on the recursive least squares (RLS) algorithm is proposed for the condition monitoring of the dc-link capacitors in motor drive systems. When a system is operating in the regenerative mode, the capacitance can be estimated online without the need for hardware modifications. The ratio of the current integral to the voltage increase is used to estimate the capacitance. In addition, the influences of the dead-time and pulse dropping on calculating current integral are analyzed. To deal with noise interference in voltage measurement, the RLS algorithm with outlier detection is used to achieve robust capacitance estimation. In view of the limited amount of data in the regenerative mode, the standard deviation of the error was estimated and a reasonable threshold was set according to the accuracy requirement to remove a part of the estimated value with a large error, which improves the reliability of the estimated results. Simulation and experimental results show the effectiveness of this method.
Capacitors are one type of reliability-critical components in power electronic systems. In the last two decades, many efforts in academic research have been devoted to the condition monitoring of capacitors to estimate their health status. Industry applications are demanding more reliable power electronics products with preventive maintenance. Nevertheless, most of the developed capacitor condition monitoring technologies are rarely adopted by industry due to the complexity, increased cost, and other relevant issues. An overview of the prior-art research in this area is therefore needed to justify the required resources and the corresponding performance of each key method. It serves to provide a guideline for industry to evaluate the available solutions by technology benchmarking, as well as to advance the academic research by discussing the history development and the future opportunities. Therefore, this paper first classifies the capacitor condition monitoring methods into three categories, then the respective technology evolution in the last two decades is summarized. Finally, the state-of-the-art research and the future opportunities targeting for industry applications are given.
The open-winding configuration with a common dc bus provides a zero-sequence current loop which allows the zero-sequence current flowing. With the application in permanent magnet synchronous generator (PMSG) systems, the existing zero-sequence current is inevitably caused by the common mode voltage generated by pulsewidth modulation (PWM) techniques and the third back EMF by the inherent flux harmonic component. With the mathematical modeling analysis, the zero-sequence equivalent circuit based on the PMSG system is proposed. Meanwhile, a zero-sequence current suppression controller is designed. In this paper, a zero vector redistribution PWM technique is proposed. With this technique, the dwell times of zero vectors (000) and (111) for both converters are determined. Meanwhile, it gives the zero-sequence component overmodulation analysis. Both the control method and improved PWM technique are implemented in a 1-kW open-winding PMSG experimental setup, and the experimental results are discussed.
DC-link capacitors are an important part in the majority of power electronic converters which contribute to cost, size and failure rate on a considerable scale. From capacitor users' viewpoint, this paper presents a review on the improvement of reliability of dc link in power electronic converters from two aspects: 1) reliability-oriented dc-link design solutions; 2) conditioning monitoring of dc-link capacitors during operation. Failure mechanisms, failure modes and lifetime models of capacitors suitable for the applications are also discussed as a basis to understand the physics-of-failure. This review serves to provide a clear picture of the state-of-the-art research in this area and to identify the corresponding challenges and future research directions for capacitors and their dc-link applications.
This paper proposes a method that allows the operation with direct torque control under incipient faults of the power switching devices in single dc-link dual inverters. Once the fault onset of the switching device is detected, the troubled devices are put under trigger suppression to regain operation. The proposed control algorithm makes use of additional states, termed opportunistic states, to maintain control of the induction machine. Simulations and experimental results confirm the capabilities of the technique for up to six devices under trigger suppression.
This paper proposes a zero sequence current control strategy that allows continuous operation of the three-phase dual-inverter drive using an open-end winding PMSM machine when freewheel diodes (or semiconductor switches) in either inverter fail open-circuit. With an identified failure present, the proposed control strategy injects zero sequence current to bias the phase currents of the faulted phase(s) such that they are unipolar thereby eliminating current flow in the device(s) that have failed. The first mode injects the minimum required zero-sequence current to bias the faulted phase to be unipolar. Hence the injected zero sequence current varies over a fundamental cycle. This reduces the total rms currents in the phases yielding higher torque in fault conditions. The second mode injects a zero sequence current that has a constant value over a fundamental cycle to bias all the currents appropriately. Additional thermal and current stresses result from both techniques and these are assessed and compared. A detailed electromagnetic torque model is also developed to demonstrate the zero sequence current does not affect the average torque output. Experimental results are used to compare the advantages of the techniques and show the improvement in the maximum available torque under fault conditions
The motivation for this paper is to present the capability of the dual inverter open-end winding of handling failures and continue to operate when failure occurs. The analysis of before failures, after failures and their effects on the system, is crucial. If nothing has been planned, the after effect of the failures may result in costly damage and may lead to another fault. The situation is undesirable and should be avoided or at least there should be a fault tolerant function to deal with such failures. Therefore, this paper will focus on the control scheme under an open-circuit phase fault for dual inverter-fed, permanent magnet synchronous motors with non-sinusoidal back-EMFs. The inverters are connected to both ends of the machine winding but use only one power source, thus a path for zero sequence currents to circulate in the motor winding is present. The feasibility of the drive during healthy and faulty conditions will be verified using experimental test. The phase currents, the zero sequence current, and the SVPWM strategy of the post-fault configuration are are presented.
A space vector pulse-width modulation (SVPWM) strategy of the post-fault reconfigured dual inverter in open-end winding motor drive systems is discussed. The reconfigured dual H-bridge inverter can produce the same distribution of space voltage vectors with the conventional two-level inverters, but different switches are used to obtain these voltage vectors. A new seven-segment SVPWM strategy suppressing the deadtime effect of insulated gate bipolar transistors in the same leg is presented, and its algorithm and implementation are discussed. The proposed method is validated by simulations and experiments.
This letter proposes a novel condition monitoring scheme of dc-link capacitors in PWM inverter-fed induction machine drives with front-end diode rectifiers, which is based on the online capacitance estimation scheme. While the motor is operating in the regenerative mode for the estimation process, a regulated ac component is injected into the stator winding, which causes a dc-link voltage ripple at the same frequency. From the ac components of the dc-link voltage and current, the capacitance is estimated with a recursive least squares algorithm. With this method, experimental results have shown that the estimation error of the capacitance is less than 1%, from which the deterioration condition of the capacitors can be diagnosed reliably.
In this paper, a novel scheme for the estimation of the equivalent series resistance (ESR) of the dc-link electrolytic capacitor in three-phase ac/dc pulsewidth-modulation converters is proposed for condition monitoring. First, a controlled ac current component is injected into the input. Then, it induces ac voltage ripples on the dc output. By manipulating these ac voltage and current components with digital filters, the value of the ESR can be calculated, where the recursive least squares algorithm is used for reliable estimation results. In addition, the value of the ESR is corrected by considering the temperature effect, for which a simple temperature-sensing circuit has been designed. The simulation and experimental results show that the estimation error of the ESR is within a reasonable range, thereby enabling the determination of the appropriate time for the replacement of the capacitor.
This paper presents strategies for maintaining operation of a double-output AC machine drive in the presence of various component failures. With a short/open-switch fault, the drive is capable of operating the AC machine at a reduced power capability by creating an artificial neutral. The procedures of mode transition are shown to depend on the system configuration. This operating method can be applied to both induction and permanent magnet synchronous machines as long as they can sustain a few cycles of increased current. Robust operation of the drive in case of short-circuit fault in the phase winding is also presented. It is also demonstrated in this paper the operating method when one of the two isolated DC sources is interrupted. This work further discusses the two-phase operation mode in which one faulted phase is isolated from the remaining portion of the circuit. Simulink simulation results are presented.
A novel online capacitance estimation method for a DC-link capacitor in a three-phase AC/DC/AC PWM converter is prepared. At no load, a controlled AC current with a lower frequency than the line frequency is injected into the input side, which then causes AC voltage ripples at the DC output side. By extracting the AC voltage and current components on the DC output side using digital filters, the capacitance can then be calculated using the recursive least squares method. The proposed method can be simply implemented with only software and no additional hardware. Experimental results confirm that the estimation error is less than 0.26%.
Condition Monitoring of DC-Link Electrolytic Capacitors in Adjustable-Speed Drives
- K Lee
- M Kim
- J Yoon
- S B Lee
- J Yoo