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P4-NetFPGA-based network slicing solution for 5G MEC architectures
... 3) Other INC Applications: There are several studies that leverage in-network computing in other 4G/5G/6G applications. Processing of 5G slice flows and 6G tasks has been considered in respectively [154] and [155]. Ricart et al. [154] demonstrate an in-network solution which allows the processing of the flows in 5G network slices. ...
... Processing of 5G slice flows and 6G tasks has been considered in respectively [154] and [155]. Ricart et al. [154] demonstrate an in-network solution which allows the processing of the flows in 5G network slices. They define a network slice by 6-tuple: 5G user source and destination IPs; 5G user source and destination ports; differentiated services code point; and GTP Tunnel ID which is related to a radio tunnel established between user equipment and 5G core network. ...
... They have leveraged network elements to perform some control plane procedures, or offloadable mobile packet core network functions like Serving Gateway and User Plane Function. The studies in [154], [155], [156], [157], [158] have leveraged in-network computing for faster processing in other areas of 4G/5G/6G including 5G network slicing, 6G applications, LTE serving IoT application, and monitoring/securing 5G networks. ...
In comparison with cloud computing, edge computing offers processing at locations closer to end devices and reduces the user experienced latency. The new recent paradigm of innetwork computing employs programmable network elements to compute on the path and prior to traffic reaching the edge or cloud servers. It advances common edge/cloud server based computing through proposing line rate processing capabilities at closer locations to the end devices. This paper discusses use cases, enabler technologies and protocols for in-network computing. According to our study, considering programmable data plane as an enabler technology, potential in-network computing applications are in-network analytics, in-network caching, innetwork security, and in-network coordination. There are also technology specific applications of in-network computing in the scopes of cloud computing, edge computing, 5G/6G, and NFV. In this survey, the state of the art, in the framework of the proposed categorization, is reviewed. Furthermore, comparisons are provided in terms of a set of proposed criteria which assess the methods from the aspects of methodology, main results, as well as application-specific criteria. Finally, we discuss lessons learned and highlight some potential research directions.
... The firewall rules are stored in the TCAM (ternary-content-addressable memory) table of the P4 FPGA boards. Moreover, in [72,73], the authors design and implement a network slicing framework for the edge-to-core network segment that allows for the creation of different slices based on a 6-tuple consisting of user source and destination IPs, user source and destination ports, differentiated services code point (DSCP), and GTP tunnel ID. The framework is deployed in a smart grid self-healing automatic reconfiguration use case in [74], i.e., uRLLC traffic. ...
... In [72,73], full isolation between slices is reported, with 512 users divided into 16 slices. The lowest priority slices experience a maximum delay of 2.5 ms, whereas the rest of the traffic shows less than 1 ms of delay. ...
The rapid evolution of 5G and beyond technologies has sparked an unprecedented surge in the need for networking infrastructure that can deliver high speed, minimal latency, and remarkable flexibility. The programmable data plane, which enables the dynamic reconfiguration of network functions and protocols, is becoming increasingly important in meeting these requirements. This paper provides an overview of the current state of the art in programmable data planes implemented in 5G and beyond architectures. It proposes a classification of the reviewed studies based on system architecture and specific use cases. Furthermore, the article surveys the primary applications of programmable devices in emerging telecommunication networks, such as tunneling and forwarding, network slicing, cybersecurity, and in-band telemetry. Finally, this publication summarizes the open research challenges and future directions. In addition to offering a comprehensive review of programmable data plane applications in telecommunication networks, this article aims to guide further research in this promising field for network operators and researchers alike.
... The programmability of memristors can be used to develop new architectures employing a range of states for various network functions. The current network paradigms like P4 [18], NetFPGA [80], etc., also build upon same basic principles of reconfigurability and memristors can aid in the development of complex architectures built upon small reconfigurable memristive circuits. This results in not only direct performance enhancement due to efficient operations, but, also atomic operations of memristors provide energy efficient response as compared to the transistors. ...
... At the same time, less energy consumption of memristors can help in achieving complex AI operations at end nodes and edge devices. An energy efficient neural network architecture can ultimately replace the state-of-theart network paradigms like P4 [18], NetFPGA [80], etc., due to the cognitive handling of packets unlike any other architecture. In this section, we would highlight the previous researches and their findings in the domain of memristorbased neural networks. ...
The high performance requirements of nowadays computer networks are limiting their ability to support important requirements of the future. Two important properties essential in assuring cost-efficient computer networks and supporting new challenging network scenarios are operating energy efficient and supporting cognitive computational models. These requirements are hard to fulfill without challenging the current architecture behind network packet processing elements such as routers and switches. Notably, these are currently dominated by the use of traditional transistor-based components. In this article, we contribute with an in-depth analysis of alternative architectural design decisions to improve the energy footprint and computational capabilities of future network packet processors by shifting from transistor-based components to a novel component named
Memristor
. A memristor is a computational component characterized by non-volatile operations on a physical state, mostly represented in form of (electrical) resistance. Its state can be read or altered by input signals, e.g. electrical pulses, where the future state always depends on the past state. Unlike in traditional von Neumann architectures, the principles behind memristors impose that memory operations and computations are inherently colocated. In combination with the non-volatility, this allows to build memristors at nanoscale size and significantly reduce the energy consumption. At the same time, memristors appear to be highly suitable to model cognitive functionality due to the state dependence transitions in the memristor. In cognitive architectures, our survey contributes to the study of memristor-based Ternary Content Addressable Memory (TCAM) used for storage of cognitive rules inside packet processors. Moreover, we analyze the memristor-based novel cognitive computational architectures built upon self-learning capabilities by harnessing from non-volatility and state-based response of memristors (including reconfigurable architectures, reservoir computation architectures, neural network architectures and neuromorphic computing architectures).
... The evaluation results have shown a lower packet loss from 49% to 4% in the worst-case to provide QoS in network congestion. Similarly, in [36] [17], a 5Gbased QoS-aware network slicing solution is performed on P4-NetFPGA to fulfill the SLA requirement in terms of endto-end latency and bandwidth. Not only offloading the user plane functions but [39] redesigns mobile packet core and offloads a significant fraction of signaling procedures from the control plane to P4-programmable hardware (Netronome Agilio SmartNIC) or software switch (BMv2). ...
... Other offloading criteria such as 3GPP slice definitions can be adopted for HW processing instead or in addition to HHbased offloading. For instance, traffic flows can be classified based on the definition of network slicing such as match on 6-tuple (i.e., 5G user source and destination IPs, 5G user source and destination ports, Differentiated Services Code Point (DSCP) and GTP Tunnel ID) to define the network slice and route the traffic accordingly [36]. The delay critical traffic can be forwarded to the programmable switch ASIC, and based on the priority; it will be assigned to the specific queues [37]. ...
This paper focuses on hybrid pipeline designs for User Plane Function and next-generation NodeB leveraging target-specific features and an insightful discussion of P4 and target challenges and limitations. The entire or disaggregated UPF runs on P4 targets and allocates packet processing data paths in P4 hardware or DPDK/x86 software based on flow characteristics (e.g., heavy hitters) and QoS requirements (e.g., low-latency slices). For the hybrid gNodeB, most packet processing is executed in commodity Tofino hardware, while unsupported functions such as Automatic Repeat Request and cryptography are performed in DPDK/x86. We show that our hybrid UPF improves the scalability by 18× and reduces latency up to 50%. The results also suggest that careful traffic allocation to pipeline targets is required to optimize each target's strength and avoid processing delays. Finally, we demonstrate a QoS-oriented application of the hybrid UPF and present gNodeB buffer service benchmarks.
... GRED is implemented in P4, but the authors do not specify on which target. [389] 2018 bmv2 Aghdai et al. [390,391] 2018/19 Netronome GRED [392] 2019 bmv2 HDS [393] 2020 -Shen et al. [394] 2019 Xilinx SDNet Lee et al. [395] 2019 Tofino Ricart-Sanchez et al. [396] 2019 ...
... Ricart-Sanchez et al. [396] propose an extension for the P4-NetFPGA framework for network slicing between different 5G users. The authors extend the capabilities of the P4 pipeline and implement their mechanism on the NetFPGA-SUME. ...
With traditional networking, users can configure control plane protocols to match the specific network configuration, but without the ability to fundamentally change the underlying algorithms. With SDN, the users may provide their own control plane, that can control network devices through their data plane APIs. Programmable data planes allow users to define their own data plane algorithms for network devices including appropriate data plane APIs which may be leveraged by user-defined SDN control. Thus, programmable data planes and SDN offer great flexibility for network customization, be it for specialized, commercial appliances, e.g., in 5G or data center networks, or for rapid prototyping in industrial and academic research. Programming protocol-independent packet processors (P4) has emerged as the currently most widespread abstraction, programming language, and concept for data plane programming. It is developed and standardized by an open community and it is supported by various software and hardware platforms. In this paper, we survey the literature from 2015 to 2020 on data plane programming with P4. Our survey covers 497 references of which 367 are scientific publications. We organize our work into two parts. In the first part, we give an overview of data plane programming models, the programming language, architectures, compilers, targets, and data plane APIs. We also consider research efforts to advance P4 technology. In the second part, we analyze a large body of literature considering P4-based applied research. We categorize 241 research papers into different application domains, summarize their contributions, and extract prototypes, target platforms, and source code availability.
... The evaluation results have shown a lower packet loss from 49% to 4% in the worst-case to provide QoS in network congestion. Similarly, in [36] [17], a 5Gbased QoS-aware network slicing solution is performed on P4-NetFPGA to fulfill the SLA requirement in terms of endto-end latency and bandwidth. Not only offloading the user plane functions but [39] redesigns mobile packet core and offloads a significant fraction of signaling procedures from the control plane to P4-programmable hardware (Netronome Agilio SmartNIC) or software switch (BMv2). ...
... Other offloading criteria such as 3GPP slice definitions can be adopted for HW processing instead or in addition to HHbased offloading. For instance, traffic flows can be classified based on the definition of network slicing such as match on 6-tuple (i.e., 5G user source and destination IPs, 5G user source and destination ports, Differentiated Services Code Point (DSCP) and GTP Tunnel ID) to define the network slice and route the traffic accordingly [36]. The delay critical traffic can be forwarded to the programmable switch ASIC, and based on the priority; it will be assigned to the specific queues [37]. ...
... Ricart-Sanchez et al. [27,28] propose a NetFPGA-based network slicing solution implemented in P4 language [29] for 5G MEC architectures. Moreover, an analysis and evaluation of the performance is presented. ...
Next-generation networks are expected to combine advanced physical and digital technologies in super-high-speed connected system infrastructures, gaining critical operation competitiveness of improved efficiency, productivity and quality of services. Towards a fully digital and connected world, these platforms will enable infrastructure virtualization and support of edge processing, making emerging sectors, such as Industry 4.0, ready to exploit its full potentials. Nevertheless, the fast growth of data-centric and automated systems may exceed the capabilities of the overall infrastructure beyond the radio access networks, becoming unable to fulfil the demands of vertical sectors and representing a bottleneck. To minimize the negative effects that could affect critical services in a heavily loaded network, it is essential for network providers to deploy highly scalable and prioritisable in-network optimisation schemes to meet industry expectations in next-generation networks. To this end, this work presents a novel framework that leverages extended Berkeley Packet Filter (eBPF) and eXpress Data Path (XDP) to offload network functions to reduce unnecessary overhead in the backbone infrastructure. The proposed solution is envisioned to be implemented as a Network Application (NetApp) service, which will greatly benefit the compatibility with next-generation networking ecosystem empowered by Artificial Intelligence (AI), advanced automation, multi-domain network slicing, and other related technologies. The achieved results demonstrate key performance improvements in terms of packet processing capacity as high as about 18 million packets per second (Mpps), system throughput up to 6.1 Mpps with 0% of packet loss, and illustrate the flexibility of the framework to adapt to multiple network policy rules dynamically on demand.
... In Reference [142], a novel a slicing framework is developed for 5G MEC environments able to meet the strcit requirements set by the 5G standard. The proposed system use 6-tuple list of header fields to determine the output queue and enforce QoS policies. ...
Software Defined Networking (SDN) marked the beginning of a new era in the field of networking by decoupling the control and forwarding processes through the OpenFlow protocol. The Next Generation SDN is defined by Open Interfaces and full programmability of the data plane. P4 is a domain specific language that fulfills these requirements and has known wide adoption over the last years from Academia and Industry. This work is an extensive survey of the P4 language covering domains of application, a detailed overview of the language and future directions.
... In [6] a NetFPGA-based network slicing implementation for 5G MEC computing architecture is presented, however it does not present support for multi-tenancy and therefore, it is not flexible enough to be compared with this contribution and also to be considered as a 6G solution. In [7], a hardwarebased network slicing solution for smart grids self-healing scenarios over 5G networks is described. ...
... Recent research trends are exploring selected hardware offloading solutions. For example, FPGA implementation of offloading the GPRS Tunnelling Protocol (GTP) function in the MEC platforms are proposed in [2], or slicing solution based on programmable switch in [3] and, finally, stateless translations of GTP protocol in Segment Routing version 6 in [4]. Offloading of 5G virtualised Radio Access Network (vRAN) functions to programmable hardware has been also proposed [5]. ...
This demo shows a 5G X-haul testbed enhanced
with P4 switches implementing the offloading of the User
Plane Function module. The P4 code includes GTP protocol
encapsulation/decapsulation function, fully configurable N3-N6-
N9 steering, and advanced online monitoring of the experienced
latency metadata.
... Finally, the network system should be monitored in real-time to make the orchestrator aware of the network status and the resource utilization for automatically optimizing the network performance and resource allocation. Recent studies on optical metro access network have been focused on the control plane for flexible network and IT resources assignment [12]- [15], and on the data plane for the traffic flow programmability based on P4 [16]- [20]. We use FPGA as the multifunctional optical control and traffic processing (aggregation, classifier) & monitoring interface in this work. ...
The upcoming 5G and beyond 5G heterogeneous applications with different quality of service (QoS) will impose strict latency, bandwidth, and flexibility requirements on the optical metro access network. The conventional cloud computing is gradually unable to fulfill the application requirements, especially on latency due to the distance causing propagation and networking delay. Therefore, the edge computing that distributed in the metro network is promising to serve the applications with the requirements of ultra-low latency. As the resources of edge computing nodes are restricted and light compared with DC, it is significant to manage across multiple edge computing nodes to enable joint allocation of the distributed resources. To address this issue, the optical metro network infrastructure should be flexible on the data plane and able to interact with the control and orchestration plane to automatically adapt to the communication requirements of multiple edge computing nodes. Related works have been focused on the simulation and numerical study. In this paper, an experimental testbed of a flexible optical metro access network including hardware and software components is built and the performance is validated with real server traffic. The presented network system is based on the field-programmable gate array (FPGA), and hardware adapted open source network management and telemetry tools. Different from the commercial electrical switches, FPGA is fully programmable making it able to flexibly forward and monitor the traffic, in the meantime, to dynamically control the optical devices according to the feedback from the control plane. By exploiting the dynamic software defined networking (SDN) control and network service orchestration, the network is able to establish capacity adapted network slices for the edge computing connections. Successful telemetry-assisted dynamic network service chain (NSC) generation, automatic bandwidth resources assignment, and QoS protection are demonstrated.
... Several P4-based UPF implementations have been proposed commercially and in the literature. Most of their software is not open source [133][134][135]. ...
Fifth generation (5G) cellular networks will serve a wide variety of heterogeneous use cases, including mobile broadband users, ultra-low latency services and massively dense connectivity scenarios. The resulting diverse communication requirements will demand networking with unprecedented flexibility, not currently provided by the monolithic black-box approach of 4G cellular networks. The research community and an increasing number of standardization bodies and industry coalitions have recognized softwarization, virtualization, and disaggregation of networking functionalities as the key enablers of the needed shift to flexibility. Particularly, software-defined cellular networks are heralded as the prime technology to satisfy the new application-driven traffic requirements and to support the highly time-varying topology and interference dynamics, because of their openness through well-defined interfaces, and programmability, for swift and responsive network optimization. Leading the technological innovation in this direction, several 5G software-based projects and alliances have embraced the open source approach, making new libraries and frameworks available to the wireless community. This race to open source softwarization, however, has led to a deluge of solutions whose interoperability and interactions are often unclear. This article provides the first cohesive and exhaustive compendium of recent open source software and frameworks for 5G cellular networks, with a full stack and end-to-end perspective. We detail their capabilities and functionalities focusing on how their constituting elements fit the 5G ecosystem, and unravel the interactions among the surveyed solutions. Finally, we review hardware and testbeds on which these frameworks can run, and provide a critical perspective on the limitations of the state-of-the-art, as well as feasible directions toward fully open source, programmable 5G networks.
... Several P4-based UPF implementations have been proposed commercially and in the literature. Most of their software is not open source [121][122][123]. ...
Fifth generation (5G) cellular networks will serve a wide variety of heterogeneous use cases, including mobile broadband users, ultra-low latency services, and massively dense connectivity scenarios. The resulting diverse communication requirements will demand networking with unprecedented flexibility, not currently provided by the monolithic and black-box approach of 4G cellular networks. The research community and an increasing number of standardization bodies and industry coalitions have recognized softwarization, virtualization, and disaggregation of networking functionalities as the key enablers of the needed shift to flexibility. Particularly, software-defined cellular networks are heralded as the prime technology to satisfy the new application-driven traffic requirements and to support the highly time-varying topology and interference dynamics, because of their openness through well-defined interfaces, and programmability, for swift and responsive network optimization. Leading the technological innovation in this direction, several 5G software-based projects and alliances have embraced the open source approach, making new libraries and frameworks available to the wireless community. This race to open source softwarization, however, has led to a deluge of solutions whose interoperability and interactions are often unclear. This article provides the first cohesive and exhaustive compendium of recent open source software and frameworks for 5G cellular networks, with a full stack and end-to-end perspective. We detail their capabilities and functionalities focusing on how their constituting elements fit the 5G ecosystem, and unravel the interactions among the surveyed solutions. Finally, we review platforms on which these frameworks can run, and discuss the limitations of the state-of-the-art, and feasible directions towards fully open source, programmable 5G networks.
In recent years, deep learning-based approaches, particularly those leveraging the Transformer architecture, have garnered widespread attention for network traffic anomaly detection. However, when dealing with noisy data sets, directly inputting network traffic sequences into Transformer networks often significantly degrades detection performance due to interference and noise across dimensions. In this paper, we propose a novel multi-channel network traffic anomaly detection model, MTC-Net, which reduces computational complexity and enhances the model’s ability to capture long-distance dependencies. This is achieved by decomposing network traffic sequences into multiple unidimensional time sequences and introducing a patch-based strategy that enables each sub-sequence to retain local semantic information. A backbone network combining Transformer and CNN is employed to capture complex patterns, with information from all channels being fused at the final classification header in order to achieve modelling and detection of complex network traffic patterns. The experimental results demonstrate that MTC-Net outperforms existing state-of-the-art methods in several evaluation metrics, including accuracy, precision, recall, and F1 score, on four publicly available data sets: KDD Cup 99, NSL-KDD, UNSW-NB15, and CIC-IDS2017.
The heterogeneous requirements imposed by different vertical businesses have motivated a networking paradigm shift in the next generation of mobile networks (beyond 5G and 6G), leading to critical operation competitiveness of improved productivity, performance and efficiency. Furthermore, with the global digital revolution, such as Industry 4.0, and a connected world, network virtualisation together with high reliability and high performance communications have become crucial elements for mobile network operators. To minimise the negative effects that could affect critical services, network slicing is widely recognised as a key technology with the objective of meeting the Service-Level Agreements (SLAs) and Key Performance Indicators (KPIs) in future 6G networks. In this context, it is essential to introduce a programmable data plane able to enforce flexible Quality of Service (QoS) commitments, while providing high-performance packet processing and real-time monitoring capabilities. To this end, this paper is focused on designing, prototyping and evaluating a novel framework that leverages a set of hardware-based technologies including eXpress Data Path (XDP), extended Barkeley Packet Filter (eBPF) and Smart Network Interface Cards (SmartNICs) to offload network functionality with the objective of providing high-performance pre-6G front-, mid-and back-haul network communications and thus, decreasing the overhead incurs by the Linux Kernel. The proposed solution is implemented based on bypassing the Linux Kernel and accelerating the communication, while providing network slice control and real-time monitoring capabilities. The main aim of this framework is to ensure network communications in forthcoming 6G infrastructures by guaranteeing 6G KPIs and avoiding system overload. The empirical validation of this solution for Industry 4.0 services as an example use case demonstrates key performance improvements in terms of packet processing as high as about 25Gbps, 20M packet per second, 0% packet loss, 0.1ms of latency and less than 10% load on the CPUs.
The increasing number of heterogeneous devices connected to the Internet, together with tight 5G requirements have generated new challenges for designing network infrastructures. Industrial verticals such as automotive, smart city and eHealthcare (among others) need secure, low latency and reliable communications. To meet these stringent requirements, computing resources have to be moved closer to the user, from the core to the edge of the network. In this context, ETSI standardized Multi-Access Edge Computing (MEC). However, due to the cost of resources, MEC provisioning has to be carefully designed and evaluated. This survey firstly overviews standards, with particular emphasis on 5G and virtualization of network functions, then it addresses flexibility of MEC smart resource deployment and its migration capabilities. This survey explores how the MEC is used and how it will enable industrial verticals.
The demand-led growth of datacenter networks has meant that many constituent technologies are beyond the research community's budget. NetFPGA SUME is an FPGA-based PCI Express board with I/O capabilities for 100 Gbps operation as a network interface card, multiport switch, firewall, or test and measurement environment. NetFPGA SUME provides an accessible development environment that both reuses existing codebases and enables new designs
The NetFPGA platform enables students and researchers to build high-performance networking systems in hardware. A new version of the NetFPGA platform has been developed and is available for use by the academic community. The NetFPGA 2.1 platform now has interfaces that can be parameterized, therefore enabling development of modular hardware designs with varied word sizes. It also includes more logic and faster memory than the previous platform. Field Programmable Gate Array (FPGA) logic is used to implement the core data processing functions while software running on embedded cores within the FPGA and/or programs running on an attached host computer implement only control functions. Reference designs and component libraries have been developed for the CS344 course at Stanford University. Open-source Verilog code is available for download from the project website.
The evolution from the current Fourth-Generation (4G) networks to the emerging Fifth-Generation (5G) technologies implies significant changes in the architecture and poses demanding requirements on network infrastructures. One of the Key Performance Indicators (KPIs) in 5G is to ensure a secure network with zero downtime. In this paper, we focus on the provisioning of protection capabilities for 5G infrastructures. Our objective is to implement a new 5G firewall that allows the detection, differentiation and selective blocking of 5G network traffic in the edge-to-core network segment of a 5G infrastructure, using a hardware-accelerated framework based on Field Programmable Gate Arrays (FPGA), developed using the P4 language. The proposed 5G firewall has been prototyped with the new capabilities proposed empirically validated.